DOWNLOAD Sony CDX-1300 / CDX-3800 / CDX-3900 Service Manual ↓ Size: 3.42 MB | Pages: 32 in PDF or view online for FREE

Model
CDX-1300 CDX-3800 CDX-3900
Pages
32
Size
3.42 MB
Type
PDF
Document
Service Manual
Brand
Device
Car Audio
File
cdx-1300-cdx-3800-cdx-3900.pdf
Date

Sony CDX-1300 / CDX-3800 / CDX-3900 Service Manual ▷ View online

9
6
7
8
9
0
 floating block assy  
4
 tension spring (SPM) 
5
 tension spring (angle) 
2
 washer (M) 
3
 lever (LE.L) 
1
 tension spring (lever D) 
3
 tension spring (FL)  
1
 screws (P 2x2.5) 
2
 chassis (R) block assy 
4
 tension spring (FL)  
2-5. CHASSIS (R) BLOCK ASSY
2-6. FLOATING BLOCK ASSY
10
1
 gear (worm wheel) 
2
 shaft (sled guide) 
3
 optical pick-up block  
claw 
1
 spring (roller) 
2
 spring (roller) 
7
 roller arm assy 
3
4
5
6
2-7. ROLLER ARM ASSY
Note : When replacing the spring roller, replace the rollers at the right and left ends at the same time.
2-8. OPTICAL PICK-UP BLOCK
11
11
3-1. IC PIN DESCRIPTION
• IC600 µPD78005GC-133-8BT (SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
MCLK
O
Microcomputer command clock signal output (data latch on rising)
2
MDATA
O
Microcomputer command data signal output
3
MLD
O
Microcomputer command load signal output
4
AVSS
Analog ground
5
DSTSEL0
I
Destination select setting input (Connect to ground in this set.)
6
DSTSEL1
I
9k/10k select setting input (“L”: 9 kHz step, “H”: 10 kHz step)
7
AVREF1
I
Analog reference voltage input
8
SUBQ
I
Sub code Q data input
9
Not used.
10
SQCK
O
Clock output for sub code Q register.
11
LCDCE
O
LCD driver serial chip enable output
12
LCDSO
O
LCD driver serial data output
13
LCDCKO
O
LCD driver serial clock output
14
ILLON
O
Illumination power control output
15
UNICKI
I
SONY-BUS serial interface clock input
16
UNISI
I
SONY-BUS serial interface data input
17
UNISO
O
SONY-BUS serial interface data output
18
UNICKO
O
SONY-BUS serial interface clock output
19
SBCK
O
Clock output for error correction result read-in.
20
BUSON
O
BUS ON control output
21
SYS RST
O
System reset control output
22
RST
O
DSP reset signal output (“L” active)
23
FOUT
O
Loading motor control output (Forward direction)
24
ROUT
O
Loading motor control output (Reverse direction)
25
CD-ON
O
CD power control output
26
PW-ON
O
System power control output
27
LIMSW
I
LIMIT switch input (“L” active)
28
FLAG
I
Data input for error correction result read-in.
29
SENS
I
SENS signal input
30
FLOCK
I
Focus servo pulling signal input (“L” active)
31
TLOCK
I
Tracking servo pulling signal input (“L” active)
32
STATE
I
Status signal input
33
VSS1
Ground
34
VIB.
I/O
Vibration lens input/output
35
CDM-ON
O
CD machanism power control output
36
AMPMUT
O
Power amplifier mute control output
37
A-MUT
O
Audio mute control output
38
AD-ON
O
Power control output for A/D conversion.
39
PW-SEL
O
Not used in this set.
40
NOSESW
I
Front panel attachment detection input
41
TEST
I
Test mode direct setting input
42
TELMUT
O
Not used in this set.
43
ACCIN
I
Accessory power supply voltage detection input
44
VOLCE
O
Electric volume serial chip enable output
45
VOLSO
O
Electric volume serial data output
46
BEEP
O
Beep output
47
TUNON
O
Tuner ON output
48
FMON
O
FM ON output
49
PLLCE
O
PLL chip enable output
50
VOLCKO
O
Electric volume serial clock output
51
PLLSO
O
PLL data output
SECTION 3
DIAGRAMS
Pin No.
Pin Name
I/O
Pin Description
52
PLLCKO
O
PLL clock output
53
PLLSI
I
PLL data input
54
AMON
O
AM ON output
55
Not used in this set.
56
FMST
I/O
ST-IND indication input/Forced Monaural output
57
SW4
I
Switch 4 input (“L” active)
58
SW3
I
Switch 3 input (“L” active)
59
SW1
I
Switch 1 input (“L” active)
60
RESET
I
System reset input
61
SIRCS
I
Remote commander input
62
KEYACK
I
Key input acknowledge
63
BUIN
I
Backup power supply detection input
64
BLKCK
I
Sub code block clock signal input (interruption)
65
SW2
I
Switch 2 input (“L” active)
66
FCLK
I
Latch input for error correction result read-in. (interruption)
67
VSS0
Ground
68
VDD1
Power supply pin (+5 V)
69
X2
Main system clock output (5 MHz)
70
X1
Main system clock input (5 MHz)
71
VPP
Internal connection
72
XT2
Sub system clock output (32.768 kHz)
73
XT1
Sub system clock input (32.768 kHz)
74
VDD0
Power supply pin (+5 V)
75
AVREF0
Analog reference voltage input
76
KEYIN0
I
Key input 0
77
KEYIN1
I
Key input 1
78
S-METER
I
AM/FM S-meter voltage detection input
79
SD-IN
I
Signal detector input
80
LCDINH
O
LCD blank indication control output
12
12
3-2. BLOCK DIAGRAM — MAIN SECTION —
CDX-1300/3800/3900
12
22
4
44
73
1
9
2
27
23
22
19
16
18
12
32
75
33
34
37
58
35
39
59
18
17
15
14
28
13
12
11
10
9
8
26
24
21
22
7
65
63
56
15
17
13
24
25
38
36
40
31
30
28
4
5
26
PDA
ARF
ARF
FE
TE
RFENV
TRCRS
VDET
BDO
RF-DET
OFT
LDON
TBAL
FBAL
FOD
27 TRD
KICK
TVD
TRV
ECM
L OUT
R OUT
X1
VREF
X2
RST
46
BEEP
37
A MUT
36
AMP MUT
26
PW ON
44
CE
45
SO
50
CKO
41
TEST
43
ACC IN
63
BU IN
LO/DX
AM CP
VT
FM CP
FM IN
FM IN
OSC OUT
IFC R
IFC IN
CE
BATT
BATT
R-CH
P ON+B
BATT
BATT
R-CH
R-CH
DIN
CLK
DOUT
XTOUT
XTIN
FM+B
AM+B
+B (FM/AM)
MONO/ST
SD (AM/FM)
S-METER
49
CE
51
SO
52
CKO
53
3
4
5
6
1
24
13
11
2
16
15
18
19
20
10
SI
78
S-METER
79
SD IN
56
FM ST
48
FM ON
COM8V
54
AM ON
47
TU ON
STAT
SUBQ
SQCK
BLKCK
TLOCK
FLOCK
SENSE
RST
STATE
SUBQ
SQCK
BLKCK
TLOCK
FLOCK
SENS
MLD
MDATA
MCLK
FLAG
FCLK
SBCK
VIB
FOUT
ROUT
LIMSW
SW4
SW3
SW2
X2
TU8V
X1
XT2
XT1
CDM ON
CDON
MLD
MDATA
MCLK
FLAG
FCLK
SBCK
FE
TE
ENV
CROSS
VDET
BDO
NRFDET
OFTR
LDON
TBAL
FBAL
PDB
PDE
PDF
LPD
LD
VREF
15
26
16
17
18
23
6
3
10
9
28
1
22
32
8
10
64
31
30
29
3
2
1
28
66
19
23
34
69
70
65
58
57
27
24
FO
DRIVE
TR
DRIVE
SLED
MOTOR
DRIVE
SP
MOTOR
DRIVE
LD
DRIVE
Q101
LOAD
MOTOR
DRIVE
14
13
12
11
SW2
SW3
SW4
SW5
72
73
35
25
M102
(SLED)
M101
(SPINDLE)
M103
(LOADING)
NB
NA
E
F
LPD
LD
F+
F-
T+
T-
25 ECS
M
ACC/BATT
CHECK
Q507
BATT
CHECK
Q510
18 17 16
20
21
11
36
37
38
4
15
12
17
5
6
13
20
18
19
21
9
10
8
AMDET
1
AM
2
FM
L OUT
R OUT
VCO (FM/AM)
XTAL IN
IFC-O/SEEK/RE
LO/DX
VT (FM/AM)
POWER
CONTROL
Q702
POWER
CONTROL
Q703
POWER
CONTROL
Q701
POWER
CONTROL
Q704,705
POWER
CONTROL
Q502(2/2),505
POWER
CONTROL
Q501,502(1/2)
MUTE
CONTROL
Q550,551
SHUTDOWN
MUTE
Q516
CE
DI
CLK
VOL/
TONE
FADER
9
7
5
3
5V REG
Q509,517
8V REG
Q512,513
5V REG
Q514,515
8V REG
Q511
BU5V
COM8V
CD8V
CD5V
04
J701
(ANTENNA)
BATT
BATT
BATT
PON+B
X600
5.0MHz
X700
10.25MHz
X101
16.93MHz
X601
32.768kHz
VOL
PLL
LR
LF
ELECTRIC VOLUME
IC400
R-CH
SYSTEM CONTROL
IC600 (1/2)
OPTICAL
PICK-UP
RF AMP
IC102
DIGITAL SIGNAL/
SERVO PROCESSOR
IC101
TUNER UNIT
TU700
PLL
IC700
Q402
(1/2)
Q402
(2/2)
Q401
(1/2)
MUTE
POWER AMP
IC500
STBY
PON+B
BATT
F901
R-CH
CNP500
CNP400
2
-2
-1
AUDIO OUT
REAR
1
9
3
11
4
12
16
6
15
5
7
10
REAR L(–)
R
REAR L(+)
REAR R(–)
REAR R(+)
FRONT R(–)
FRONT R(+)
BATT
ANT REM
AMP REM
TEST
ACC
FRONT L(–)
FRONT L(+)
L
R-CH
BU5V
TU5V
MOTOR DRIVE
IC103
(LIMIT)
DISC
IN1
(      )
DISC
IN2
(      )
CHUCKING
DET
(            )
• Signal path
            : FM
            : AM
            : CD
 
M
M
Page of 32
Display

Click on the first or last page to see other CDX-1300 / CDX-3800 / CDX-3900 service manuals if exist.