Sony CDX-1150 Service Manual ▷ View online
– 21 –
– 22 –
CDX-1150
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
%
: indicates tolerance.
•
C
: panel designation.
•
U
: B+ Line.
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
<
no mark : FM
<
> : CD PLAY
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
F
: FM
f
: AM
J
: CD
3-5. SCHEMATIC DIAGRAM — MAIN SECTION (2/3) — • Refer to page 30 for IC Block Diagrams.
(Page 24)
(Page 20)
CDX-1150
– 23 –
– 24 –
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
¢
: internal component.
•
U
: B+ Line.
3-6. SCHEMATIC DIAGRAM — MAIN SECTION (3/3) — • Refer to page 30 for IC Block Diagrams.
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
(
no mark : FM
(
) : AM
<
> : CD PLAY
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Signal path.
F
: FM
f
: AM
(Page 20)
(Page 21)
(Page 25)
– 25 –
– 26 –
CDX-1150
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
•
%
: indicates tolerance.
•
C
: panel designation.
•
U
: B+ Line.
3-7. SCHEMATIC DIAGRAM — DISPLAY SECTION —
(Page 24)
• Power voltage is dc 14.4V and fed with regulated dc power
supply from ACC and BATT cords.
• Voltage is dc with respect to ground under no-signal
(detuned) condition.
no mark : FM
no mark : FM
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
PL801
PL802
CDX-1150
– 27 –
– 28 –
Note:
•
®
: Through hole.
• b
: Pattern from the side which enables seeing.
(The other layer’s patterns are not indicated.)
Caution:
Pattern face side: Parts on the pattern face side seen from the
(Side B)
Pattern face side: Parts on the pattern face side seen from the
(Side B)
pattern face are indicated.
Parts face side: Parts on the parts face side seen from the
(Side A)
(Side A)
parts face are indicated.
3-8. PRINTED WIRING BOARD — DISPLAY SECTION —
(Page 17)
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