Sony ZS-X3CP Service Manual ▷ View online
ZS-X3CP
33
33
5-15. SCHEMATIC DIAGRAM – AUDIO/POWER Section –
Ver 1.2
Q301
C314
C103
C313
R117
R308
C115
C102
C114
R104
R105
R116
Q203
Q103
C214
R204
R205
C215
C323
D303
R106
R107
C104
Q104
Q204
C316
C315
R309
C206
C106
R209
R109
R108
C317
R312
Q105
Q205
R208
C105
R110
C205
R210
C207
C208
C319
C107
C108
R212
C209
R310
R112
C109
C111
C110
R113
C112
C213
C113
CN302
CNP302
CN303
CNP901
C210
R213
C211
C212
R114
R118
R119
R214
R218
R219
C101
C201
C312
R307
C320
C321
R217
R216
IC301
C204
R206
R207
D302
C322
C310
C308
R305
R306
C309
C306
R304
D301
C305
C304
R303
Q303
Q304
Q302
R301
C301
D101
D201
R215
R115
L101
L201
CNP301
C202
C203
IC302
J301
J901
L301
R302
Q305
Q306
C901
CN303
SP2
SP1
F901
D901
L901
KTA1271
0.01
1 50V
47 10V
1k
150
220p
1 50V
470p
47k
1k
470
KTC3198GR-AT
KTC3198GR-AT
470p
47k
1k
220p
100
10V
10V
1SS133T-77
1k
6.8k
4700p
DTC343TKA-T146
DTC343TKA-T146
47
50V
0.1
47k
1 50V
1 50V
1k
1k
470
22
50V
470k
KTC3198GR-AT
KTC3198GR-AT
470
0.47
50V
47k
0.47
50V
47k
47
10V
2200p
220
10V
47
10V
2200p
100
100p
47
100
100p
220
10V
10V
0.022
2.2
2200
10V
0.33
50V
0.33
50V
4P
4P
8P
3P
0.022
2.2
220
10V
2200
10V
3.3k
1k
470
3.3k
1k
470
4.7
50V
50V
4.7
50V
50V
100
10V
10V
150
100p
100p
1k
470
M62429P
4700p
1k
6.8k
MTZJ-T-77
-6.8B
100
10V
10V
22
50V
0.01
150
150
0.01
0.01
47
MTZJ-T-77
-3.9B
220
10V
10V
0.01
220
KRA107M-AT
KTC2026
KRC107M-AT
47k
2200
16V
1SS133T
-77
1SS133T
-77
100
100
18P
1
50V
1
50V
BA5417
1k
KTC2026
KTC3203Y-AT
0.1
8P
IN4002-B
∗
V-DATA
V-CLK
M.B-CONT
A-MUTE
P-CON
A-GND
CD/P-GND
AU6.2V
S-GND
CD/D-GND
SW-9V
CD-3.3V
BACK-UP
VM
CD-SW
L-CH
R-CH
CD/P-GND
(L-CH)
(R-CH)
DC IN 9V
DRY BATTERY
SIZE"D"
(IEC DESIGNATION)
6PCS. 9V
POWER AMP
MUTING
MUTING
Q105,205
MEGA BASS
CONTROL
Q301,302
B+ SWITCH
Q303,304
+3.3V REGULATOR
REGULATOR
+6.2V
REGULATOR
+6.2V
ELECTRICAL
VOLUME
AF AMP
AF AMP
F901
∗
(US,CND)
(AEP,UK)
0.47
µ
H
0.47
µ
H
1
µ
H
100
µ
H
WP901
FB301
1.1
1.1
µ
H
CN901
3P
FB901 1.1
µ
H
FB902
1.1
1.1
µ
H
2A 125V
2A 250V
(Page 31)
ZS-X3CP
34
34
• IC Block Diagrams
– CDMP3 Board –
– CDMP3 Board –
IC701
LC78645YE-US-E
IC702
BA5826FP-E2
– TUNER Board –
IC1
TA2149N
IC2
LC72137M-TLM
AUDIO
OUT
+
–
+
–
+
–
+
–
–
+
–
–
+
–
–
+
–
–
PLL VCEC
CLV, CAV
CONTROL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80
79
78 77 76 75 74 73
72 71 70
69 68
67
66
65 64 63 62 61
21 22 23
24
25
26
27
28 29 30
31 32
33
34
35
36
37 38 39 40
SLICE LEVEL
CONTROL
APC
LEVEL SET
MIX
EQ
AGC
LPF
TBAL
TBAL
+
BH
SW
PH
+
–
–
+
LPF
LPF
AUTO
ADJUST
MONITOR
CONTROL
CONTROL
JITTER
DETECT
A/D
S/H
D/A
SW
GENERAL-PURPOSE
PORTS
MONITOR SIGNAL SELECTOR
SERVO
PROCESSOR
SUBCODE
DECODE CRC
FRAME SYNC
DETECT,
PROTECT INSERT,
EFM DECODE
DRF
COMMAND INTERFACE
RUPTURE
DEFECT
TRACK
JUMP
INTERPOLATION
MUTE
ATTENUATION
DEEMPHASIS
LPF
1BIT DAC
8FS
DIGITAL FILTER
ERROR
CORRECTION
AUDIO CD
C1-2, C2-2
RAM
CLOCK
GENERATOR
EXTERNAL
AUDIO IN
SERIAL
OUT
LDD
LDS
FR
VVDD
PCKIST
VVSS
PDO2
PDO1
CONT1
CONT2
CONT3
VSS
VDD5V
DRF
*
RES
*
WRQ
DO
DI
CL
CE
DATA
DATACK
LRSY
ASDFIN
ASDACK
ASLRCK
16MOUT
EFLG
C2F
XVSS
FSX/16MIN
XIN
XOUT
XVDD
RVDD
RCHO
RVSS
LVSS
LCHO
LVDD
TEST
DOUT
VDD
VSS
MONI5
MONI4
MONI3
MONI2
MONI1
FSEQ
V/
*
P
DEFECT
SBCK/FG
SBCK/CONT6
CONT5
CONT4
GPDAC
SLDO
SPDO
FDO
TDO
ADAVSS
ADAVDD
JITTC
RFMON
TE
TEC
FE
REF1
VREF
TIN2
TIN1
FIN2
FIN1
RFVSS
RFVDD
RF
EFMIN
SLCIST
SLCO
+
–
+
–
RAM
20
29
28
30
+
–
LEVEL SHIFT
28
27
26
25
24
22
21
20
19
18
17
16
+
–
LEVEL SHIFT
+
–
VCC
VCC
+
–
–
LEVEL SHIFT
+
–
–
LEVEL SHIFT
1
2
3 4 5 6
7 8
9 10
11
12 13
14
REGULATOR
BIAS, T. S. D
BIAS, T. S. D
MONITOR
+
–
DRIVER
MUTE
+
–
15
23
NC
GND
OUT4-B
OUT4-A
IN4
IN4
,
VREF I
N
VCC
VCC
IN3
,
IN3
OUT3-A
OUT3-B
NC
OPIN-B
OPOUT
GND
OUT2-B
OUT2-A
IN2
IN2
,
GND
MUTE
REGOUT
REG-B
RESET
IN1
OUT1-B
OUT1-A
RF GND
3
2
1
IF REQ
AM
MIX
FM RFIN
AM LOW CUT
5
4
MIX OUT
VCC
AM IF IN
8
7
6
FM IF IN
GND
10
9
AGC
QUAD
12
11
R-OUT
L-OUT
FM RFOUT
22
23
24
20
21
17
18
19
15
16
13
14
AM RFIN
RF VCC
FM OSC
ST LED
OSC OUT
AM OSC
IF REQ
LPF1
MPX IN
DET OUT
LPF2
FM
MIX
FM
OSC
LEVEL
DET
AM
DET
MUTE
FM
DET
ST/MO
FM/AM
AM
OSC
AGC
SW
ST
1/8
BUFF
BUFF
DIVIDE
DECODE
VCO
IF BUFF
AF BUFF
AF
FM RF
AM IF
FM IF
1/1 OR
1/16
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
19
20
UNLOCK
DETECTOR
POWER ON
RESET
UNIVERSAL
COUNTER
CCB
I/F
CE
DI
CL
DO
XOUT
AOUT
XIN
AIN
PD
VSS
VDD
B04
FMIN
AMIN
B01
B02
B03
I01
I02
IFIN
PHASE
DETECTOR
CHARGE
PUMP
REFERENCE
DIVIDER
SWALLOW
COUNTER
1/16,1/17
4BITS
12BITS
PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER
LATCH
1/2
17
18
35
ZS-X3CP
5-16.
IC PIN FUNCTION DESCRIPTION
•
CDMP3 BOARD IC703 LC78683E-US-E (MP3 DECODER, CD-ROM DECODER, ANTI-SHOCK CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
LRSY
I
CD decode L/R sampling clock signal (44.1 kHz) input
2
ADDATA
O
Audio data output
3
ADBCK
O
Audio bit clock signal (2.8224 MHz) output
4
ADLRCK
O
Audio L/R sampling clock signal (44.1 kHz) output
5
C2FIN
I
CD C2 error flag input
6
TEST1
I
Not used
7
CKIN
I
System clock signal input (16.9344 MHz) terminal
8
VSS
—
Ground terminal
9
CKOUT
O
Clock (384 Fs) signal output for the exteranak DF/DAC
10
TEST2
I
Not used
11
DVDD1
—
Power supply terminal (+3.2V) (digital system) (for I/O)
12
PW
I
CD subcode data serial input
13
SBSY
I
CD subcode block sync signal input
14
SFSY
I
CD subcode frame sync signal input
15
SBCK
O
CD subcode transfer serial clock signal output
16
AVDD
—
Power supply terminal (+3.2V) (analog system) (for PLL)
17
VPRFR
—
VCO oscillation range setting terminal
18
VCOC
I
VCO control voltage input
19
VPDO
O
VCO charge pump output
20
AVSS
—
Ground terminal (analog system)
21
DVDD2
—
Power supply terminal (+3.2V) (digital system)
22
VSS
—
Ground terminal
23 to 30
MDATA0 to
MDATA7
I/O
Two-way data bus terminal for D-RAM
31
DVDD3
—
Power supply terminal (+3.2V) (digital system) (for I/O)
32
VSS
—
Ground terminal
33 to 40
MDATA8 to
MDATA15
I/O
Two-way data bus terminal for D-RAM
41
RASB
O
Row address strobe signal output “L”: active
42
WEB
O
Data write enable signal output “L”: active
43
CASLB
O
Column address strobe signal output for lower byte “L”: active
44
CASUB
O
Column address strobe signal output for upper byte “L”: active
45
OEB
O
Output enable signal output “L” active
46 to 49
MADRS12 to
MADRAS9
O
Address signal output terminal for D-RAM Not used
50
MADRAS8
O
Address signal output terminal for D-RAM
51
DVDD4
—
Power supply terminal (+3.2V) (digital system) (for I/O)
52
VSS
—
Ground terminal
53 to 60
MADRS7 to
MADRS0
O
Address signal output terminal for D-RAM
61
DVDD5
—
Power supply terminal (+3.2V) (digital system) (for the internal logic)
62
VSS
—
Ground terminal
63
STREQIO
I/O
MP3 data request flag input/output
64
STCKIO
I/O
MP3 data transfer clock signal input/output
65
STDATIO
I/O
MP3 data input/output
66
FSYNC
O
MP3 frame synchronizing signal output
36
ZS-X3CP
Pin No.
Pin Name
I/O
Description
67
CRCF
O
CD-ROM CRC flag output terminal
68
DVDD6
—
Power supply terminal (+3.2V) (digital system) (for I/O)
S
VSS
—
Ground terminal
70
WOK
I
MP3 data request signal input terminal
71
CNTOK
O
MP3 serial data output terminal
72
OVF
O
MP3 serial data transfer clock signal output terminal
73
CMDOUT
O
Command serial data output
74
CMDIN
I
Command serial data input
75
CL
I
Command serial data transfer clock signal input
76
CE
I
Command enable signal input “H”: active
77
INTB
O
Interrupt request signal output “L”: active
78
RESB
I
MP3 system reset signal input “L”: reset
79
DATAIN
I
CD serial data input
80
DATACK
I
CD bit clock signal input
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