Sony ZS-D50 (serv.man2) Service Manual ▷ View online
– 17 –
Adjustment Location :
L3 – 2 : LW Tracking Adjustment
CT1 : FM Tracking Adjustment
L1 : FM Tracking Adjustment
L3 – 1 : MW Tracking Adjustment
CT5 : LW Tracking Adjustment
CT4 : MW Tracking Adjustment
L2 : FM Frequency Coverage Adjustment
CT3 : LW Frequency Coverage Adjustment
CT2 : MW Frequency
Coverage Adjustment
Coverage Adjustment
L4 : MW Frequency
Coverage Adjustment
Coverage Adjustment
CFT1 : MW/LW IF Adjustment
[TUNER BOARD] (SIDE A)
– 18 –
Pin No.
Pin name
I/O
Description
1
C-SOR
I
CD DSP command data input.
2
NC
–
Not used (“L” level).
3
RMC
I
Remote control signal input.
4
R-MUTE
O
Tuner mute signal output.
5
C-XRST
O
CD system reset output.
6
REG-CHK
I
Regulator voltage check input.
7
C-SENSE 2
I
CD-SENSE input.
8
C-CLK
O
CD DSP command clock output.
9
C-DATA
O
CD DSP command data output.
10
C-SENSE 1
I
CD SENSE input.
11
C-SQCK
O
CD SUB-Q read out clock output.
12
C-SQSO
I
CD-SQSO data input.
13
C-MUTE
O
Mute signal output for DSP (IC702).
14
NC
–
Not used (OPEN).
15
R-DATA
O
PLL IC data output.
16
R-CLK
O
PLL IC clock output.
17
R-CE
O
PLL IC chip enable output.
18
R-COUNT
I
PLL IC data input.
19
P-CONT
O
POWER ON/OFF control output.
20
PL-CONT
O
Plunger ON/OFF control output.
––––––––––––––––––––––––
21
HALF (M/D)
I
Cassette half detect input.
––––––––––––––––––––––––––
22
T-HEAD POS
I
Head position detect input.
23
REC
O
REC bias ON/OFF control output.
24
PROOF (A)
I
Half pawl input at A-side.
25
PROOF (B)
I
Half pawl input at B-side.
26
AMS/INIT
I
TC AMS signal input/Initial terminal.
27
R-SHIFT
O
System clock shift output.
28
INPUT 1
O
Loading motor control output.
29
INPUT 2
O
Loading motor control output.
30
CD-OP/CL
I
CD tray open/close detect input.
31
KEY 1
I
Key input terminal.
32
KEY 2
I
Key input terminal.
33
KEY 3
I
Key input terminal.
34
KEY 4
I
Key input terminal.
35
KEY 5
I
Key input terminal.
36
MO9V-CHK
I
Motor power supply voltage check.
37
MODEL ID
I
Model destination setting input.
–––––––––––––––
38
RESET
I
System Reset terminal.
39
OSC-OUT
O
System clock oscillator output (4.21MHz).
40
OSC-IN
I
System clock oscillator input (4.21MHz).
41
GND
–
Ground terminal.
42
NC
–
Not used (OPEN).
43
NC
–
Not used (Ground).
44
V REF
I
Reference voltage input.
45
GND
–
Ground terminal.
SECTION 6
DIAGRAMS
6-1. EXPLANATION OF IC TERMINALS
IC801 CXP83232A-010Q (SYSTEM CONTROL) CD/SYSTEM BOARD
– 19 –
Pin No.
Pin name
I/O
Description
46
VDDL
O
LCD drive bias control output.
47
VDD3
O
LCD drive bias power supply.
48
VDD2
O
LCD drive bias power supply.
49
VDD1
O
LCD drive bias power supply.
50
COM0
O
LCD common output.
51
COM1
O
LCD common output.
52
COM2
O
LCD common output.
53
COM3
O
LCD common output.
54 – 79
SEG0–SEG25
O
LCD segment output.
80
NC
–
Not used (OPEN).
81
NC
–
Not used (OPEN).
82
NC
–
Not used (OPEN).
–––––––––––––––––––––
83
B/L-CONT
O
Back-light ON/OFF control output.
84
LINE
O
Function output for LINE.
85
TAPE
O
Function output for TAPE
–––––––––––––––
86
RADIO
O
Function output for RADIO
87
T-MOTOR-CONT
O
Motor control signal output.
88
X-LAT
O
CD DSP command lach output.
89
VDD
–
Power supply.
90
NC
–
Not used (connect to VDD).
91
GND
–
Ground.
92
CLK OUT
O
Sub system clock oscillator (32.768kHz).
93
CLK IN
I
Sub system clock oscillator (32.768kHz).
94
CD
O
Function output for CD.
95
A-MUTE
O
Audio mute signal output.
96
VR-DATA
O
Volume clock output.
97
VR-CLK
O
Volume clock output.
98
VR-CE
O
Volume enable output.
99
WP
I
Wake-up signal input.
100
TAPE END
I
Tape end detect input.
– 20 –
– 22 –
– 21 –
ZS-D50
6-2. BLOCK DIAGRAMS (TAPE, MAIN SECTION)
• Signal path.
F
: FM
E
: PB (L-CH)
a
: REC (L-CH)
J
: CD
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