Sony STR-DE997 Service Manual ▷ View online
49
STR-DE997
IC3701 CXA2199Q (VIDEO BOARD (2/2))
IC2103 NJM2145D (S-VIDEO BOARD)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
INH
INH
INPUT
CIRCUIT
OUTPUT
CIRCUIT
CIRCUIT
OUTPUT
CIRCUIT
CIRCUIT
OUTPUT
CIRCUIT
CIRCUIT
VCC
OUT1
IN4
IN3
IN2
OUT3-1
OUT3-2
OUT3-3
GND
INH1
INH2
IN1
NC
OUT2-1
OUT2-2
OUT2-3
39
37
36
15
40
CLAMP
IREF
1/32
DET SW
COLOR
CHROMA
DET
H. SYNC
SEP
PHASE
DET
I
2
C BUS
DECORDER
32fH
VCO
NT/PAL
PAL ID
FF
ID AXIS
HUE
SECAM
LPF
BST AMP
TOT
DELAY
DEM
AXIS
AXIS
PHASE
SHIFT
CHROMA
VCO
PHASE
DET
ACC
DET
DET
COLOR
KILLER
KILLER
4.43/3.58
SW
LOCK
AFCH
EXT COLOR
NT/PAL
NT/PAL
COLOR
2fH
TRAP ON
X' TAL PIN
KILLER
TOT ON
SUB COLOR
SUB HUE
HUE
NT/PAL
2fH
38
31
DELAY
SHARPNESS
PRE
OVER
OVER
SHP f0
SHARPNESS
CLAMP
AUTO
PEDESTAL
TRAP
SECAM
TRAP
SUB
CONT
SUB CONT
VIDEO
SW
CV/YC
34
32
33
35
V. SYNC
SEP
V COUNT
DOWN
C MODE
50/60
14
16
17
V PED
U PED
20
19
18
Y DRIVE
V PED
U PED
Y DRIVE
13
12
11
V2 DRIVE
V2 PED
V2 PED
V2 DRIVE
U2 DRIVE
U2 PED
U2 PED
U2 DRIVE
Y2 DRIVE
Y2 DRIVE
ABL
ABL CENT
H. DRIVE
−
DELAY
H SYNC
SDA
SCL
V HOLD
V SYNC
S GND
CVBS/Y IN
C IN
A PED
ADRS
B-Y OUT
R-Y OUT
B-Y IN
R-Y IN
SVCC
APC
X NTSC
X 3.58
X 4.43/3.58
SECAM REF
4
2
1
3
5
6
7
8
9
10
IREF
AFC
CERA
JVCC
J GND
V2 OUT
U2 OUT
Y2 OUT
ABLFILIN
CP IN
24
23
22 21
25
29
26
27
28
30
H TIM
V TIM
SCP
SGND2
V OUT
U OUT
Y OUT
V2 IN
U2 IN
Y2 IN
ACC
50
STR-DE997
• IC Pin Descriptions
IC1501 CXD9718Q (DSP) (DIGITAL Board (2/3))
Pin No.
Pin Name
I/O
Pin Description
1
VSS
—
Ground
2
XRST
I
Reset signal input from SYSTEM CONTROL IC
3
EXTIN
I
Not used (Connect to ground)
4
LRCKI3
I
Not used (Connect to ground)
5
VDDI
I
Power supply pin (+2.6 V)
6
BCKI3
I
Not used (Connect to ground)
7
PLOCK
O
PLL lock signal output for SYSTEM CONTROL IC
8
VSS
—
Ground
9
MCLK1
I
Clock signal input (13.9 MHz)
10
VDDI
I
Power supply pin (+2.6 V)
11
VSS
—
Ground
12
MCLK2
O
Clock signal output (13.9 MHz)
13
MS
I
Not used (Fixed at L)
14
SCKOUT
O
Internal system clock signal output for 2CH/6CH DAC IC
15
LRCKI1
I
Sampling clock signal input from ADC IC
16
VDDE
I
Power supply pin (+3.3 V)
17
BCKI1
I
Bit clock signal input from ADC IC
18
SDI1
I
Audio IF data input from ADC IC
19
LRCKO
O
Sampling clock signal output for 2CH/6CH DAC IC
20
BCKO
O
Bit clock signal output for 2CH/6CH DAC IC
21
VSS
—
Ground
22
KFSIO
I/O
Audio clock signal (384fs/256fs) input/output for DIR IC
23 to 25
SDO1 to SDO3
O
Digital audio serial data output for 6CH DAC IC
26
SDO4
O
Digital audio serial data output for 2CH DAC IC
27
SPDIF
O
Not used (Open)
28
LRCKI2
I
Sampling clock signal input from ADC IC
29
BCKI2
I
Bit clock signal input from ADC IC
30
SDI2
I
Digital audio serial data input from DIR IC
31
VSS
—
Ground
32
HACN
O
Acknowledge signal output for SYSTEM CONTROL IC
33
HDIN
I
Serial data input from SYSTEM CONTROL IC
34
HCLK
I
Clock signal input from SYSTEM CONTROL IC
35
HDOUT
O
Serial data output for SYSTEM CONTROL IC
36
HCS
I
Chip select signal input from SYSTEM CONTROL IC
37
GP12
I
GP12 signal input from SYSTEM CONTROL IC
38, 39
GP13, GP14
O
Not used (Open)
40
VDDI
I
Power supply pin (+2.6 V)
41
VSS
—
Ground
42
GP15
O
Not used (Open)
43
OE0
O
Not used (Open)
44
CS0
O
External memory chip select signal output for D/A converter IC (SDRAM)
45
WE0
O
SDRAM write enable signal output for D/A converter IC (SDRAM)
46
VDDE
I
Power supply pin (+3.3 V)
47
WMD1
I
Not used (Fixed at H)
48
VSS
—
Ground
49
WMD0
I
Not used (Fixed at H)
50
PAGE2
O
Not used (Open)
51
VSS
—
Ground
52, 53
PAGE1, PAGE0
O
Not used (Open)
54
BOOT
I
Not used (Connect to ground)
55
TST1
O
Not used (Open)
51
STR-DE997
Pin No.
Pin Name
I/O
Pin Description
56
BST
I
Boot stop signal input from SYSTEM CONTROL IC
57
MOD1
I
Operation mode signal input (L: 386fs, H: 256fs) (Fixed at H)
58
MOD0
I
Operation mode signal input (L: single chip mode, H: use prohibited) (Fixed at L)
59
EXLOCK
I
Error detection signal input from DIR IC
60
VDDI
I
Power supply pin (+2.6 V)
61
VSS
—
Ground
62, 63
A17, A16
O
Not used (Open)
64 to 66
A15 to A13
O
External memory address signal output for D/A converter IC (SDRAM)
67
GP10
O
Not used (Open)
68
GP9
O
GP9 signal output for SYSTEM CONTROL IC
69
GP8
I
Audio signal input from DIR IC
70
VDDI
I
Power supply pin (+2.6 V)
71
VSS
—
Ground
72 to 75
D15/GP7 to D12/GP4
I/O
External memory data input/output for D/A converter IC (general port)
76
VDDE
I
Power supply pin (+3.3 V)
77 to 80
D11/GP3 to D8/GP0
I/O
External memory data input/output for D/A converter IC (general port)
81
VSS
—
Ground
82
A9
O
External memory address signal output for D/A converter IC (SDRAM)
83 to 85
A12 to A10
O
External memory address signal output for D/A converter IC (SDRAM)
86
TDO
O
Not used (Fixed at H)
87
TMS
I
Not used (Fixed at H)
88
XTRST
I
Not used (Fixed at H)
89
TCK
I
Not used (Fixed at H)
90
TDI
I
Not used (Fixed at H)
91
VSS
—
Ground
92 to 97
A8 to A3
O
External memory address signal output for D/A converter IC (SDRAM)
98, 99
D7, D6
I/O
External memory data input/output for D/A converter IC (SDRAM)
100
VDDI
I
Power supply pin (+2.6 V)
101
VSS
—
Ground
102 to 105
D5 to D2
I/O
External memory data input/output for D/A converter IC (SDRAM)
106
VDDE
I
Power supply pin (+3.3 V)
107, 108
D1, D0
I/O
External memory data input/output for D/A converter IC (SDRAM)
109, 110
A2, A1
O
External memory address signal output for D/A converter IC (SDRAM)
111
VSS
—
Ground
112
A0
O
External memory address signal output for D/A converter IC (SDRAM)
113
PM
I
PLL initialization signal input from SYSTEM CONTROL IC
114, 115
SDI3, SDI4
I
Not used (Open)
116
SYNC
I
Sync/async select signal input (L: sync, H: async) (Fixed at H)
117
TST2
I
Not used (Connect to ground)
118
GP11
I
Not used (Connect to ground)
119
TST3
I
Not used (Connect to ground)
120
VDDI
I
Power supply pin (+2.6 V)
52
STR-DE997
IC1101 MB91154PFV-G-119-BNDE1 (SYSTEM CONTROL) (DIGITAL Board (3/3))
Pin No.
Pin Name
I/O
Pin Description
1
[7.1_DAT]
O
MULTI CH IN DATA
2
[7.1_CLK]
O
MULTI CH IN CLOCK
3
[006_LAT]
O
TC9273_006 LATCH
4
[011_LAT]
O
TC9273_011 LATCH
5
SUB-T
O
SUB TRANSFORMER VOLT O/P
6 to 8
NO_USE
—
Not used (Fixed at L)
9
VSS
—
Ground
10
FUNCTION_JOG_1B
I
FUNCTION JOG 1B
11
FUNCTION_JOG_1A
I
FUNCTION JOG 1A
12
CURSOR_JOG_3B
I
CURSOR JOG 3B
13
CURSOR_JOG_3A
I
CURSOR JOG 3A
14
MENU_JOG_4B
I
MENU JOG 4B
15
MENU_JOG_4A
I
MENU JOG 4A
16
VOL_JOG_2B
I
VOLUME JOG 2B
17
VOL_JOG_2A
I
VOLUME JOG 2A
18
SP_A_RY
O
SPEAKER A RELAY CONTROL
19
SP_B_RY
O
SPEAKER B RELAY CONTROL
20
CENTER_RY
O
CENTER RELAY CONTROL
21
REAR_RY
O
REAR CH RELAY CONTROL
22
WOOFER_RY
O
WOOFER RELAY CONTROL
23
PROTECTOR
I
PROTECTOR CIRCUIT
24
HP_CTRL
I
HP DETECTION SW
25
PW_RY
O
POWER RELAY CONTROL
26
VSS
—
Ground
27
VCC
—
Power supply pin (+3.3 V)
28
TUNER_STEREO
I
TUNER STEREO IN
29
TUNER_AUTO_STOP
I
TUNER AUTO STOP IN
30
TUNER_MUTE
O
TUNER MUTE
31
TUNER_DO
I
TUNER DO
32
T.SERIAL_CLK
O
TUNER SERIAL CLOCK
33
T.DATA
O
TUNER DATA
34
T.LAT
O
TUNER LATCH
35
NO_USE
—
Not used (Fixed at L)
36 to 39
V.SW1 to V.SW4
O
VIDEO SWITCH 1 to 4
40
COMP_SEL2
O
COMPONENT VIDEO SELECT 2
41
2ND_RY
O
2ND ROOM RELAY CONTROL
42
HP_RY
O
HP RELAY CONTROL
43
UPCON_DATA
O
UP CONVERT DATA
44
VSS
—
Ground
45
BRIDGEABLE RY
O
BRIDGEABLE RELAY CONTROL
46
FUSE DETECT
I
Not used (Fixed at H)
47
TC74HCT153_B
O
OPTICAL INPUT SW B
48
TC74HCT153_A
O
OPTICAL INPUT SW A
49
[GP12]
I
DSP1 IC GP12
50, 51
PAGE0,PAGE1
—
Not used (Open)
52
MD2
—
FLASH PROGRAMMING
53
MD1
—
FLASH PROGRAMMING (Fixed at H)
54
MD0
—
FLASH PROGRAMMING
55
RSTX
I
RESET IC
56
VCC
—
Power supply pin (+3.3 V)
57
X1
I
System clock signal input (16.5 MHz)
58
X0
O
System clock signal output (16.5 MHz)
Click on the first or last page to see other STR-DE997 service manuals if exist.