Sony STR-DE925 / STR-V919 (serv.man2) Service Manual ▷ View online
— 59 —
IC102
MB90553PF-G-121-BND (DISPLAY BOARD)
Description
VIDEO 1 VISUAL display data output to LED
VIDEO 2 AUDIO display data output to LED
VIDEO 3 VISUAL display data output to LED
DVD/LD AUDIO display data output to LED
DVD/LD VISUAL display data output to LED
TV/DBS AUDIO display data output to LED
TV/DBS VISUAL display data output to LED
TAPE display data output to LED
MD/DAT display data output to LED
CD display data output to LED
GND (Connected to GND)
Not used. (Connected to GND)
Not used. (Connected to GND)
CURSOR MODE SURROUND display data output to LED
CURSOR MODE EQUIPMENT display data output to LED
CURSOR MODE INDEX display data output to LED
Not used. (Connected to GND)
Not used. (Connected to GND)
UART data output to rewrite flash memory
UART data intput to rewrite flash memory
Clock output to flourescent display tube
Data output to flourescent display tube
Power supply +5 V
Fluorescent latch
Fluorescent clear
SIRCS input
External power regulator capacitor 0.1µ is connected to this terminal.
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
Analog power supply +5 V
AVRH (Connected to power supply +5 V)
SVRL (Connected to GND)
GND (Connected to GND)
Key input 1
Key input 2
Key input 3
Key input 4
GND (Connected to GND)
Key input 5
Key input 6
Version input
Model input
Stop input
Not used (Connected to GND)
MD 0 (To MD0 of MB90574)
MD 1 (Connected to power supply +5 V)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
Pin Name
LED V1
LED V2
LED V3
LED-DVD/LD
LED-TV/DBS
LED-TAPE
LED-MD/DAT
LED-CD
LED-TUNER
LED-PHONO
VSS
—
—
LED SUR
LED EQ
LED INDEX
—
—
SOT0
SIN0
FL CLK
FL DATA
VCC
FL LAT
FL CLEAR
SIRCS IN
C
—
—
—
—
—
—
AVCC
AVRH
AVRL
AVSS
AD KEY IN 1
AD KEY IN 2
AD KEY IN 3
AD KEY IN 4
VSS
AD KEY IN 5
AD KEY IN 6
AD VERSION
AD MODEL
STOP
—
MD 0
MD 1
O
O
O
O
O
O
O
O
O
O
—
—
—
O
O
O
—
—
O
I
O
O
—
O
O
I
—
—
—
—
—
—
—
—
—
—
—
I
I
I
I
—
I
I
I
I
I
—
I
I
— 60 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
Description
Pin Name
MD 2
HSTX
RDS CLOCK
RDS DATA
VOL UP
VOL DOWN
—
U-RESET
U-SREQ
U-MREQ
U-DATA
U-CLOCK
AUBUS-IN
—
—
—
AUBUS-OUT
—
FUNCTION-UP
FUNCTION-DW
—
SP-A
SP-B
POW-KEY IN
—
—
RESET
—
—
—
VSS
X0
X1
VCC
—
—
LED BASS. B
LED VOL
LED SOUND FIELD
LED MUTE
LED EQ ON/OFF
LED DOLBY DIGITAL
MBUS-V1
MBUS-V 2
MBUS-TV
MBUS-STATUS
—
LAT
—
—
I
I
I
I
O
O
—
O
I
O
O
O
I
—
—
—
O
—
I
I
—
I
I
I
—
—
I
—
—
—
—
—
—
—
—
—
O
O
O
O
O
O
I
I
I
I
—
O
—
—
MD 2 (To MD2 of MB90574)
Hardware STANDBY input
RDS clock input
RDS data input
Volume up data output
Volume down data output
Not used (Connected to GND)
Reset output (Connected to MB90574 RESET)
Slave request and data input (Connected to MB90574 SLV DATA/REQ)
Master request output (Connected to MB90574 DISPMR)
Master data output (Connected to MB90574 DISP DATA)
Master clock output (Connected to MB90574 DISPCLK)
Audio bus input
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
Audio bus output
Not used (Connected to GND)
Function encoder up input
Function encoder down input
Not used (Connected to GND)
Speaker A selector switch input
Speaker B selector switch input
Power key input
Not used (Connected to GND)
Not used (Connected to GND)
Reset (Display MCU)
Not used (Connected to GND)
Not used (Connected to GND)
Not used (Connected to GND)
GND (Connected to GND)
External ceramic filter 4 MHz is connected to this terminal
External ceramic filter 4 MHz is connected to this terminal
Power supply +5 V
Not used. (Connected to GND)
Not used. (Connected to GND)
BASS. B display data output to LED
VOLUME display data output to LED
SOUND FIELD display data output to LED
MUTE display data output to LED
EQ ON/OFF display data output to LED
DOLBY/DIGITAL display data output to LED
V1 input from MBUS
V2 input from MBUS
TV input from MBUS
STATUS input from MBUS
Not used. (Connected to GND)
Learning microprocessor latch output
Not used. (Connected to GND)
Not used. (Connected to GND)
— 61 —
3-24. IC BLOCK DIAGRAMS
IC201
NJM2296D (VIDEO BOARD)
IC1403 TC74VHC393FT(EL) (DIGITAL BOARD)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
Q
A
Q
B
Q
C
Q
D
A
CLEAR
VCC
Q
A
Q
B
Q
C
Q
D
A
CLEAR
GND
IC1005 TC74HC151AF (EL) (D. IN/OUT BOARD)
IC1108 MC74HC00AF (DIGITAL BOARD)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3
D2
D1
D0
Y
W
S
C
D4
D5
D6
D7
A
B
D3
D2
D1
D0
Y
XY
OE
GND
V
CC
D4
D5
D6
D7
A
B
C
1
2
3
4
5
6
7
8
14
13
12
11
10
9
IN1
IN1
IN2
IN2
O
UT1
O
UT2
GND
VDD
IN3
IN3
OUT3
IN4
IN4
OUT4
IC1301 CS4926 (DIGITAL BOARD)
9
S5
S6
S7
S4
S1
S2
S3
Vout1
Vout2
Vout3
V-
GND
SW3
SW2
SW1
SW5
SW4
Vin1
Vin2
Vin3
Vin4
Vin5
V+
10
11
12
13
14
15
16
1
5
2
3
4
6
7
8
DATA0,EMAD0,GPIO0
DATA1,EMAD1,GPIO1
DATA2,EMAD2,GPIO2
DATA3,EMAD3,GPIO3
DATA4,EMAD4,GPIO4
DATA5,EMAD5,GPIO5
DATA6,EMAD6,GPIO6
DATA7,EMAD7,GPIO7
VSS2
VDD2
A0,SCCLK
WR,
DS,
EMWR,
GPIO10
MCLK
CLK IN
XMT958
EXTMEM,
GPIO8
PARALLEL
or
SERIAL
HOST
INTERFACE
COMPRESSED
DATA INPUT
INTERFACE
SP DIF
RECEIVER
DIGITAL
AUDIO
INPUT
INTERFACE
PLL
CLOCK
MANAGER
RAM
INPUT BUFFER
RAM
OUTPUT BUFFER
OUTPUT
FORMATTER
30
CMPREQ,LRCKN2
29
CLKSEL
31
FILTD
32
FILTS
33
VDDA
34
VSSA
35
RESET
36
DD
37
DC
38
21
ABOOT
,
INTREQ
20
SCDIO,
SCDOUT
,
PSEL,
GPIO9
19
CMPCLK,
SCLKN2
28
CMPDA
T,
RCV958,
SDA
TAN2
27
LRCKN1
26
SCLKN1,
STCCLK2
25
VSS3
24
VDD3
23
SDA
TAN1
22
CS
18
7
44
SCLK
43
LRCLK
42
AUDA
TA
0
41
AUDA
TA
1
40
AUDA
TA
2
39
4
RD,
R/W
,
EMOE,
GPIO11
5
A1,
SCDIN
6
3
FRAMER SHIFTER
INPUT BUFFER CONTROLLER
17
16
15
14
13
12
11
10
9
8
VSS1
2
VDD1
1
RAM
PROGRAM MEMORY
RAM
DATA MEMORY
ROM
PROGRAM MEMORY
ROM
DATA MEMORY
24-Bit
DSP
PROCESSING
STC
— 62 —
IC1101 CXD8495AQ (DIGITAL BOARD)
TIMING
GENERATOR
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
35
36
34
33
32
31
30
29
28
27
26
25
X' TAL
OSC
MUTING
OUTPUT
OUTPUT
ERROR LOCK
DETECTION
DATA
DEMODULATOR
MICRO COMPUTER
INTERFACE
MULTI PLEXER
TEST
PLL CIRCUIT
CD SUB-CODE
DETECTION
LD/DQSY
SRDT
D0
DI/SWDT
CE/XLAT
CL/SCLK
D VDD
DIN1
DIN2
DIN3
DIN4
DGND
D GND
SBCK
SFSY
PW
SBSY
D VDD
VCO
V IN
A GND
R
A VDD
N.C.
LRCK
DATA OU
T
BCLK
SUB 2
SUB 1
D GND
ERROR
CLK OUT2
CLK OUT1
X OUT
X IN
D VDD
DOUT/V
EMPHA
RC1
RC2
CCB/SUB
D GND
CLKMD
CLK
TEST1
TEST2
X MODE
D VDD
IC901
NJM2103D (REG BOARD)
1
2
3
4
5
6
7
8
V+
VSB/SESIN
VSA
RESET
GND
OUTC
VSC
CR
VREF
+
–
–
+
–
+
–
+
Q
R
S
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