Sony STR-DE697 Service Manual ▷ View online
13
STR-DE697
Pin No.
Pin Name
I/O
Pin Description
56
BST
I
Boot stop signal input from SYSTEM CONTROL IC
57
MOD1
I
Operation mode signal input (L: 386fs, H: 256fs) (Fixed at H)
58
MOD0
I
Operation mode signal input (L: single chip mode, H: use prohibited) (Fixed at L)
59
EXLOCK
I
Error detection signal input from DIR IC
60
VDDI
I
Power supply pin (+2.6 V)
61
VSS
—
Ground
62, 63
A17, A16
O
Not used (Open)
64 to 66
A15 to A13
O
External memory address signal output for D/A converter IC (SRAM)
67
GP10
O
Not used (Open)
68
GP9
O
GP9 signal output for SYSTEM CONTROL IC
69
GP8
I
Audio signal input from DIR IC
70
VDDI
I
Power supply pin (+2.6 V)
71
VSS
—
Ground
72 to 75
D15/GP7 to D12/GP4
I/O
External memory data input/output for D/A converter IC (general port)
76
VDDE
I
Power supply pin (+3.3 V)
77 to 80
D11/GP3 to D8/GP0
I/O
External memory data input/output for D/A converter IC (general port)
81
VSS
—
Ground
82
A9
O
External memory address signal output for D/A converter IC (SRAM)
83 to 85
A12 to A10
O
External memory address signal output for D/A converter IC (SRAM)
86
TDO
O
Not used (Fixed at H)
87
TMS
I
Not used (Fixed at H)
88
XTRST
I
Not used (Fixed at H)
89
TCK
I
Not used (Fixed at H)
90
TDI
I
Not used (Fixed at H)
91
VSS
—
Ground
92 to 97
A8 to A3
O
External memory address signal output for D/A converter IC (SRAM)
98, 99
D7, D6
I/O
External memory data input/output for D/A converter IC (SRAM)
100
VDDI
I
Power supply pin (+2.6 V)
101
VSS
—
Ground
102 to 105
D5 to D2
I/O
External memory data input/output for D/A converter IC (SRAM)
106
VDDE
I
Power supply pin (+3.3 V)
107, 108
D1, D0
I/O
External memory data input/output for D/A converter IC (SRAM)
109, 110
A2, A1
O
External memory address signal output for D/A converter IC (SRAM)
111
VSS
—
Ground
112
A0
O
External memory address signal output for D/A converter IC (SRAM)
113
PM
I
PLL initialization signal input from SYSTEM CONTROL IC
114, 115
SDI3, SDI4
I
Not used (Open)
116
SYNC
I
Sync/async select signal input (L: sync, H: async) (Fixed at H)
117
TST2
I
Not used (Connect to ground)
118
GP11
I
Not used (Connect to ground)
119
TST3
I
Not used (Connect to ground)
120
VDDI
I
Power supply pin (+2.6 V)
14
STR-DE697
• IC1101 MB90478PF-G-183-BND (SYSTEM CONTROL) (DIGITAL Board (3/3))
Pin No.
Pin Name
I/O
Pin Description
1
DATAO
I
Serial data line signal input from DIR IC
2
GP9
I
GP9 signal input from DSP IC
3
BST
O
Boot stop control signal output for DSP IC
4
HCS
O
Chip select signal output for DSP IC
5
HACN
I
Acknowledge signal input from DSP IC
6
XRST
O
Reset signal output for DSP IC
7
PM
O
PLL control signal output for DSP IC
8
GP12
O
GP12 signal output for DSP IC
9
AK5380_PDN
O
Power down signal output for ADC IC
10
AK4355_CSN
O
Chip select signal output for 6CH DAC IC
11
VSS
—
Ground
12
AK4355_PDN
O
Power down signal output for 6CH DAC IC
13
AK4381_PDN
O
Power down signal output for 2CH DAC IC
14
AK4381_CSN
O
Chip select signal output for 2CH DAC IC
15
AK4355_CLK
O
Clock signal output for 2CH/6CH DAC IC
16
IC_CLK
O
Clock signal output for FUNCTION SELECT IC and tuner pack
(VOL_TUNER_TC9273)
17
IC_DATA
O
Serial data signal output for FUNCTION SELECT IC and tuner pack
(VOL_TUNER_TC9273)
18
HDOUT
I
Serial data input from DSP IC
19
HDIN
O
Serial data output for DSP IC
20
HCLK
O
Serial data clock signal output for DSP IC
21
AK4355_CDT1
O
CDT1 signal output for 2CH/6CH DAC IC
22
VOL_LATCH
O
Latch signal output for FUNCTION SELECT IC
23
VCC5
—
Power supply pin (+3.3 V)
24
SYS_MUTE
O
System mute control signal output
25
ANA/DIG
O
Muting and error port signal output
26
FL_CLEAR
O
Not used (Open)
27
FLASH2
—
Flash programming signal output 2
28
FLASH1
—
Flash programming signal output 1
29
ENC_A
I
–/+ (cursor) encoder (+) signal input
30
ENC_B
I
–/+ (cursor) encoder (–) signal input
31, 32
F_A, F_B
—
Not used (Fixed at L)
33
SCL
O
Clock signal output for EEPROM IC
34
SDA
I/O
Serial data input/output for EEPROM IC
35
AVCC
—
Power supply pin (+3.3 V)
36
AVRH
—
Power supply pin (+3.3 V)
37
AVSS
—
Ground
38 to 40
A/D0 to A/D2
I
Key signal input (A/D port)
41
VERSION
I
Destination detection signal input
(Fixed at L: US, Canadian model, H: Except for US, Canadian model)
42
VSS
—
Ground
43
RDS_SIG
I
RDS signal level input (AEP, UK model only)
44
MODEL
I
Model detection signal input
45
VOL_ENC (A)
I
Volume encoder (+) signal input
46
VOL_ENC (B)
I
Volume encoder (–) signal input
47
BLUE_LED
O
LED (MULTI CHANNEL DECODING) driver signal output
48
STOP
I
AC off detection signal input
49
MOD0
—
Selection of micon operation mode
50
MOD1
—
Not used (Connect to AVCC)
51
MOD2
—
Selection of micon operation mode
52
RDS_CLK
I
RDS data clock signal input (AEP, UK model only)
STR-DE697
15
15
4-2. CIRCUIT BOARDS LOCATION
Pin No.
Pin Name
I/O
Pin Description
53
RDS_DATA
I
RDS data input (AEP, UK model only)
54
SIRCS
I
SIRCS signal input
55
HP_DETECT
I
Headphones detection signal input
56
POWER_KEY
I
Power key detection signal input
57
FL_LAT
O
Latch signal output for FL driver IC
58
POWER_RY
O
Power relay driver control signal output
59
FL_DATA
O
Serial data output for FL driver IC
60
FL_CLK
O
Clock signal output for FL driver IC
61
PROTECTOR
I
Protector detection signal input
62
HP_RY
O
Headphones relay driver control signal output
63
FUSE_DETECT
I
Fuse open detection signal input
64
A1_OUT
O
CTRL A1 II signal output (Except for AEP, UK model)
65
A1_IN
I
CTRL A1 II signal input (Except for AEP, UK model)
66
FRONT_RY
O
Front speaker A relay driver control signal output
67
SP_B_RY
O
Front speaker B relay driver control signal output
68
C/SB_RY
O
Center/Surround back speakers relay driver control signal output
69
REAR_RY
O
Surround speaker relay driver control signal output
70
SW_RY
O
Sub woofer relay driver control signal output
71
NC
—
Not used (Fixed at L)
72
BRIDGEABLE_RY
O
Bridgeable relay driver control signal output
73
D0
I
Tuner serial data input
74
SLATCH
O
Tuner latch signal output
75
TUNED
I
Tuned signal detection input
76
STEREO
I
Stereo signal detection input
77
RSTX
I
Reset signal input
78
MUTE
O
Tuner mute signal output
79
X1A
—
Not used (Open)
80
X0A
—
Not used (Connect to VSS)
81
VSS
—
Ground
82
X0
—
Clock signal input (16 MHz)
83
X1
—
Clock signal output (16 MHz)
84
VCC3
—
Power supply pin (+3.3 V)
85
GROUPING_SW
—
Not used (Open)
86 to 89
SW1 to SW4
O
Video select signal output
90
SELECT2
O
Digital input select 2 signal output
91
SELECT1
O
Digital input select 1 signal output
92
BST_SEL
O
96/24 signal output for DSP IC
93
XMODE
O
Xmode signal output for DIR IC
94
CKSEL1
O
Clock select signal output for DIR IC
95
CLK
O
Data clock signal output for DIR IC
96
CE
O
Latch signal output for DIR IC
97
DI
O
Data output for DIR IC
98
DO
I
Data input from DIR IC
99
ERROR
I
Error detection signal input from DIR IC
100
XSTATE
I
Xstate signal input from DIR IC
DIGITAL board
POWER board
STANDBY board
BRIDGEABLE board
VIDEO board
S-VIDEO board
SURR BACK board
SPEAKER board
MAIN board
TUNING board
VIDEO3 board
HEADPHONE board
DISPLAY board
STR-DE697
16
16
4-3. BLOCK DIAGRAM — TUNER/AUDIO SECTION —
43
76
75
78
75
78
74
73
73
70
SA-CD/CD
IN
MD/TAPE
OUT
MD/TAPE
IN
DVD AUDIO
IN
L
J400
J403
J298(2/2)
J404
R
R-CH
R-CH
R-CH
R-CH
L
R
AM
TN1
FM/AM TUNER UNIT
SYSTEM
CONTROL
IC1101 (1/4)
L
R
L
R
L
-3
-4
-5
-6
-1
-2
R
L
VIDEO 2
AUDIO OUT
AUDIO IN
AUDIO IN
R
L
R
R-CH
RDS SIG
S LATCH
SW RY
IC.DATA
IC.CLK
VOL LATCH
STEREO
TUNED
TUNED
MUTE
DO
L-CH
AEP,UK MODEL
AEP,UK MODEL
EXCEPT
AEP,UK MODEL
R-CH
STEREO
TUNED
MUTING
CE
DO
DATA
CLOCK
VIDEO 1
MUTE
Q300,310
MUTE
Q320,330
MUTE
Q360,370
MUTE
Q350
MUTE
Q340
AUDIO
OUT
SUB
WOOFER
RELAY
DRIVER
Q560
Q379
SUB WOOFER
AMP
IC402
J309
RY560
SYSTEM MUTE
SBL-CH
C-CH
SR-CH
FR-CH
SL-CH
FL-CH
R-CH
L-CH
TU+3.3V
56
53
58
58
16
17
17
22
FM 75Ω
COAXIAL
63
62
68
67
21
24
22
72
65
74
76
80
18
20
20
19
4
SUB
WOOFER
L
R
R-CH
R-CH
L
R
FRONT
SURROUND
CENTER
J401
MULTI CH IN
ANTENNA
57
54
55
6
7
46
47
40
41
35
34
SBR-CH
28
29
5
7
15
11
12
13
10
61
SW
SEL
C
SEL
SL
SEL
L
SEL
R-CH
R-CH
70
69
69
R-CH
R-CH
R-CH
R-CH
R-CH
R-CH
DVDD
DIR
FUNCTION SELECT
IC401
AVCC
AVEE
+7V
-7V
-1
-2
-3
-4
AUDIO
R-CH
L
R
-2
-3
-3
-4
AUX
IN
L
R
R-CH
-1
-2
-5
-6
-1
-2
-3
-4
-5
-6
SEL
SW
MCU
I/F
3.3V
REG
Q471
3.3V
(STBY)
+7V
SBL OUT
R-CH
SW OUT
C OUT
SL OUT
L OUT
R-CH
R-CH
R-CH
52
51
TU+10V
52 RDS CLK
RDS INT
FM SIG OUT
53 RDS DATA
RDS DATA
• Signal path
: TUNER (FM/AM)
: VIDEO (AUDIO)
• R-ch is omitted due to
same as L-ch.
same as L-ch.
SBL
SEL
SEL
78
DIGITAL
SECTION
C
DIGITAL
SECTION
B
DIGITAL
SECTION
A
POWER
SECTION
D
(Page 17)
(Page 17)
(Page 20)
(Page 17)
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