Sony STR-DE590 Service Manual ▷ View online
STR-DE590
29
29
STR-DE590
4-18. SCHEMATIC DIAGRAM — POWER SECTION — • Refer to page 12 for Common Note on Schematic Diagram.
C813
C814
C920
C921
C950
D820
D821
D822
D823
R902
R903
R904
C815
D910
D911
D912
D913
RY901
CNP903
CNP902
Q901
CNP901
D915
D914
D901
R921
C923
R922
R923
D818
CNP905
CNP912
Q921
R810
R812
JW905
JW906
JW904
T901
CN906
RY801
CNP904
CN908
R824
Q809
C816
R831
R830
T902
F901
(Page 23)
(Page 19)
(Page 19)
(Page 19)
(Page 19)
Note:
The components identified
by mark
The components identified
by mark
0
or dotted line with
mark
0
are critical for safety.
Replace only with part num-
ber specified.
ber specified.
STR-DE590
30
30
STR-DE590
4-19. IC BLOCK DIAGRAMS
IC203 NJM2595D (VIDEO BOARD)
IC1101 LC89056W-E (DIGITAL BOARD (1/2))
IC201 M61527FP (MAIN BOARD (1/2))
MCU I/F
LATCH
DATA
CLK
AVCC
GND
SW ch
SL ch
SR ch
R ch
L ch
L ch
L ch
L ch
R ch
C ch
SR ch
SL ch
SW ch
R ch
R ch
L ch
GND
GND
GND
GND
GND
GND
R ch
SL ch VOL
SR ch VOL
R ch VOL
L ch VOL
C ch
C ch
VOL
VOL
SW ch
VOL
DVDD
AVEE
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1 INR3
INL2
INR2
INR1
CIN1
SWIN1
SRIN1
SLIN1
RIN1
GND
GND
LIN2
RIN2
CIN2
SWIN2
DGND
CLOCK
D
ATA
LA
TCH
DVDD
A
VCC
GND
SWSELOUT
SLSELOUT
CSELOUT
COUT
SWVIN
CVIN
SWOUT
SLOUT
SROUT
SRVIN
SRSELOUT
RSELOUT
RVIN
ROUT
NC
NC
NC
NC
NC
NC
LOUT
LVIN
LSELOUT
GND
RECL1
RECL2
RECL3
RECR1
RECR2
RECR3
INL10/RECL4
INR10/RECR4
A
VEE
INL9
INR9
INL8
INR8
INL7
INR7
INL6
INR6
INL5
INR5
INL4
INL3
INR4
GND
SL
VIN
SLIN2
SRIN2
GND
BALANCER L/-
BALANCER L/+
BALANCER R/-
BALANCER R/+
LIN1
GND
INL1
13
14
CKOUT
12
A.GND
11
AVDD
4
DIN1
10
LPF
9
VIN
8
R
7
DVDD
6
D.GND
5
DIN2
2
DOUT
1
DISEL
3
DIN0
25
CSFLAG
33
BPSYNC
32
AUTO
31
DGND
30
DVDD
26 27 28 29
F3/P3/C3
F2/P2/C2
F1/P1/C1
F0/P0/C0
35
DO
36
DI
34
ERROR
BCK
15
16
LRCK
DATAO
17
XSTATE
18
19
DGND
DVDD
20
21
XMCK
XOUT
22
XIN
23
24
EMPHA
AUDIO
48
47
XMODE
CKSEL1
CKSEL1
46
45
CKSEL0
DOSEL1
DOSEL1
44 DOSEL0
43
43
42
DVDD
DGND
DGND
41
40
MODE1
MODE0
MODE0
39 XSEL
38
37
CLK
CE
INPUT
PLL
DATA
DEMODULATOR
C BIT DETECTION
Pa,Pb DETECTION
MICROPROCESSOR INTERFACE
LOCK
DETECTION
fs
CALCULATION
TIMING
X'TAL1
1
M.OUT
2
SW5
8
VEE
3
DVD
4
SW3
5
V2
6
SW4
7
NC
S3
S1
S2
S4
S6
S7
S5
16 VCC
SW2
V3
V1.OUT
SW1
V1
GND
V1
GND
NC
6dB
AMP
75Ω
DRIVER
10
9
15
14
13
12
13
12
11
-V
+V
IC501 STK350-230 (MAIN BOARD (2/2))
IC701
µ
PC2581V-S (MAIN BOARD (2/2))
IC702
µ
PC2581V-S (MAIN BOARD (2/2))
IC1501 AK4527B (DIGITAL BOARD (1/2))
1
IN+
2
IN-
3
4
5
-VOUT
6
+VOUT
7
-B
8
GND
9
+B
PRE
GND
DRIVER
PROTECTOR
DRIVE
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
+VOUT1
MUTE
–VOUT1
NF1
COMP1
COMP2
IN1
GND
IN2
NF2
–VOUT2
+VOUT2
VCC
VCC
VEE
DRIVE
1
SDOS
LOOP1
CDTI
CCLK
CS
S/P
MCLKI
DZF1
A.GND
A.5V
FREFH
VCOM
2
12C
3
S.MUTE
4
BCLK
5
LRCK
6
SDTI1
7
SDTI2
8
SDTI3
9
SDTO
10
DAUX
11
DFS
33 DZF2
32 RIN+
31 RIN-
31 RIN-
30 LIN+
29 LIN-
29 LIN-
28 ROUT1
ADC
AUDIO
I/F
HPF
ADC
HPF
FORMAT
CONVERTER
DATT
DAC
LPF
27 LOUT1
DATT
DAC
LPF
26 ROUT2
DATT
DAC
LPF
25 LOUT2
DATT
DAC
LPF
24 ROUT3
DATT
DAC
LPF
23 LOUT3
DATT
DAC
LPF
MCLK
SDOUT
BCLK
LRLK
SDT0
SDTI1
SDTI1
SDTI2
39
40
41
42
43
37
38
35
36
44
34
DEM1
DEM0
TVDD
D.5V
D.GND
PD
ICKS2
ICKS1
ICKS0
CAD1
CAD0
17
16
15
14
13
19
18
21
20
12
22
31
STR-DE590
IC301 TC74HC4053AP (VIDEO BOARD)
IC302 NJM2581D (VIDEO BOARD)
16
15 14
13
12
11
10
9
1
2
3
4
5
6
7
8
C
B
A
0X
1X
XCOM
YCOM
VCC
GND
VEE
INH
0Z
ZCOM
1Z
0Y
1Y
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
LOGIC LEVEL CONVERTER
13
GND
VOUT3
V+3
VOUT2
V+2
VOUT1
V+1
PWR
VEE3
VEE2
VEE1
VIN2
VIN3
VIN1
BIAS
14
1
2
6dB
AMP
75Ω
DRIVER
11
BIAS
12
3
4
6dB
AMP
75Ω
DRIVER
9
BIAS
10
5
6
6dB
AMP
75Ω
DRIVER
8
7
REF
32
STR-DE590
• IC Pin Descriptions
IC1201 CXD9617R (DSP) (DIGITAL Board (1/2))
Pin No.
Pin Name
I/O
Pin Description
1
VSS
—
Ground
2
XRST
I
Reset signal input from SYSTEM CONTROL IC
3
EXTIN
I
Not used (Connect to ground)
4
FS2
I
Not used (Connect to ground)
5
VDDI
I
Power supply pin (+2.6 V)
6
FS1
I
Not used (Connect to ground)
7
PLOCK
O
Not used (Open)
8
VSS
—
Ground
9
MCLK1
I
Clock signal input (13.59 MHz)
10
VDDI
I
Power supply pin (+2.6 V)
11
VSS
—
Ground
12
MCLK2
O
Clock signal output (13.59 MHz)
13
MS
I
Not used (Connect to ground)
14
SCKOUT
O
Internal system clock signal output for CODEC IC
15
LRCKI1
I
Not used (Open)
16
VDDE
I
Power supply pin (+3.3 V)
17
BCKI1
I
Not used (Open)
18
SDI1
I
Audio IF data input from CODEC IC
19
LRCKO
O
Sampling clock signal output for CODEC IC
20
BCKO
O
Bit clock signal output for CODEC IC
21
VSS
—
Ground
22
KFSIO
I/O
Audio clock signal (384fs/256fs) input/output for DIR IC
23 to 25
SDO1 to SDO3
O
Digital audio serial data output for CODEC IC
26
SDO4
O
Not used (Open)
27
SPDIF
O
Not used (Open)
28
LRCKI2
I
Sampling clock signal input from DIR IC
29
BCKI2
I
Bit clock signal input from DIR IC
30
SDI2
I
Digital audio serial data input from DIR IC
31
VSS
—
Ground
32
HACN
O
Acknowledge signal output for SYSTEM CONTROL IC
33
HDIN
I
Serial data input from SYSTEM CONTROL IC
34
HCLK
I
Clock signal input from SYSTEM CONTROL IC
35
HDOUT
O
Serial data output for SYSTEM CONTROL IC
36
HCS
I
Chip select signal input from SYSTEM CONTROL IC
37
SDCLK
O
Not used (Open)
38
CLKEN
O
Not used (Open)
39
RAS
O
Not used (Open)
40
VDDI
I
Power supply pin (+2.6 V)
41
VSS
—
Ground
42
CAS
O
Not used (Open)
43
DQM/OE0
O
Not used (Open)
44
CS0
O
External memory chip select signal output for D/A converter IC (SDRAM)
45
WE0
O
SDRAM write enable signal output for D/A converter IC
46
VDDE
I
Power supply pin (+3.3 V)
47
WMD1
I
Not used (Fixed at H)
48
VSS
—
Ground
49
WMD0
I
Not used (Fixed at H)
50
PAGE2
O
Not used (Open)
51
VSS
—
Ground
52, 53
PAGE1, PAGE0
O
Not used (Open)
54
BOOT
I
Not used (Connect to ground)
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