Sony STR-DE585 Service Manual ▷ View online
13
STR-DE585
SECTION 4
DIAGRAMS
1
VSS
—
Ground
2
XRST
I
Reset signal input
3
EXTIN
I
Not used (connected to ground)
4
FS2
I
Not used (connected to ground)
5
VDDI
I
Power supply
6
FS1
I
Not used (connected to ground)
7
PLOCK
O
Internal PLL lock signal output (Not used (open))
8
VSS
—
Ground
9
MCLK1
I
Clock signal input (13.5 MHz)
10
VDDI
I
Power supply
11
VSS
—
Ground
12
MCLK2
O
Clock signal output (13.5 MHz)
13
MS
I
Switching of master/slave operation (L : internal clock, H : EXTIN clock is used)
14
SCKOUT
O
Internal system clock signal output
15
LRCKI1
I
Not used (open)
16
VDDE
I
Power supply
17
BCKI1
I
Not used (open)
18
SDI1
I
Audio IF data input
19
LRCKO
O
Sampling clock output for digital audio serial data
20
BCKO
O
Bit clock output terminal for digital audio serial data
21
VSS
—
Ground
22
KFSIO
I/O
Audio clock signal (364fs/256fs) input/output
23 to 25
SDO1 to SDO3
O
Digital audio serial data output
26
SDO4
O
Audio IF serial output (Not used (open))
27
SPDIF
O
Not used (open)
28
LRCKI2
I
Sampling clock input for audio serial data
29
BCKI2
I
Bit clock input terminal for audio serial data
30
SDI2
I
Digital audio data input
31
VSS
—
Ground
32
HACN
O
Acknowledge signal output for system control
33
HDIN
I
Serial data input for system control
34
HCLK
I
Clock input for system control
35
HDOUT
O
Serial data output for system control
36
HCS
I
Chip select input for system control
37
SDCLK
O
Not used (open)
38
CLKEN
O
Not used (open)
39
RAS
O
Not used (open)
40
VDDI
I
Power supply
41
VSS
—
Ground
42
CAS
O
Not used (open)
43
DQM/OE0
O
Not used (open)
44
CS0
O
External memory chip select (SRAM)
45
WE0
O
SRAM write enable output
46
VDDE
I
Power supply
47
WMD1
I
Not used (connected to “H”)
48
VSS
—
Ground
49
WIMD0
I
Not used (connected to “H”)
50
PAGE2
O
Not used (open)
51
VSS
—
Ground
52
PAGE1
O
External memory page switching signal output (Not used (open))
53
PAGE0
O
External memory page switching signal output (Not used (open))
4-1. IC PIN DESCRIPTIONS
• IC1201 CXD9617R (DSP) (DIGITAL Board (1/2))
Pin No.
Pin Name
I/O
Description
14
STR-DE585
54
BOOT
I
Not used (connected to ground)
55
BTACT
O
Not used (open)
56
BST
I
Boot stop signal input
57
MOD1
I
Operation mode signal input (L : 386fs, H : 256fs)
58
MOD0
I
Operation mode signal input (L : single chip mode, H : use prohibited)
59
EXLOCK
I
Lock signal input
60
VDDI
I
Power supply
61
VSS
—
Ground
62, 63
A17, A16
O
Not used (open)
64 to 66
A15 to A13
O
External memory address output (SRAM)
67
GP10
O
LRCK0
68
GP9 (DECODE)
O
DECODE
69
GP8 (AUDIO)
I
AUDIO
70
VDDI
I
Power supply
71
VSS
—
Ground
72 to 75
D15/GP7 to D12/GP4
I/O
External memory data input/output (general port)
76
VDDE
I
Power supply
77 to 80
D11/GP3 to D8/GP0
I/O
External memory data input/output (general port)
81
VSS
—
Ground
82 to 85
A9 to A12
O
External memory address output (SRAM)
86
TDO
O
Not used (open)
87
TMS
I
Not used (open)
88
XTRST
I
Not used (open)
89
TCK
I
Not used (open)
90
TDI
I
Not used (open)
91
VSS
—
Ground
92 to 97
A8 to A3
O
External memory address output (SRAM)
98, 99
D7, D6
I/O
External memory data input/output (SRAM)
100
VDDI
I
Power supply
101
VSS
—
Ground
102 to 105
D5 to D2
I/O
External memory data input/output (SRAM)
106
VDDE
I
Power supply
107, 108
D1, D0
I/O
External memory data input/output (SRAM)
109, 110
A2, A1
O
External memory address output (SRAM)
111
VSS
—
Ground
112
A0
O
External memory address output (SRAM)
113
PM
I
PLL initialization input terminal
114, 115
SDI3, SDI4
I
Not used (open)
116
SYNC
I
Sync/async selection input (L : sync, H : async)
117 to 119
VSS
—
Ground
120
VDDI
I
Power supply
Pin No.
Pin Name
I/O
Description
STR-DE585
15
15
Pin No.
Pin Name
I/O
Description
1
DATAO
I
Serial data input for DIR
2
GP9
I
Decode signal input
3
BST
O
Boot stop signal output to DSP
4
HCS
O
Chip select signal output to DSP
5
HACN
I
Acknowledge signal input for DSP
6
XRST
O
Reset signal output to DSP
7
PM
O
PLL initialization output to DSP
8
PD
O
Power down signal output to CODEC
9
SMUTE
O
Soft mute signal output to CODEC
10
CDT1
O
Control data output to CODEC
11
VSS
—
Ground
12
SCL
O
Serial data clock to CODEC
13
CS
O
Chip select signal output to CODEC
14
DATA
O
Serial data output to VOL/TUNER
15
CLK
O
Clock signal output to VOL/TUNER
16
LATCH-VOL IC
O
Latch signal output to VOL/TUNER
17
SPK B RELAY
O
Speaker out control signal output (Fixed at “L”)
18
HDOUT
I
Serial data for DSP
19
HDIN
O
Serial data to DSP
20
HCLK
O
Clock signal output to DSP
21
F.MUTE
O
Function input mute signal output
22
AC MUTE
O
Power amp mute signal output
23
VCC5
I
Power supply
24
ANA/DIG
I
Muting and error port signal input
25
HP DETECT
I
Headphone detect signal input
26
DCS LED
O
LED (Digital Cinema Sound) driver signal output
27
FLASH2
O
Flash programming signal output
28
SP SWITCH/FLASH1
I/O
Speaker ON/OFF signal output
29
MCH LED
O
LED (MULTI CHANNEL DECODING) driver signal output
30
MODE
O
LED (MODE) driver signal output
31
2CH
O
LED (2CH) driver signal output
32
AFD
O
LED (A.F.D.) driver signal output
33
SCL
O
Clock signal output to EEPROM
34
SDA
I/O
Serial data to EEPROM
35
AVCC
I
Power supply
36
AVRH
I
Not used (connected to “H”)
37
AVSS
—
Ground
38 to 41
A/D0 to A/D3
I
Key signal input (A/D port)
42
VSS
—
Ground
43
RDS SIGNAL
I
RDS signal input (AEP, UK model)
44
MODEL
I
Model detection port
45
VERSION
I
Version resistor port
46
NC
O
Not used (Fixed at “L”)
47
NC
O
Not used (Fixed at “H”)
48
STOP
I
Input signal when AC off
49
MD0
—
Selection of micom operation mode
50
MD1
—
Not used (connected to “H”)
51
MD2
—
Selection of micom operation mode
52
RDS CLOCK
I
RDS clock signal output (AEP, UK model)
53
RDS DATA
I
RDS data output (AEP, UK model)
54
SIRCS
I
Input data from remote control receiver
55
FUSE DETECT
I
Power down detect input
• IC1601 MB90478PF-G-120-BND (SYSTEM CONTROL) (DIGITAL Board (2/2))
Pin No.
Pin Name
I/O
Description
56
POWER KEY
I
Detect power switch key
57
JOG (B)
I
Jog encoder signal input (Fixed at “L”)
58
JOG (A)
I
Jog encoder signal input (Fixed at “L”)
59
VOL (B)
I
Volume encoder signal input
60
VOL (A)
I
Volume encoder signal input
61
DIN
O
Serial data output to FL driver
62
CLK
O
Clock signal output to FL driver
63
FL_STB
O
Strobe signal output to FL driver
64
CONTROL A1 OUT
O
Control A1 signal output (Fixed at “L”)
65
CONTROL A1 IN
I
Control A1 signal input (Not used)
66
POWER RELAY
O
Control power relay driver output
67
PROTECTOR
I
Detect protector status input
68
HEADPHONE RELAY
O
Control headphone relay driver output
69
WOOFER RELAY
O
Control woofer speaker relay driver output
70
REAR RELAY
O
Control rear speaker relay driver output
71
CENTER RELAY
O
Control center speaker relay driver output
72
PREOUT/FRONT RELAY
O
Control front speaker relay driver output
73
TUNED
O
Tuned signal output to tuner
74
STEREO
O
Stereo signal output to tuner
75
MUTE
O
Mute signal output to tuner
76
DO
I
Serial data input for tuner
77
RSTX
I
Reset signal input
78
SLATCH
O
Latch signal to tuner
79
X1A
—
Not used (open)
80
X0A
—
Not used (connected to ground)
81
VSS
—
Ground
82
X0
I
Clock signal input (16 MHz)
83
X1
O
Clock signal output (16 MHz)
84
VCC3
I
Power supply
85
NC
I
Not used (Fixed at “L”)
86
NC
O
Not used (Fixed at “L”)
87 to 90
SW4 to SW1
O
Video input select signal output
91
SELECT1
O
Optical input select signal output (Fixed at “L”)
92
SELECT2
O
Optical input select signal output (Fixed at “L”)
93
XMODE
O
Mode signal output to DIR
94
CKSEL1
O
Clock select signal output to DIR
95
CLK
O
Clock signal output to DIR
96
CE
O
Chip select signal output to DIR
97
DI
O
Serial data output to DIR
98
DO
I
Serial data input for DIR
99
ERROR
I
Error signal input for DIR
100
XSTATE
I
XSTATE signal input for DIR
STR-DE585
16
16
4-2. BLOCK DIAGRAM — TUNER/AUDIO SECTION —
1
2
67
R-CH
R-CH
R-CH
J402 (1/2)
J403
J404 (1/2)
J401
-1
L
-2
R
IN
CD
DVD/LD
MD/TAPE
AUDIO
IN
FM 75Ω
COAXIAL
AM
ANTENNA
TU+10V
TM301
FM/AM TUNER UNIT
TU+3.3V
+10V
L CH
R CH
STEREO
TUNED
MUTE
CE
RDS SIGNAL
RDS DATA
RDS CLOCK
STEREO
TUNED
MUTE
SLATCH
DO
FM OUT
RDS DATA
RDS INT
STEREO
TUNED
MUTE
CE
CLK
DATA
DO/DI
DATA
CLK
LATCH VOL IC
WOOFER RELAY
ST-DO/MC-DI
ST-DI/MC-DO
CLK
AEP,UK MODEL
STEREO
TUNED
MUTE
CE
DO/DI
DATA
CLK
FM SIGNAL OUT
RDS DATA
FM OUT
RDS DATA
RDS INT
RDS INT
R-CH
LREC 3
61
LREC 1
10
ALOUT
9
AROUT
R-CH
IN 8
IN 9
IN 5
IN 6
IN 7
IN 8
IN 1
IN 2
IN 3
AL IN
ASL IN
ASW IN
AC IN
3
IN 10
69
68
70
71
R-CH
R-CH
VIDEO 1
VIDEO 2
AUDIO
IN
AUDIO
IN
62
63
64
R-CH
R-CH
MULTI
CH IN
FRONT
SURROUND
CENTER
SUB
WOOFER
13
16
29
43
53
52
76
73
75
78
76
14
15
16
69
32
31
27
49
LSELOUT
45
SLDELOUT
50
46
37
CSELOUT
38
51
LOUT
47
39
33
SWSELOUT
34
35
5
7
SLOUT
55
ROUT
R-CH
R-CH
43
SROUT
COUT
SWOUT
20
21
22
R-CH
R-CH
R-IN
L-IN
J402 (2/2)
-4
R
-3
L
OUT
MD/TAPE
VIDEO 1
J404 (2/2)
-3
L
-4
R
AUDIO
OUT
-1
L
-2
R
-5
L
-6
R
-1
L
-2
R
-1
L
-2
R
-3
L
-4
R
IN
-3
L
-4
R
15
MUTE
Q361,362
MUTE
Q365,366
MUTE
Q363
MUTE
Q364
RELAY
DRIVER
Q560
DSLIN
DSWIN
DCIN
DLIN
DSL IN
DSW IN
DC IN
DL IN
MCU
I/F
DATA
CLK
LATCH
DIR
FUNCTION
SELECT
IC201
RY560
Q379
INV.
FC MUTE
J405
SUB
WOOFER
AUDIO
OUT
FL-CH
FR-CH
SL-CH
SR-CH
C-CH
WOOFER
AMP
IC401
11
0/6/12dB
0/6/12dB
0/6/12dB
0/6/12dB
0/6/12dB
ATT
0/-6dB
+3.3V
REG
Q471
+7V
VCC
+3.3V
+7V
-6
-5
TUNER
VOL IC/
TUNER
SYSTEM
CONTROL
IC1601 (1/4)
POWER
SECTION
4
DIGITAL
SECTION
1
DIGITAL
SECTION
2
DIGITAL
SECTION
3
• Signal path
: TUNER (FM/AM)
: CD (ANALOG)
: VIDEO
• R-ch is omitted due to
same as L-ch.
same as L-ch.
(Page 17)
(Page 17)
(Page 17)
(Page 19)
Click on the first or last page to see other STR-DE585 service manuals if exist.