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Model
STR-DE485 STR-DE485E
Pages
52
Size
5.64 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
str-de485-str-de485e.pdf
Date

Sony STR-DE485 / STR-DE485E Service Manual ▷ View online

11
STR-DE485/DE485E
SOFTWARE VERSION DISPLAY MODE
* The software version is displayed.
* Procedure:
While depressing the [ENTER] and the SOUND FIELD [A.F.D.]
buttons simultaneously, press the power  
?/1
  button to turn on
the main power.  The model name, destination and the software
version are  displayed.
FLUORESCENT INDICATOR TUBE TEST MODE
* All fluorescent segments are tested.  When this test is activated,
all segments turn on at the same time, then each segment turns
on one after another.
* Procedure:
While depressing the [MD/TAPE] and the [SHIFT] buttons simul-
taneously, press the power  
?/1
  button to turn on the main power.
1. All segments turn on.
[MULTI CHANNEL DECODING], [Digital Cinema Sound], SOUND
FIELD [A.F.D.], [MODE], [2CH] and [SET UP] LED turn on.
2. Press the [VIDEO 1] button, confirm display
SOUND FIELD [A.F.D], [MODE], SOUND CONTROL [LEVEL],
[SET UP] and [Digital Cinema Sound] LED turn on.
3. Press the [VIDEO 1] button, confirm display
[MULTI CHANNEL DECODING], SOUND FIELD [2CH], SOUND
CONTROL [SURR] and [NAME] LED turn on.
4. Press the [VIDEO 1] button, All segments turn off.
5. Every pressing of the  [VIDEO 1] button turns on each segment
and LED one after another in the same order.
(Not only the [VIDEO 1] button, but also the other buttons such
as [VIDEO 2], [DVD/LD], [MD/TAPE], [CD], [TUNER] can be used.)
SECTION 3
TEST MODE
SW
L
SL
C
R
S
SR
SLEEP
SP.OFF
( ( ( L F E ) ) )
DIGITAL
OPT COAX MULTI CH IN
PRO LOGIC DTS MPEGSTEREO MONO RDS
MEMORY
MUTING
INFO
NEWS
TA
EQ
D.RANGE
D D
dB
kHz
mft.
MHz
SW
L
R
S
SLEEP
 L F E 
COAX
PRO LOGIC
MPEGSTEREO
RDS
MUTING
INFO
TA
D.RANGE
D D
k    
m   
MHz
SL
C
SR
SP.OFF
( ( (       ) ) )
DIGITAL
OPT
MULTI CH IN
DTS
MONO
MEMORY
NEWS
EQ
dB
  Hz
   ft.
FACTORY PRESET MODE
* All preset contents are reset to the default setting.
* Procedure:
While depressing the [VIDEO 1] and the SOUND FIELD [2CH]
buttons simultaneously, press the power  
?/1
  button to turn on
the main power.  The message FACTORY appears and switch
off the set.
While depressing the [VIDEO 1] and the SOUND FIELD [2CH]
buttons simultaneously, press the power  
?/1
  button again.  The
message FACTORY appears and the preset contents are reset to
the default values.
SOUND FIELD CLEAR MODE
* The preset sound field is cleared when this mode is activated.
Use this mode before returning the product to clients upon
completion of repair.
* Procedure:
While depressing the SOUND FIELD [MODE] button, press the
power  
?/1
  button to turn on the main power.  The message S. F.
CLR appears and initialization is performed.
AM CHANNEL STEP 9 kHz/10 kHz
SELECTION MODE
* Either the 9 kHz step or 10 kHz step can be selected for the AM
channel step.
* Procedure:
Set the [TUNER] to [AM].  Turn off the main power.
While depressing the [TUNING+] button or the
[PRESET TUNING   ] button, press the power  
?/1
  button to turn
on the main power.  Either the message 9 k STEP or 10 k STEP
appears.  Select the desired step.
* For US/E model only
KEY CHECK MODE
* Button check
* Procedure:
While depressing the [VIDEO 1] and the [SHIFT] buttons simul-
taneously, press the power  
?/1
  button to turn on the main power.
“REST 39” appears.
Every pressing of any button other than the  
?/1
 , [TREBLE+,   ]
and the [BASS+,    ] counts down the buttons.  The buttons which
are already counted once are not counted again.  When all but-
tons are pressed “REST 04” appears.
When  [MASTER  VOLUME] is rotated in clockwise direction,
“VOL MIN”, “VOL 1” to “VOL 73”, “VOL MAX” appear.
12
STR-DE485/DE485E
SECTION 4
DIAGRAMS
1
VSS
Ground
2
XRST
I
Reset signal input
3
EXTIN
I
Not used (connected to ground)
4
FS2
I
Not used (connected to ground)
5
VDDI
I
Power supply
6
FS1
I
Not used (connected to ground)
7
PLOCK
O
Internal PLL lock signal output (Not used)
8
VSS
Ground
9
MCLK1
I
Clock signal input (13.5 MHz)
10
VDDI
I
Power supply
11
VSS
Ground
12
MCLK2
O
Clock signal output (13.5 MHz)
13
MS
I
Switching of master/slave operation   L : internal clock, H : EXTIN clock is used
14
SCKOUT
O
Internal system clock signal output
15
LRCKI1
I
Not used (open)
16
VDDE
I
Power supply
17
BCKI1
I
Not used (open)
18
SDI1
I
Audio IF data input
19
LRCKO
O
Sampling clock output for digital audio serial data
20
BCKO
O
Bit clock output terminal for digital audio serial data
21
VSS
Ground
22
KFSIO
I/O
Audio clock signal (364fs/256fs) input/output
23 to 25
SDO1 to SDO3
O
Digital audio serial data output
26
SDO4
O
Audio IF serial output (Not used) (open)
27
SPDIF
O
Not used (open)
28
LRCKI2
I
Sampling clock input for audio serial data
29
BCKI2
I
Bit clock input terminal for audio serial data
30
SDI2
I
Digital audio data input
31
VSS
Ground
32
HACN
O
Acknowledge signal output for system control
33
HDIN
I
Serial data input for system control
34
HCLK
I
Clock input for system control
35
HDOUT
O
Serial data output for system control
36
HCS
I
Chip select input for system control
37
SDCLK
O
Not used (open)
38
CLKEN
O
Not used (open)
39
RAS
O
Not used (open)
40
VDDI
I
Power supply
41
VSS
Ground
42
CAS
O
Not used (open)
43
DQM/OE0
O
Not used (open)
44
CS0
O
External memory chip select (SRAM)
45
WE0
O
SRAM write enable output
46
VDDE
I
Power supply
47
WMD1
I
Not used (connected to “H”)
48
VSS
Ground
49
WIMD0
I
Not used (connected to ground)
50
PAGE2
O
Not used (open)
51
VSS
Ground
52
PAGE1
O
External memory page switching signal output (Not used)
53
PAGE0
O
External memory page switching signal output (Not used)
4-1. IC PIN DESCRIPTION
• IC1201  CXD9617R (DSP) (DIGITAL Board (1/2))
Pin No.
Pin Name
I/O
Description
13
STR-DE485/DE485E
54
BOOT
I
Not used (connected to ground)
55
BTACT
O
Not used (open)
56
BST
I
Boot stop signal input
57
MOD1
I
Operation mode signal input (L : 386fs, H : 256fs)
58
MOD0
I
Operation mode signal input (L : single chip mode, H : use prohibited)
59
EXLOCK
I
Lock signal input
60
VDDI
I
Power supply
61
VSS
Ground
62, 63
A17, A16
O
Not used (open)
64 to 66
A15 to A13
O
External memory address output (SRAM)
67
GP10
O
LRCK0
68
GP9 (DECODE)
O
DECODE
69
GP8 (AUDIO)
I
AUDIO
70
VDDI
I
Power supply
71
VSS
Ground
72 to 75
D15/GP7 to D12/GP4
I/O
External memory data input/output (general port)
76
VDDE
I
Power supply
77 to 80
D11/GP3 to D8/GP0
I/O
External memory data input/output (general port)
81
VSS
Ground
82 to 85
A9 to A12
O
External memory address output (SRAM)
86
TDO
O
Not used (open)
87
TMS
I
Not used (open)
88
XTRST
I
Not used (open)
89
TCK
I
Not used (open)
90
TDI
I
Not used (open)
91
VSS
Ground
92 to 97
A8 to A3
O
External memory address output (SRAM)
98, 99
D7, D6
I/O
External memory data input/output (SRAM)
100
VDDI
I
Power supply
101
VSS
Ground
102 to 105
D5 to D2
I/O
External memory data input/output (SRAM)
106
VDDE
I
Power supply
107, 108
D1, D0
I/O
External memory data input/output (SRAM)
109, 110
A2, A1
O
External memory address output (SRAM)
111
VSS
Ground
112
 A0
O
External memory address output (SRAM)
113
PM
I
PLL initialization input terminal
114, 115
SDI3, SDI4
I
Not used (open)
116
SYNC
I
Sync/async selection input (L : sync, H : async)
117 to 119
VSS
Ground
120
VDDI
I
Power supply
Pin No.
Pin Name
I/O
Description
14
STR-DE485/DE485E
1
DATAO
I
Serial data input for DIR
2
GP9
I
Decode signal input
3
BST
O
Boot stop signal output to DSP
4
HCS
O
Chip select signal output to DSP
5
HACN
I
Acknowledge signal input for DSP
6
XRST
O
Reset signal output to DSP
7
PM
O
PLL initialization output to DSP
8
PD
O
Power down signal output to CODEC
9
SMUTE
O
Soft mute signal output to CODEC
10
CDT1
O
Control data output to CODEC
11
VSS
Ground
12
SCL
O
Serial data clock to CODEC
13
CS
O
Chip select signal output to CODEC
14
DATA
O
Serial data output to VOL/TUNER
15
CLK
O
Clock signal output to VOL/TUNER
16
LATCH
O
Latch signal output to VOL/TUNER
17
SPKB
O
Speaker out control signal output (Not used)
18
HDOUT
I
Serial data for DSP
19
HDIN
O
Serial data to DSP
20
HCLK
O
Clock signal output to DSP
21
F.MUTE
O
Function input mute signal output
22
AC MUTE
O
Power amp mute signal output
23
VCC5
I
Power supply
24
ANA/DIG
I
Muting and error port signal input
25
HP DETECT
I
Headphone detect signal input
26
DCS LED
O
LED (DCS) driver signal output
27
FLASH2
O
Flash programming signal output
28
SP SWITCH/FLASH1
I/O
Speaker ON/OFF signal output
29
BLUE LED
O
LED (MULTI CHANNEL) driver signal output
30
MODE
O
LED (MODE) driver signal output
31
2CH
O
LED (2CH) driver signal output
32
AFD
O
LED (AFD) driver signal output
33
SCL
O
Clock signal output to EEPROM
34
SDA
I/O
Serial data to EEPROM
35
AVCC
I
Power supply
36
AVRH
I
Not used (connected to “H”)
37
AVSS
Ground
38 to 41
A/D0 to A/D3
I
Key signal input (A/D port)
42
VSS
Ground
43
RDS SIGNAL
I
RDS signal input
44
MODEL
I
Model detection port
45
VERSION
I
Version resistor port
46
NC
O
Not used (connected to ground)
47
NC
O
Not used (connected to ground)
48
STOP
I
Input signal when AC off
49
MD0
Selection of micom operation mode
50
MD1
Not used (connected to ground)
51
MD2
Selection of micom operation mode
52
RDS CLOCK
I
RDS clock signal output (Not used)
53
RDS DATA
I
RDS data output (Not used)
54
SIRCS
I
Input data from remote control receiver
55
FUSE DETECT
I
Power down detect input
• IC1601  MB90478PF-G-120-BND (SYSTEM CONTROL) (DIGITAL Board (2/2))
Pin No.
Pin Name
I/O
Description
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