Sony ST-D777ES Service Manual ▷ View online
29
IC601 HD6432237 SYSTEM CONTROL (MAIN BOARD)
Pin No.
1 – 14
15
16
17
18 – 28
29
30
31
32
33
34
35
36
37
38 – 44
45
46
47
48 – 49
50
51
52
53
54
55
56
57
58, 59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I/O
—
—
—
—
—
I/O
O
I/O
O
—
O
I
O
O
—
—
I
I
—
I
—
I
I
I
I
—
—
—
—
—
I
I
—
—
—
—
—
—
—
—
O
O
O
O
O
O
O
O
—
Description
Input output terminal - not used
Power supply terminal (+3.3 V)
Input output terminal - not used
Ground terminal
Input output terminal - not used
Data input output terminal for EEPROM (HN58X2432)
Clock output terminal for EEPROM (HN58X2432)
Data output terminal to DAM front end
Clock output terminal to DAM front end
Ground terminal
Data output terminal to FM/AM PLL IC (IC72130)
Data input terminal from FM/AM PLL IC (IC72130)
Clock output terminal to FM/AM PLL IC (IC72130)
Enable terminal to FM/AM PLL IC (IC72130)
Input output terminal - not used
Ground terminal
Auto stop detection signal input terminal
Stereo detection signal input terminal
Input terminal - not used
CIRCS signal input terminal
Input terminal - ground
Signal level detection terminal
Key control 1
Key control 2
Key control 3
Reference voltage input terminal (+3.3 V)
Power supply terminal (+3.3 V)
Mode terminal (fixed at +3.3 V)
Sub-clock input - open
Sub-clock input - fixed at +3.3 V
System reset input terminal
AC OFF detection input terminal
Standby terminal - fixed at +3.3 V
Power supply terminal (+3.3 V)
Master clock (10 MHz)
Ground terminal
Master clock (10 MHz)
Not used - fixed at ground
Mode terminal (fixed at +3.3 V)
Not used - fixed at ground
Mute control output terminal
Data output terminal for D/F (CXD8762) control
Clock output terminal for D/F (CXD8762) control
Enable output terminal for D/F (CXD8762) control
Reset output terminal to D/F (CXD8762)
Terminal for D/F (CXD8762) mute control
Reset output terminal to fluorescence display tube drive IC (MSM9202)
Data output terminal to fluorescence display tube drive IC (MSM9202)
Input terminal - fixed at ground
Pin Name
N.C
V
CC
N.C
V
SS
N.C
SDA
SCL
DP-SDA
DP-SCL
GND
AP-DI
AP-DO
AP-CL
AP-CE
N.C
GND
A-STP
STEREO
N.C
SIRCS
GND
SIGNAL
KEY1
KEY2
KEY3
VREF
AV
CC
N.C
OSC2
OSC1
RESET
POWER
STBY
V
CC
XTAL
V
SS
EXTAL
N.C
N.C
N.C
AFMUTE
DF-DA
DF-CL
DF-CE
DA-RST
DA-MUTE
FL-RST
FL-DA
N.C
30
Pin No.
81
82
83
84
85
86
87
88
89
90
91 – 93
94
95
96
97
98 – 100
I/O
O
O
O
I
I
O
I
O
O
O
—
I
I
O
O
—
Description
Clock output terminal to fluorescence display tube drive IC (MSM9202)
Enable output terminal 1 to fluorescence display tube drive IC (MSM9202)
Enable output terminal 1 to fluorescence display tube drive IC (MSM9202)
Clock output terminal from RDS demodulation IC (BU1924F)
Data input terminal from RDS demodulation IC (BU1924F)
Data output terminal to DAB decode IC (MN66710)
Data input terminal to DAB decode IC (MN66710)
Clock output terminal to DAB decode IC (MN66710)
Mode select output terminal to DAB decode IC (MN66710)
Reset output terminal to DAB decode IC (MN66710)
Output terminal - fixed at ground
Microprocessing operation reference signal input terminal from DAB decode IC (MN66710) (24 ms cycle)
Interruption signal for PAD data reading DAB decode IC (MN66710)
DAB/FM and AM power supply switching terminal (DAB function at H)
Test terminal (display check mode at L)
Output terminal - open
Pin Name
FL-CL
FL-ENB1
FL-ENB2
RD-CL
RD-DO
MPURX
MPUTX
MPUCLK
MPUMOD
NRST
N.C
MPUSYNC
MPADRDY
DAB/FM
TEST
N.C
31
4-13. IC BLOCK DIAGRAMS
IC501
CXD8762Q (MAIN board)
IC502
CXD9521Q (MAIN board)
50
LRCKI
49
BCKI
48
DATAI
47
VSS
46
VSS
45
LVCK01
44
LVCK02
43
INVO
42
INVI
41
128FSO
40 DINIT
39 INAF
38 OVFLAG
37 CKVDD
36 CTLVDD
35 SYNC
34 MODE
33 SCDATA
32 SHIFT
31 LATCH
38 OVFLAG
37 CKVDD
36 CTLVDD
35 SYNC
34 MODE
33 SCDATA
32 SHIFT
31 LATCH
64
CKTL3
63
DFCKSEL
62
NSCKSEL
61
VSS
60
MUTEL
59
MUTER
58
PWMSEL
57
MTPOL
56
DRPOL
55
VDD
54
DATAVDD
53
SDATAL
52
SDATAR
51
SBCKI
1
NSDOL4
2
AVSSL1
3
NSDOL3
4
AVDDL1
5
AVDDL2
6
NSDOL2
7
AVSSL2
8
NSDOL1
9
VSUBL2
10
64FSI
11
XVDD
12
XOUT
13
XIN
14
XVSS
15
VSUBX
16
VSUBR2
17
NSDOR1
18
AVSSR2
19
NSDOR2
20
AVDDR2
21
AVDDR1
22
NSDOR3
23
AVSSR1
24
NSDOR4
25 VSUBR1
26 VSS
27 VDD
28 NREGCLR
29 SYSM
30 INIT
65
CKTL2
66
CKTL1
67
CKTL0
68
TEST2
69
TEST1
70
DFIOSEL
71
DFLRCK
72
DFDTL
73
DFDTR
74
DFBCK
80
VSUBL1
79
VSS
78
VDD
77
PLMGAIN1
76
PLMGAIN2
75
DFDTEN
S/P
DIGITAL
FILTER
P/S
LINEAR
INTERPOLATOR
NOISE SHAPER
CLOCK
GEN.
MUTE/INT
SERIAL
TEST
SERIAL
CONTROL
PWM
SEL
SEL
24
24
4
4
4
4
4
4
4
4
4
4
4 4
17
16
R CH PWM
GENERATOR
R CH D/F
1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
2 3 4 5 6 7 8 9
18 19 20 21 22 23 24
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
L CH
PWM BUFFER
MASTER CLOCK
GENERATOR
R CH
PWM BUFFER
10 11 12 13 14 15
L CH PWM
GENERATOR
L CH D/F
CLOCK
GENERATOR
3.3V/
5V/
I/O
5V I/O
5V I/O
3.3V/
5V/
I/O
VSS2
L2 (+)
VSS
NC
L2 (
–
)
VDD
VDD2
VSUB (A) L
NC
XVDD
XOUT
NC
XIN
XVSS
XVSUB
NC
VSUB (A) R
VDD2
VDD
R2 (
–
)
NC
VSS
R2 (+)
VSS2
VSS2
R1 (+)
VSS
NC
R1 (–)
VDD
VDD2
VSUB (C)
VSUB (D)
CTLVSS
FIL1
FIL2
MODE
SYNC
MUTE
CTLVDD
CKOSEL0
CKOSEL1
CKOSEL2
C256FSO
DVDD
NSDTIR4
NSDTIR3
NSDTIR2
NSDTIR1
NC
C512FSO
DVSS
DVSS
NSBCKO
NC
NSDTIL1
NSDTIL2
NSDTIL3
NSDTIL4
DVDD
DLPOL
DRPOL
TEST1
TEST2
NSCKSEL
MCKSEL
CLKVDD
LVCKO2
LVCKO1
LVCKO0
CLKVSS
VSUB (D)
VSUB (C)
VDD2
VDD
L1 (–)
NC
VSS
L1 (+)
VSS2
32
IC201
LC72130 (MAIN board)
1
2
3
4
5
6
7
8
XIN
B03
CE
IFIN
AOUT
2
AIN1
AIN2
D1
CL
B04
D0
B01
I01
B02
XOUT
PD1
VSS
PD2
FMIN
AMIN
AOUT1
VDD
I02
B05
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PHASE DETECTOR
CHARGE PUMP
SWALLOW COUNTER
1/16.1/17 4bits
SWALLOW COUNTER
1/16.1/17 4bits
POWER
ON
RESET
1/2
C B
I / F
I / F
REFERENCE
DIVIDER
REFERENCE
DIVIDER
C B
I / F
I / F
2
DATA SHIFT REGISTER
LATCH
IC202
LA1245 (MAIN board)
IC203
LA1235 (MAIN board)
3
6
9
2
5
8
1
4
7
10
18
15
12
19
16
13
20
17
14
11
AM RF AMP
AM IF AMP
AM
MIXING
AGC
AM
OSC
GND
B+
(RF)
AM DET
METER
DRIVE
B+
(IF)
3
6
11
2
5
8
1
4
14
15
12
9
10
16
13
7
FM IF AMP
LIMITER
AF/NULL
METER
QUADRATURE
DET
AF AMP
IF OFF
NULL METER
SHORTING
LEVEL
DET
METER
DRIVE
MUTING
CIRCUIT
CIRCUIT
DETUNE
DET
GND
B+
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