Sony SRS-GD50IP Service Manual ▷ View online
SRS-GD50iP
17
• IC Block Diagrams
– MAIN Board –
IC101 TS3USB221RSER
IC105, 510 SI-8008TM-TLS
1D+
D+
1
8
S
VCC
9
D–
7
1D– 2
OE
6
5
10
CONTROL
SWITCH
2D+ 3
2D–
GND
4
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
ADJ
5
SOFT
ST
AR
T
VOUT
VCC
VIN3 (MUTE)
1
2
3
4
5
6
7
GND
BUFFER
VIN1
VIN2
SW1
SW2
8
BIAS
VDD 2
GND 1
+
–
–
VREF
CD
3
OUT
4
IC106, 107 NJM2521V (TE2)
IC108, 503 PST3660UL
SRS-GD50iP
18
DELTA-SIGMA
MODULATOR
DELTA-SIGMA
MODULATOR
ANTIALIAS
LOW-PASS FILTER
ANTIALIAS
LOW-PASS FILTER
AGND
VCC
2
3
3
VDD
DGND
4
5
5
LRCK 7
REFERENCE
u1/64
DECIMATION
FILTER
WITH
HIGH-PASS
FILTER
SERIAL
INTERFACE
&
MODE/FORMAT
CONTROL
FMT
12
VINR
14
VINL
13
MD1
11
MD0
10
DOUT
9
BCK
8
CLOCK & TIMING CONTROL
POWER
SUPPLY
SUPPLY
SCKI 6
VREF 1
VOUTR
15
VCCR
16
VCCP
20
AGNDR
17
PGND
19
VCOM
18
1
XT
O
2
CK
3
DT
4
PSEL
5
DOUT
7
VDD
10
VBUS
13
VCCL
6
DGND
11
ZGND
12
AGNDL
14
VOUTL
8
D–
9
D+
EEPROM
INTERFACE
5V TO 3.3V
VOLTAGE
REGULATOR
XCVR
USB SIE
D/A
CONVERTER
TRACKER
(SPACT)
PLL
(X8)
S/PDIF
ENCODER
ANALOG PLL
ISO-OUT
ENDPOINT
CONTROL
ENDPOINT
HID
ENDPOINT
FIFO
HOST
21
HID0/MS
22
HID1/MC
23
HID2/MD
24
TEST1
25
TEST0
26
XTI
28
SSPND
27
SPI
INTERFACE
POWER
MANAGER
USB PROTOCOL
CONTROLLER
IC110 PCM2704DBR
IC113 PCM1808PWR
SRS-GD50iP
19
SERIAL
AUDIO
PORT
7 ABQs
PDAP
MIXERS BASS
MANAGEMENT
MICROCONTROLLER
BASED SYSTEM
CONTROL
SAMPLE RATE
AUTODETECT
AND PLL
SERIAL
CONTROL
TERMINAL CONTROL
4th
ORDER
NOISE
SHAPER
AND
PWM
2 ABQ
HIGH
PRECISION
VOLUME
SRC
SDIN1
25
SDIN2
24
VR_DIG
27
DVSS
26
SCLK
23
LRCLK
22
MUTE
21
DVSS
20
OSC_RES
19
VREG_EN
18
PDN
17
SCL
29
SDA
28
STEST
31
HPSEL
30
TEST2
BYPASS
AGND
VCLAMP_CD
BST_D
AVCC
BST_A
VCLAMP_AB
BST_B
PVCC_B
PVCC_B
PVCC_B
OUT_B
PVCC_C
BST_C
OUT_C
PVCC_C
OUT_C
32
56
57
54
55
55
58
59
60
61
60
61
62
63
63
64
52
53
50
51
49
7 ABQs
R
SUB
L
BQ
DRC
DRC
LOUDNESS
BQ
2x HB
FET OUT
2x HB
FET OUT
CLICK AND POP
CONTROL
DVDD
33
MCLK
34
BKND_ERR
35
VALID
36
HPL_PWM
37
HPR_PWM
38
SUB_PWM-
39
SUB_PWM+
40
PVCC_D
41
PVCC_D
42
PGND_D
43
PGND_D
44
OUT_D
45
OUT_D
46
PGND_C
47
PGND_C
48
OUT_B
1
PGND_B
2
PGND_B
3
OUT_A
4
OUT_A
5
PGND_A
6
PGND_A
7
PVCC_A
8
PVCC_A
9
AVDD
10
AVSS
11
PLL_FLTM
12
PLL_FLTP
13
VR_ANA
14
DVDD
15
RESET
16
CONTROL
CIRCUIT
BANDGAP
REFERENCE
+
–
OVER HEAT &
OVER CURRENT
PROTECTION
1
VCONT
3
NP
2
GND
4
VOUT
5
VIN
5
VIN
4
VOUT
2
GND
3
NC
1
CONTROL
BANDGAP
REFERENCE
THERMAL
PROTECTION
IC114 TAS5706PAPR
IC511 TK11133CSCL-G
IC512 NJM2831F05 (TE1)
SRS-GD50iP
20
Pin No.
Pin Name
I/O
Description
1, 2
USBDN1_DM,
USBDN1_DP
I/O
Audio serial data input/output with the iPod connector
3, 4
USBDN2_DM,
USBDN2_DP
O
Audio serial data output to the D/A converter
5
VDDA33
-
Power supply terminal (+3.3V)
6 to 9
NC
-
Not used
10
VDDA33
-
Power supply terminal (+3.3V)
11
TEST
-
Test terminal Not used
12
PRTPWR1
O
Power supply control signal output terminal Not used
13
OCS1_N
I
Over current sense signal input terminal Not used
14
VDD18
-
External capacitor connection terminal
15
VDD33CR
-
Power supply terminal (+3.3V)
16
PRTPWR2
O
Power supply control signal output terminal Not used
17
OCS2_N
I
Over current sense signal input terminal Not used
18 to 21
NC
-
Not used
22
SDA/SMBDATA
/NON_REM1
I/O
Not used
23
VDD33
-
Power supply terminal (+3.3V)
24
SCL/SMBCLK/
CFG_SEL0
I/O
Not used
25
HS_IND/CFG_SEL1
I/O
Not used
26
RESET_N
I
Reset signal input terminal Not used
27
VBUS_DET
I
VBUS detection signal input from the system controller
28
SUSP_IND/
LOCAL_PWR/NON_PEM0
I/O
Not used
29
VDDA33
-
Power supply terminal (+3.3V)
30, 31
USBUP_DM,
USBUP_DP
I/O
Audio serial data input/output with the USB connector
32
XTAL2
O
System clock output terminal (24 MHz)
33
XTAL1/CLKIN
I
System clock input terminal (24 MHz)
34
VDD18PLL
-
External capacitor connection terminal
35
RBIAS
-
USB transceiver bias terminal
36
VDD33PLL
-
Power supply terminal (+3.3V)
• IC Pin Function Description
MAIN BOARD IC102 USB2512-AEZG (USB CONTROLLER)
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