Sony SCD-C555ES Service Manual ▷ View online
41
SCD-C555ES
MUX
ATT
INPUT
BIAS
AGC
GCA
PROGRAMMABLE
EQUALIZER
FILTER
DIFFERENTIATOR
64 63
62 61 60 59
58
57
51
56
1
2
FULL WAVE
RECTIFER
AGC CHARGE
PUMP
+
–
+
–
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
–
–
+
–
–
+
–
–
INPUT
SEL
ATT
2
4
2
2
INPUT
IMPEDANCE
SEL
OFFSET
CANSEL
MNTR
CONTROL
SERIAL
PORT
REGISTER
4
FROM
S-PORT
4
FROM
S-PORT
INPUT
IMPEDANCE
SEL
3
FROM
S-PORT
CLAMP &
ENVELOPE
LEVEL
DAC
SIGDET
AGCO
BUFFER
55 54
53 52
50
49
OUTPUT
INHIBIT
FROM S-PORT
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
GCA
CD/DVD
4
FROM
S-PORT
3
FROM
S-PORT
MUX
3
FROM
S-PORT
GCA
3
FROM
S-PORT
3
FROM
S-PORT
EQ
VC
COMPARATOR
PHASE
DETECTOR
PHASE
DETECTOR
A+D
B+D
+
+
+
A+C
B+C
GCA
W/LPF
SUM
AMP
AMP
18 19 20
21 22
24 25
23
26
27
28 29
31
32
30
GCA
GCA
VCI FOR SERVO INPUT
VC = VPB/2
DUAL APC
LD H/L
FROM S-PORT
APC SEL
DVD/CD
TOPHOLD
GCA
TOPHOLD
GCA
41
48
47
46
45
GCA
OFFSET
CANSEL
5
FROM
S-PORT
GCA
40
GCA
OFFSET
CANSEL
6
FROM
S-PORT
3
FROM
S-PORT
GCA
GCA
CEFDB
CP/CN
LOW
IMPEDANCE
CD/DVD
SUB
GCA
MUX
GCA
LPF
GCA
LPF
39
38
37
36
OFFSET
CANSEL
PEAK/BOTTOM
HOLD
BOTTOM
ENVELOPE
INPUT
BUFFER
5
FROM
S-PORT
GCA
LPF
V25/2
TE
RST
35
34
33
FOR SERVO
OUTPUT
PH
TOP
HOLD
GCA
SEL
LINKEN
MUX
HOLDEN
+
–
+
–
COMPA-
RATOR
INTERNAL
FDGHG
HYSTERESISTER
& OFFSET
FROM S-PORT
MIRR
COMPARATOR
COMPARATOR
INPUT GAIN
FROM S-PORT
SEL
DAC
SINK CURRENT
FROM S-PORT
2
AGCO
FAST ATTACK
AGC
HOLD
BCA
DET
DET
2
FROM
S-PORT
PH
2
2
INPUT
IMPEDANCE
FROM S-PORT
44
43
42
V33 FOR
OUTPUT
OUTPUT
BUFFER
PI
FE
TE
CE
V25
V125
V25/3
LPF ATT
POL SEL
BUFFER
CONTROL
SIGNALS
TO EACH
BLOCK
3
CE ATT
CEPOL
D
C
B
A
CD F
CD E
VPB
VC
DVDLD
CDLD
CDPD
DVDPD
LDON
VNB
MIRR
MP
MB
MIN
MEVO
MLPF
CE
SDEN
SDATA
SCLK
V33
FE
TE
PI
V25
V125
TPH
DFT
LINK
LCP
LCN
MNTR
DVDRFP
DVDRFN
A2
B2
C2
D2
CP
CN
D
C
B
A
CD D
CD C
CD B
CD A
RFDC
RFSIN
ATOP
ATON
AIN
AIP
VPA
RFAC
VNA
BYP
DIN
DIP
FNP
FNN
MEV
RX
IC001 CXD1881R
(RF BOARD)
42
SCD-C555ES
IC904 BU2500FV-E2
(MAIN BOARD)
1
2
3
4
5
6
7
8
16
17
18
19
20
15
14
13
12
11
10
9
8bit R-2R
D/A CONV.
8bit R-2R
D/A CONV.
8bit LATCH
8bit LATCH
D0
1
2
3
4
5
6
D7
D8
9
1
0
D11
12bit
SHIFT REGISTER
ADD.
DECODER
D/A
D/A
L
L
D/A
L
D/A
L
D/A
L
D/A
L
D/A
L
D/A
D/A
D/A
L
LL
Ch3
4
5
6
7
8
9
10
Ch2
1
12
11
VSS
(VrefL)
VDD
(VrefH)
VCC
D0
A03
A04
A05
A06
A07
A08
A09
A010
A011
A012
LD
CLK
DI
A01
A02
GND
43
SCD-C555ES
IC906 TC74VHCT32AFT
(MAIN BOARD)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
4B
4A
4Y
3B
3A
3A
3Y
GND
2Y
2B
2A
1Y
1B
1A
IC812, IC813 SN74LV245PWR
(MAIN BOARD)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
DIR
A2
A3
A4
A5
A6
A7
A8
GND
ENABLE
G
V
CC
B1
B2
B3
B4
B5
B6
B7
B8
IC509 CXD3008Q
(MAIN BOARD)
26 27
28
29 30 31 32 33 34
35 36 37
38 39 40
TES1
SE
FE
VC
TFDR
DVSS1
FRDR
FFDR
TRDR
SRDR
SFDR
DVDD1
FST0
SSTP
TES1
80 79 78 77 76
75 74 73
72 71 70 69 68 67 66
XTSL
PCMD
BCK
EMPH
XOLT
XTA1
XTA0
SOUT
SOCK
SQSO
SQCK
SCSY
EXCK
EXCK
DVSS2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
XRST
VDD
MDP
LOCK
PWM1
DFCT
MIRR
COUT
DVSS
WDCK
FDK
SCOR
C2P0
XPCK
XUGF
WFCK
ATSK
SENS
CLOK
XLAT
DATA
SENS
CLOK
XLAT
DATA
MUTE
SCLK
GFS
C4M
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
65
64
47
46
45
44
43
42
41
LRCK
DOUT
VPC0
ASYE
MD2
FIL0
CLTV
ASY0
ASY1
RFAC
AVSS1
FIL1
PCO
DVDD2
BIAS
V16M
CE
TE
RFDC
AD10
AVSS0
1GEN
AVDD
CLOCK
GENERATOR
ASYMMETY
CORRECTOR
DIGITAL
PLL
EFM
DEMODURATOR
DIGITAL
PLL
CPU
INTERFACE
SERVO
AUTO
SEQUENCER
SERVO
INTERFACE
SUB
CODE
PROCESSOR
DIGITAL
OUT
ERROR
CORRECTOR
32K
RAM
D/A
INTERFACE
MIRR
DFCT
FOK
OP
AMP
ANALOG
SW
A/D
CONVERTER
FOCUS SERVO
TRACKING
SERVO
SERVO DSP
SLED PWM
GENERATOR
TRACKING PWM
GENERATOR
FOCUS PWM
GENERATOR
PWM GENERATOR
SLED SERVO
44
SCD-C555ES
4-26. IC PIN FUNCTION DESCRIPTION
• MAIN BOARD IC701 CXD1882R (DVD DECODER)
Pin No.
1, 2
3
4
5
6
7
8
9 to 14
15
16
17
18
19
20, 21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59, 60
I/O
I/O
—
I/O
I
—
I
—
I
—
O
I
I
I
O
—
I
O
—
O
O
—
O
O
O
O
—
O
O
—
O
—
O
O
O
—
O
O
O
O
—
O
O
—
O
—
I
O
O
I
I/O
—
I
Description
Two-way data bus with the CPU (IC901) and expander (IC902)
Ground terminal (digital system)
Two-way data bus with the CPU (IC901) and expander (IC902)
Address signal input from the CPU (IC901)
Power supply terminal (+3.3V) (digital system)
Address signal input from the CPU (IC901)
Power supply terminal (+5V)
Address signal input from the CPU (IC901)
Ground terminal (digital system)
Wait signal output terminal Not used (open)
Read strobe signal input from the CPU (IC901)
Write strobe signal input from the CPU (IC901)
Chip select signal input from the CPU (IC901)
Interrupt signal output to the CPU (IC901)
Power supply terminal (+3.3V) (digital system)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Ground terminal (digital system)
Error flag signal output to the DSD decoder (IC801)
Stream data signal output to the DSD decoder (IC801)
Power supply terminal (+5V) (digital system)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Ground terminal (digital system)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Power supply terminal (+3.3V) (digital system)
Not used (open)
Power supply terminal (+5V) (digital system)
Stream data signal output to the DSD decoder (IC801)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Ground terminal (digital system)
Not used (open)
Stream data signal output to the DSD decoder (IC801)
Not used (open)
Serial data transfer acknowledge signal output to the DSD decoder (IC801)
Power supply terminal (+5V) (digital system)
Serial data transfer clock signal output to the DSD decoder (IC801)
Header flag signal output to the DSD decoder (IC801)
Power supply terminal (+3.3V) (digital system)
Not used (pull up)
Ground terminal (digital system)
Serial data transfer request signal input from the DSD decoder (IC801)
Not used (pull up)
Not used (pull up)
Not used (fixed at “H” )
Not used (pull up)
Power supply terminal (+5V) (digital system)
Not used (fixed at “H” )
Pin Name
D5, D6
VSS
D7
A0
VDD
A1
VDD5V
A2 to A7
VSS
XWAIT
XRD
XWR
XCS
XINT0, XINT1
VDD
XHRS
HDB7
VSS
HDB8
HDB6
VDDS
HDB9
HDB5
HDBA
HDB4
VSS
HDBB
HDB3
VDD
HDBC
VDDS
HDB2
HDBD
HDB1
VSS
HDBE
HDB0
HDBF
XACK
VDDS
DCK
XSHDR0
VDD
REDY
VSS
REQUEST
HINT
XS16
HA1
XPDI
VDDS
HA0, HA2
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