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Model
SCD-C2000ES
Pages
40
Size
4.89 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
scd-c2000es.pdf
Date

Sony SCD-C2000ES Service Manual ▷ View online

25
25
SCD-C2000ES
SCD-C2000ES
4-12. SCHEMATIC DIAGRAM — MD-94 BOARD SECTION  —
20
3/4
CN704
CN001
S001
CN003
CN004
CN002
CN101
CN102
M001
PH101
PH102
11P
3P
2P
6P
6P
2P
RPR-220C1N
RPI-392
D
26
26
SCD-C2000ES
SCD-C2000ES
• IC Pin Function Description
• MAIN BOARD IC705  HD6432238RP02TEV (MASTER CONTROL)
• IC Block Diagrams
IC701
M51957BFP-600C
+
3
4
NC
IN
NC
GND
NC
VCC
OUT
C
1.25V
1
7
6
5
8
2
IC702
BR9040F-WF2
8
7
6
5
1
2
3
4
DI
DO
GND
WC
SK
CS
VCC
R/B
COMMAND DECODE
CONTROL CLOCK
GENERATION
POWER
SUPPLY
VOLTAGE
DETECTOR
HIGH VOLTAGE
GENERATOR
WRITE
DISABLE
COMMAND
REGISTER
ADDRESS
BUFFER
DATA
REGISTER
ADDRESS
DECODER
R/W
AMP
4096bit
EEPROM ARRAY
8bit
16bit
16bit
8bit
– MAIN Board –
Pin No.
Pin Name
I/O
Description
1
SDATA DAC
O
Data output to the  DAC (IC200)
2
SCLK DAC
O
Clock output to the  DAC (IC200)
3
SLATR DAC
O
Latch (R-ch) output to the  DAC (IC200)
4 to 11
CD0 to 7
I/O
Data Bus to the Digital Servo Processor (IC706)
12
CVCC
Power supply terminal (+3.3V)
13
CA0
O
Address Bus to the Digital Servo Processor (IC706)
14
VSS
Ground terminal
15 to 22
CA1 to 8
O
Address Bus to the Digital Servo Processor (IC706)
23
PB1
Not used (open)
24
PB2
Not used (open)
25
LOAD S0
I
DISK cyacking select (SO)
26
LOAD S1
I
TRAY (S2:OPEN)
27
LOAD S2
I
TRAY (S1:TURN)
28
TSENS
I
T sens signal input
29
DSENS
I
DISK sens signal input
30
TRAY IN
O
TRAY in control output to the Motor Driver (IC712)
31
RS232CTX
O
PC serial signal
32
RS232CRX
I
PC serial signal
33
TRAY OUT
O
TRAY out control  output to the Motor Driver (IC712)
34
P10
Not used (open)
35
DRV ON
O
Driver mute output to the Motor Driver (IC712)
36
SP ON
O
Spindle mute output to the Motor Driver (IC712)
37
P13
 —
Not used (open)
38
XLDON
O
LD ON/OFF output to the Motor Driver (IC712)
39
TRMP
O
Table control (+Clockwise) output to the TMD (IC710)
40
TRMM
O
Table control (-Counterclock) output to the TMD (IC710)
41
P17
Not used (open)
42
AVSS
Ground terminal
43
DIAO
I
Test Mode input
44
P96
Ground terminal
45 to 50
P47 to P42
Ground terminal
51
MODEL
I
Model check (L:1Hi,Mi:5Es,H:5 Hi)
52
JIT
I
Waltz jetter select
53
VREF
I
Reference voltage
54
AVCC
Power supply terminal (+3.3V)
55
MD0
I
Muving mode control 0
56
MD1
I
Muving mode control 1
57
OSC2
Not used (open)
58
OSC1
Ground terminal
59
XRST
O
System reset
60
XNMI
I
NMI input (fixed at “H”)
61
XSTBY
I
Standby input (fixed at “H”)
62
VCC
Power supply terminal (+3.3V)
63
XTAL
Not used (open)
64
VSS1
Ground terminal
65
EXTAL
I
External clock input
IC803
TC7W53F (TE12R)
– DISPLAY Board –
2
8
3
4
LOGIC
LEVEL
CONVERTER
OUT
OUT
IN
IN
C
COM
VCC
CH 0
CH 1
A
INH
VEE
GND
C
7
6
1
5
Ver. 1.2
27
SCD-C2000ES
Pin No.
Pin Name
I/O
Description
66
FEW
I
Flash writing Enable
67
MD2
I
Muving mode control 2
68
PF7
Not used (open)
69
AS
Not used (open)
70
XDR
O
Reed sycle signal
71
XWR
O
Write sycle signal
72
XWRST
O
Waltz reset  signal output
73
XWAIT
I
Bus sycle wait signal input
74
SMUTE
O
Waltz smute signal output
75
EPR/B
I
Read/Busy  signal input from the EEPROM (IC702)
76
XEPCE
O
XCS signal output to the EEPROM (IC702)
77
XEWC
O
XWC signal output to the EEPROM (IC702)
78
P32
O
Not used (open)
79
EEPS0
O
Communication signal to the EEPROM (IC702)
80
EEPS1
I
Communication signal from the EEPROM (IC702)
81
EEPSC
O
Communication signal to the EEPROM (IC702)
82
P36
 —
Not used (open)
83
IFS0
O
Communication signal to the IS CON (IC801)
84
IFS1
I
Communication signal from the IS CON (IC801)
85
IFSCK
O
Communication signal to the IS CON  (IC801)
86
P74
Not used (open)
87
XCS
O
WALTZ chip select
88
P72
Not used (open)
89
P71
Not used (open)
90
P70
Not used (open)
91
XIFINT
I
ACK input signal from the IS CON  (IC801)
92
XINTO
I
WALTZ input from the Digital Servo Processor (IC706)
93
PG2
Ground terminal
94
MZR
I
ZEROR input signal from DAC (IC200)
95
MZL
I
ZEROL input signal from DAC (IC200)
96
XIFCS
O
Chip select to the IS CON (IC801)
97
R MUTE
O
Rch mute signal output
98
L MUTE
O
Lch mute signal output
99
INIT DAC
O
DAC int output
100
M/2
O
Mch mute control output (surr/Cntr/Sw)
28
SCD-C2000ES
SECTION 5
TEST MODE
1. Setting Methed of Test Mode
Press three buttons  m  , [PUSH ENTER] and [POWER] simulta-
neously, The test mode becomes active. Then all segments of the
fluorecent indicator tube are turned on.
2. FL Tube Grid, Segments Check
Procedure:
1. Grid of all segments lights up sequentially starting from 1G to
16G.
2. The vertical line (total 5 lines) of all grids lights up sequentially
in the range of 5G to 16 G starting from the left.
3. The horizontal line of (total 7 lines) of all grids lights up
sequentially in the range of 5G to 16G starting from the top.
3. Sircs Receive Check
Procedure:
1. The message “SIRCS CHECK” is displayed on the fluorecent
indicator tube.
2. With the machine in the status that is set in step 2, press any
on the remote commander. The machine enters the key check
standby state. (When the  H  key or the  x  key is pressed,
the reception check is canceled.)
4. Key Check
Procedure:
1. In the key check mode, the fluorecent indicator displays “KEY
CHECK**”. Each time a button is pressed, “**” value.
However, once a button is pressed, it is no longer taken into
account.
2. To  exit from this mode, the message “JOG CHECK” is
displayed.
5. Jog Check
Procedure:
1.  After the key check is completed, turn JOG clockwise to turn
on the calendar segments sequentially. When the segment “15”
is confirmed, turn JOG counter-clockwise that turns off the
calendar segment. When the segment “1” is confirmed, this is
the end of check.
6. Releasing Meted of Test Mode
1. After all the checks are completed, confirm to see that the
display “TEST-END” appears. The message indicates that
the check is ended normally.
2. Press the [POWER]  button to turn off the main power and
disconnect the power plug from the wall outlet.
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