Sony SA-WNT3 Service Manual ▷ View online
SA-WNT3
21
• IC Block Diagrams
IC7102 SI-3010KM-TLA (SUB MAIN BOARD (3/3))
IC7201 TC74LCX74FT (EKJ) (SUB MAIN BOARD (2/3))
14
1 2 3
4 5 6
7
13 12 11
10
9 8
VCC
2/CLR
2D
2CLK
2/PRE
2Q
2/Q
GND
1/Q
1Q
1/PRE
1CLK
1D
1/CLR
CK
CLR
CK
CLR
Q
PR
Q
Q
PR
Q
D
D
IC7202 TAS5534DGGR (SUB MAIN BOARD (2/3))
1
VC
TSD
2
VIN
3
GND
4
VOUT
5
ADJ
+
–
REF
I2C SERIAL
CONTROL
INTERFACE
CLOCK, PLL,
AND
SERIAL DATA
INTERFACE
PWM_HPM_L 1
PWM_HPP_L 2
PWM_HPM_R 3
PWM_HPP_R 4
PLL_FLTM 6
PLL_FLTP 7
LRCLK 22
SCLK 23
SDIN1 24
SDIN2 25
SDIN3 26
SDIN4 27
SDIN2 25
SDIN3 26
SDIN4 27
VR_DIG 28
RESET 16
HP_SEL 17
PDN 18
MUTE
ASEL_EMO2 10
EMO1 15
DVDD2_CORE 14
DVSS2_CORE 13
AVDD 9
VR_ANA 8
OSC_RES 12
MCLK 11
19
SDA 20
AVSS 5
DEVICE
CONTROL
DIGITAL
AUDIO
PROCESSOR
POWER
SUPPLY
SUPPLY
SCL 21
AVSS_PWM
51
AVDD_PWM
50
PWM_P_1
39
PWM_M_1
38
PWM_P_2
41
PWM_M_2
40
PWM_P_3
43
PWM_M_3
42
NC_45
45
NC_44
44
NC_47
47
NC_46
46
PWM_P_4
49
PWM_M_4
48
NC_54
54
NC_53
53
NC_56
56
NC_55
55
LRCLKO
31
SCLKO
30
PSVC
33
VALID
37
TEST
32
SDOUT
29
VR_RWM
52
DVSS1_CORE
36
DVDD1_CORE
35
BKND_ERR
34
PWM
SECTION
SA-WNT3
22
IC7203 TAS5614LA (SUB MAIN BOARD (2/3))
IC7402 PST8429UL (SUB MAIN BOARD (1/3))
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
PVDD_CD_31
OUT_C
PVDD_CD_30
PVDD_CD_29
GND_33
POWER-UP
RESET
UVP
+
–
–
+
–
–
+
–
–
+
–
–
GND_34
OUT_B
PVDD_AB_38
GND_42
GND_41
BST_A
BST_B
PVDD_AB_36
PVDD_AB_37
OUT_A_39
OUT_A_40
OUT_D_27
GND_26
GND_25
BST_C
BST_D
OUT_D_28
GVDD_AB
VDD
OC_ADJ
RESET
INPUT_A
INPUT_B
C_START
GND_9
GND_11
GND_10
GND_12
AVDD
INPUT_C
INPUT_D
OTW
DVDD
CLIP
FAULT
M3
M2
M1
GVDD_CD
TEMP
SENSE
AVDD
DVDD
STARTUP
CONTROL
PROTECTION & I/O LOGIC
CB3C OVER-
LOAD
PROTECTION
PWM
RECEIVER
PWM
RECEIVER
PWM
RECEIVER
PWM
RECEIVER
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
ANALOG
LOOP FILTER
PWM & TIMING
CONTROL
PWM & TIMING
CONTROL
PWM & TIMING
CONTROL
PWM & TIMING
CONTROL
GATE-
DRIVE
DRIVE
GATE-
DRIVE
DRIVE
GATE-
DRIVE
DRIVE
GATE-
DRIVE
DRIVE
GND 1
VDD 2
+
–
–
VREF
OUT
4
CD
3
SA-WNT3
23
• IC Pin Function Description
SUB MAIN BOARD (1/3) IC7400 MB9AF142LBPMC1-G-JNE2 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VCC
-
Power supply terminal (+3.3V)
2
DC_DET
I
Speaker DC detection signal input terminal "L": speaker DC is detected
3
DRIVER_SD
I
DAMP driver shutdown
4
P_DAMP_CLIP
I
DAMP CLIP for VACS
5
NO USE
-
Not used
6
TAS5534_SCL
O
Serial data transfer clock signal output to the stream processor
7
TAS5534_SDA
I/O
Two-way data bus with the stream processor
8
NO USE
-
Not used
9
TAS5534_XPDN
O
TAS5534 power down
10
TAS5534_XRST
O
TAS5534 reset
11
TAS5534_MUTE
O
TAS5534 mute
12
NO USE
-
Not used
13
P_CONT_ACDET
O
AC detect control port
14
LED_RED
O
Red LED Control
15
LED_GREEN
O
Green LED Control
16
VSS
-
Ground terminal
17
C
I
Power stabilization capacity
18
VCC
-
Power supply terminal (+3.3V)
19
NO USE
-
Not used
20
NO USE
-
Not used
21
INITX(RESET)
I
External Reset Input
22
NO USE
-
Not used
23
NO USE
-
Not used
24
WS_RST
O
Wireless Sound Reset
25
WS_SCL
O
Wireless Sound Clock
26
WS_SDA
I/O
Wireless Sound Data
27
WS_INT
I
Wireless Sound Interrupt
28
MD1
I
MD1="L": Flash memory write mode
29
MD0
I
MD0="L": normal "H":Flash memory write mode
30
X0
I
Main Clock IN (4MHz)
31
X1
O
Main Clock OUT (4MHz)
32
VSS
-
Ground terminal
33
VCC
-
Power supply terminal (+3.3V)
34
KEY_PAIRING
I
KEY INPUT 0
35
KEY_POWER
I
Wakeup from ECO MODE by Power Key Input
36
MODEL
I
Model select
37
DEST
I
Destination select
38
PULL_UP_POWER
O
Control port for MODEL/DEST AVCC
39
NO USE
-
Not used
40
AC_CUT
I
AC cut detection signal input terminal "L": AC cut is detected
41
AVCC
-
Power supply terminal (+3.3V)
42
AVRH
I
Standard power supply pin for A/D converter
43
AVSS
-
Ground terminal
44
P_CONT1
O
Control for Power Supply (for TAS5534)
45
P_CONT2
O
Control for Power Supply (for general device)
46
ON CHIP DEBUG /
CLK1
I
On Chip Debugger
47
(PROG_VUTX)
O
for uCom Flash PROGRAMMING / for Debug
48
(PROG_VURX)
I
for uCom Flash PROGRAMMING / for Debug
49
NO USE
-
Not used
50
TCK
I
J-TAG test clock input
51
TDI
I
J-TAG test data input
52
TMS
I
J-TAG test data input
53
TDO
I
J-TAG test data output
54
NO USE
-
Not used
55
NO USE
-
Not used
56
NO USE
-
Not used
SA-WNT3
24
Pin No.
Pin Name
I/O
Description
57
NO USE
-
Not used
58
NO USE
-
Not used
59
NO USE
-
Not used
60
PVDD_STBY
O
PVDD standby
61
VCC
-
Power supply terminal (+3.3V)
62
PVDD_SD_EN
O
PVDD shutdown enable
63
NO USE
-
Not used
64
VSS
-
Ground terminal
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