Sony NWZ-S515 / NWZ-S516 / NWZ-S615F / NWZ-S616F / NWZ-S618F Service Manual ▷ View online
NWZ-S515/S516/S615F/S616F/S618F
33
• IC Pin Function Description
MAIN BOARD IC302 CS42L51-CNZR (NWZ-S615F/S616F/S618F), CS43L21-CNZR (NWZ-S515/S516)
(A/D CONVERTER, D/A CONVERTER, HEADPHONE AMP)
MAIN BOARD IC302 CS42L51-CNZR (NWZ-S615F/S616F/S618F), CS43L21-CNZR (NWZ-S515/S516)
(A/D CONVERTER, D/A CONVERTER, HEADPHONE AMP)
Pin No.
Pin Name
I/O
Description
1
LRCK
O
L/R sampling clock signal output to the system controller
2
SDA/CDIN
I
Serial data input from the system controller
3
SCL/CCLK
I
Serial data transfer clock signal input from the system controller
4
AD0/nCS
I
Chip select signal input from the system controller
5
VA_HP
-
Power supply terminal (+1.8V)
6
FLYP
I
External charge pump capacitor (positive node) connection terminal
7
GND_HP
-
Ground terminal
8
FLYN
I
External charge pump capacitor (negative node) connection terminal
9
VSS_HP
O
Negative voltage from charge pump output terminal
10
AOUTB
O
Analog audio (R-ch) signal output to the headphone and WM-PORT connector
11
AOUTA
O
Analog audio (L-ch) signal output to the headphone and WM-PORT connector
12
VA
-
Power supply terminal (+1.8V)
13
AGND
-
Ground terminal
14
DAC_FILT+
O
Positive reference voltage output terminal
15
VQ
O
Quiescent voltage output terminal
16
ADC_FILT+
O
Positive reference voltage output terminal
17
MICIN1/AIN3A
I
Microphone signal input terminal Not used
18
MICIN2/AIN3B/BIAS
I
Microphone signal input terminal Not used
19
AIN2A
I
Analog audio (L-ch) signal input from the FM tuner (NWZ-S615F/S616F/S618F only)
20
AIN2B/BIAS
I
Analog audio (R-ch) signal input from the FM tuner (NWZ-S615F/S616F/S618F only)
21, 22
AFILTA, AFILTB
O
Filter connection terminal
23
AIN1A
I
Analog audio (L-ch) signal input terminal Not used
24
AIN1B
I
Analog audio (R-ch) signal input terminal Not used
25
nRESET
I
Reset signal input from the system controller
26
VL
-
Power supply terminal (+2.9V)
27
VD
-
Power supply terminal (+1.8V)
28
DGND
-
Ground terminal
29
SDOUT
O
Serial audio data output to the system controller
30
MCLK
I
Master clock signal input from the system controller
31
SCLK
O
Bit clock signal output to the system controller
32
SDIN
I
Serial audio data input from the system controller
33
AGND
-
Ground terminal
NWZ-S515/S516/S615F/S616F/S618F
34
MAIN BOARD IC601 MC-10051F1-FAE-A (SYSTEM CONTROLLER, DSP, POWER CONTROLLER, LCD DRIVER,
NAND FLASH MEMORY INTERFACE, SD-RAM INTERFACE)
NAND FLASH MEMORY INTERFACE, SD-RAM INTERFACE)
Pin No.
Pin Name
I/O
Description
A1 to A3
NC
-
Not used
A4
NAND_WEZ
O
Write enable signal output to the NAND fl ash memory
A5
IO_B
-
Not used
A6 to A10
NC
-
Not used
A11 to A13
GND
-
Ground terminal
A14 to A16
NC
-
Not used
A17
VCCVBUS
I
Power supply input terminal (+5V)
A18
NC
-
Not used
A19
IO_A
-
Not used
A20
VDD_L0
I
Power supply input terminal (+1.2V)
A21
AB0_A8
O
Address signal output to the USB controller
A22 to A26
NC
-
Not used
B1, B2
NC
-
Not used
B3
NAND_CEZ2
O
Chip enable signal output to the NAND fl ash memory (NWZ-S516/S616F/S618F only)
B4
NAND_DA0
I/O
Two-way data bus with the NAND fl ash memory
B5
IO_B
-
Not used
B6
KEY_AD1
I
Key input terminal (A/D input)
B7, B8
ADIN6, ADIN8
-
Not used
B9
ADVCC
I
Power supply input terminal (+2.85V)
B10
CPEN
-
Not used
B11, B12
GND
-
Ground terminal
B13
SWGND
-
Ground terminal
B14
NC
-
Not used
B15
SWADP2
-
Not used
B16
GND
-
Ground terminal
B17
VCCADP
I
Power supply input terminal (+5V)
B18
NC
-
Not used
B19
IO_A
-
Not used
B20
VDD_L0
I
Power supply input terminal (+1.2V)
B21 to B26
NC
-
Not used
C1
NC
-
Not used
C2
NAND_CEZ1
O
Chip enable signal output to the NAND fl ash memory
C3
NAND_CEZ3
O
Chip enable signal output to the NAND fl ash memory (NWZ-S516/S616F/S618F only)
C4
NAND_DA1
I/O
Two-way data bus with the NAND fl ash memory
C5
IO_B
-
Not used
C6
KEY_AD0
I
Key input terminal (A/D input)
C7
ADIN5
-
Not used
C8
CRD_AD
I
A/D value detection signal input from the WM-PORT connector
C9
ADGND
-
Ground terminal
C10
NC
-
Not used
C11
GND
-
Ground terminal
C12
NC
-
Not used
C13
GND
-
Ground terminal
C14
NC
-
Not used
C15
SWADP
-
Not used
C16
CAPVBDL
-
Not used
C17
VCCVBAT
I
Power supply input terminal (+2.3 - 4.2V)
C18
NC
-
Not used
C19
IO_A
-
Not used
C20
AB0_A5
O
Address signal output to the USB controller
C21 to
C24
NC
-
Not used
C25
AB0_D1
I/O
Two-way data bus with the USB controller
C26
NC
-
Not used
NWZ-S515/S516/S615F/S616F/S618F
35
Pin No.
Pin Name
I/O
Description
D1
IDPULLUP
-
Not used
D2
NAND_RBZ0
O
Read/busy signal output to the NAND fl ash memory
D3
NAND_ALE
O
Address latch enable signal output to the NAND fl ash memory
D4
NAND_DA2
I/O
Two-way data bus with the NAND fl ash memory
D5
IO_B
-
Not used
D6, D7
VDD_L1
I
Power supply input terminal (+1.2V)
D8
GND
-
Ground terminal
D9
NC
-
Not used
D10
GND
-
Ground terminal
D11 to D14
NC
-
Not used
D15
SWVBUS2
-
Not used
D16
CAPVBSW
-
Not used
D17
VCCVBAT
I
Power supply input terminal (+2.3 - 4.2V)
D18
AB0_A3
O
Address signal output to the USB controller
D19
IO_A
-
Not used
D20
AB0_A6
O
Address signal output to the USB controller
D21 to
D23
NC
-
Not used
D24, D25
AB0_D0, AB0_D2
I/O
Two-way data bus with the USB controller
D26
NC
-
Not used
E1
DISCHGVBUS
-
Not used
E2
NC
-
Not used
E3
NAND_REZ
O
Read enable signal output to the NAND fl ash memory
E4
NAND_DA3
I/O
Two-way data bus with the NAND fl ash memory
E5
IO_B
-
Not used
E6
NAND_DA5
I/O
Two-way data bus with the NAND fl ash memory
E7
NC
-
Not used
E8
NAND_DA7
I/O
Two-way data bus with the NAND fl ash memory
E9
NAND_CLE
O
Command latch enable signal output to the NAND fl ash memory
E10
BATSEL
-
Not used
E11
SWBAT
-
Not used
E12
CAPBTDL
-
Not used
E13
CAPADDL
-
Not used
E14
NC
-
Not used
E15
SWVBUS
-
Not used
E16, E17
NC
-
Not used
E18
AB0_A4
O
Address signal output to the USB controller
E19
FLASHCLK
O
Clock signal output terminal
E20
AB0_A7
O
Address signal output to the USB controller
E21 to E23
NC
-
Not used
E24
AB0_XDRQ
-
Not used
E25
AB0_D4
I/O
Two-way data bus with the USB controller
E26
NC
-
Not used
F1
DGND
-
Ground terminal
F2
CHGVBUS
-
Not used
F3, F4
NC
-
Not used
F5
IO_B
-
Not used
F22
AB0_CSZ2
O
Chip select signal output to the USB controller
F23
AB0_XACK
-
Not used
F24, F25
AB0_D3, AB0_D5
I/O
Two-way data bus with the USB controller
F26
NC
-
Not used
G1
DVDD
I
Power supply input terminal (+2.85V)
G2, G3
NC
-
Not used
G4
EXTRST
I
RESET switch input terminal
G5
NC
-
Not used
G22
ETHER_XINT
-
Not used
NWZ-S515/S516/S615F/S616F/S618F
36
Pin No.
Pin Name
I/O
Description
G23 to
G25
AB0_D15 to AB0_D13
I/O
Two-way data bus with the USB controller
G26
NC
-
Not used
H1
USBSUSPD
-
Not used
H2
NC
-
Not used
H3 to H5
SDR_DATA25, SDR_
DATA27, SDR_DATA31
I/O
Two-way data bus with the 256M bit SD-RAM
H8
NAND_RBZ1
O
Read/busy signal output to the NAND fl ash memory
H9 to H12
NC
-
Not used
H13
NC_POWER
O
Power control signal output terminal Not used
H14, H15
NC
-
Not used
H16
AB0_WRZ
O
Write strobe signal output to the USB controller
H17
NC
-
Not used
H18, H19
AB0_A1, AB0_A2
O
Address signal output to the USB controller
H22 to
H25
AB0_D8, AB0_D9,
AB0_D7, AB0_D6
I/O
Two-way data bus with the USB controller
H26
NC
-
Not used
J1 to J3
IO_A
-
Not used
J4, J5
SDR_DATA29,
SDR_DATA30
I/O
Two-way data bus with the 256M bit SD-RAM
J8
NAND_RBZ2
O
Read/busy signal output to the NAND fl ash memory (NWZ-S516/S616F/S618F only)
J9
NC
-
Not used
J10
SPI_CS_SEL
O
Chip select signal selection signal output terminal Not used
J11 to J17
GND
-
Ground terminal
J18
NC
-
Not used
J19
AB0_RDZ
O
Read strobe signal output to the USB controller
J22 to J24
AB0_D10 to AB0_D12
I/O
Two-way data bus with the USB controller
J25
CHGGND1
-
Ground terminal
J26
NC
-
Not used
K1 to K3
VDD_L1
I
Power supply input terminal (+1.2V)
K4, K5
SDR_DATA28,
SDR_DATA26
I/O
Two-way data bus with the 256M bit SD-RAM
K8
NAND_RBZ3
O
Read/busy signal output to the NAND fl ash memory (NWZ-S516/S616F/S618F only)
K9
NAND_DA6
I/O
Two-way data bus with the NAND fl ash memory
K10 to K18
GND
-
Ground terminal
K19
NC
-
Not used
K22
LCD_HSYNC
O
Horizontal sync signal output to the liquid crystal display
K23
LCD_ENABLE
O
Enable signal output to the liquid crystal display
K24
LCD_VSYNC
O
Vertical sync signal output to the liquid crystal display
K25
CHGGND2
-
Ground terminal
K26
NC
-
Not used
L1 to L5
SDR_DATA23 to SDR_
DATA20, SDR_DATA24
I/O
Two-way data bus with the 256M bit SD-RAM
L8
SDR_DATA19
I/O
Two-way data bus with the 256M bit SD-RAM
L9
NAND_DA4
I/O
Two-way data bus with the NAND fl ash memory
L10
GND
-
Ground terminal
L11
NC
-
Not used
L17, L18
GND
-
Ground terminal
L19
LCD_B1
O
RGB video (blue) signal output to the liquid crystal display
L22 to
L25
LCD_B2 to
LCD_B5
O
RGB video (blue) signal output to the liquid crystal display
L26
NC
-
Not used
M1 to M5
SDR_DATA18 to
SDR_DATA14
I/O
Two-way data bus with the 256M bit SD-RAM
M8
SDR_DATA13
I/O
Two-way data bus with the 256M bit SD-RAM
M9
NAND_CEZ0
O
Chip enable signal output to the NAND fl ash memory
M10
GND
-
Ground terminal
M17, M18
GND
-
Ground terminal
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