Sony NW-S603 / NW-S605 / NW-S703F / NW-S705F / NW-S706F Service Manual ▷ View online
33
NW-S603/S605/S703F/S705F/S706F
•
IC Pin Function Description
MAIN BOARD IC101 CXD5090B1-003GG (CPU)
Pin No.
Pin Name
I/O
Description
1 to 8
NAD0/GPIOC0 to
NAD7/GPIOC7
I
Data signal input from the NAND flash ROM
9
NCLE/GPIOC8
O
Command latch enable signal output to the NAND flash ROM
10
NALE/GPIOC9
O
Address latch enable signal output to the NAND flash ROM
11
NCE0/GPIOC10
O
Chip enable signal output to the NAND flash ROM
12
NCE1/GPIOC11
O
Chip enable signal output terminal Not used
13
NCE2/GPIOC12
O
Battery power supply voltage detection ON/OFF control signal output terminal
14
NCE3/GPIOC13
I
USB power supply voltage detection signal input terminal
15
NRE/GPIOC14
O
Read signal output to the NAND flash ROM
16
NWE/GPIOC15
O
Write signal output to the NAND flash ROM
17
NWP/GPIOC16
O
Write protection signal output to the NAND flash ROM
18, 19
NRB0/GPIOC17,
NRB1/GPIOC18
O
Read/Busy signal output to the NAND flash ROM
20, 21
NRB2/GPIOC19,
NRB3/GPIOC20
O
Read/Busy signal output terminal Not used
22
DVS
-
Ground terminal
23, 24
DVDIO2
-
Power supply terminal
25
DVS
-
Ground terminal
26
DVDK2
-
Power supply terminal
27
DVS
-
Ground terminal
28
CRST2
I
Reset signal input terminal Not used
29
RST2OUT
O
Reset signal output to the power control IC
30
RST2VDD
-
Power supply terminal
31
T_ADINL
-
Not used
32
HPVDD
-
Power supply terminal
33
HPOUTL
O
Internal D/A converter audio signal output terminal (headphone L-ch)
34
PVDD
-
Power supply terminal
35
PGND
-
Ground terminal
36
HPOUTR
O
Internal D/A converter audio signal output terminal (headphone R-ch)
37
HPGND
-
Ground terminal
38
GPION0/INT8
I
System wake up signal input by any key is pressed
39
GPION1/INT9
I
Key input terminal (A/D input) (hold switch)
40
GPION2/INT10
I
Key input terminal (A/D input) (normal/folder key)
41
GPION3/INT11
I
Key input terminal (A/D input) (PLAY, STOP key)
42
TDI
I
Serial data input terminal (for JTAG) Not used
43
TMS
I
Test mode control signal input terminal (for JTAG) Not used
44
TCK
I
Serial data transfer clock signal input terminal (for JTAG) Not used
45
TDO
O
Serial data transfer clock signal output terminal (for JTAG) Not used
46
TRST
I
Reset signal input terminal (for JTAG) Not used
47
TEST
I
Boot control signal input terminal Not used
48
EVA
I
EVA/FLASH modes selection signal input terminal Not used
49
TREQA
I
Request signal input terminal (for JTAG) Not used
50
TACK
O
Request signal output terminal (for JTAG) Not used
51
SCL/GPIOK0
O
Muting ON/OFF control signal output terminal
52
SDA/GPIOK1
I/O
Serial data input/output terminal Not used
53
EC0/INT6/
GPIOL0
I
Model setting terminal Not used
34
NW-S603/S605/S703F/S705F/S706F
Pin No.
Pin Name
I/O
Description
54
T1/GPIOL1
O
LINE amplifier power supply ON/OFF control signal output terminal
55
EC2/INT7/
GPIOL2
I
Headphone detection signal input terminal
56
T3/GPIOL3
O
Power supply ON/OFF control signal output terminal for the NAND flash ROM
57
BEEP/GPIOL4
O
Beep signal output terminal
58
PWM/SUSPEND/
GPIOL5
O
Power supply ON/OFF control signal output terminal for the organic EL indicator module
59
DVS
-
Ground terminal
60, 61
DVDIO2
-
Power supply terminal
62
DVS
-
Ground terminal
63
DVDK2
-
Power supply terminal
64
DVS
-
Ground terminal
65
BEEPEN
I
Beep signal input terminal
66
HPINL
I
Internal D/A converter audio signal input terminal (headphone L-ch)
67
HPLININL
I
Internal D/A converter audio signal input terminal (microphone L-ch)
68
HPINR
I
Internal D/A converter audio signal input terminal (headphone R-ch)
69
HPLININR
I
Internal D/A converter audio signal input terminal (microphone L-ch)
70
AVDLPF
-
Power supply terminal (for LPF)
71
VREFL
O
Reference voltage output terminal for the headphone amplifier (L-ch)
72
AOUTL
O
Internal audio chip audio signal output terminal (WM-port L-ch)
73
AOUTR
O
Internal audio chip audio signal output terminal (WM-port R-ch)
74
VREFR
O
Reference voltage output terminal for the headphone amplifier R-ch)
75
AVSLPF
-
Ground terminal (for LPF)
76
AVDADC
-
Power supply terminal
77, 78
AN0, AN1
I
Key input terminal (A/D input)
79 to 81
AN2 to AN4
-
Not used
82
AN5
I
Terminal for peripherals distinction of WM-port
83
AN6
I
Internal A/D converter analog signal input terminal Not used
84
AN7
I
Battery power supply voltage detection signal input terminal
85
AVSADC
-
Ground terminal
86
SDCLK
O
Not used
87
SDCMD/INT1/
GPIOF0
I
Wake up signal input from the WM-port
88
SDDAT0/DREQ/
INT2/GPIOF1
O
Chip enable signal output to the real time clock
89
SDDAT1/DACK/
INT3/GPIOF2
I
DC power supply voltage detection signal input terminal
90
SDDAT2/INT4/
GPIOF3
O
Control signal output to the organic EL indicator module
91
SDDAT3/INT5/
GPIOF4
O
Reset signal output to the organic EL indicator module
92
DVS
-
Ground terminal
93
DVDIO2
-
Power supply terminal
94
DVDK2
-
Power supply terminal
95
DVS
-
Ground terminal
96
DVDIO2
-
Power supply terminal
97
DVS
-
Ground terminal
98
MSBS/INT0/
GPIOE0
O
Not used
35
NW-S603/S605/S703F/S705F/S706F
Pin No.
Pin Name
I/O
Description
99
MSSCLK
O
Not used
100
MSDIO0/
GPIOE1
O
Not used
101 to 103
MSDIO1/
GPIOE2 to
MSDIO3/
GPIOE4
O
Battery charge control signal output to the power control IC
104
MSINS/GPIOE5
I
Not used
105
MCSEL
I
Not used
106
CBIAS
-
Not used
107
CCOM
-
Not used
108
HPREF
-
Not used
109
CSOFT
-
Not used
110
TESTAUD
-
Not used
111
DGND
-
Ground terminal
112
DVDD
-
Power supply terminal
113
ARST
O
System reset signal output terminal
114
AVDOSC1
-
Power supply terminal
115
EXTAL
I
Main system clock input terminal (45.1584 MHz)
116
XTAL
O
Main system clock output terminal (45.1584 MHz)
117
AVSOSC
-
Ground terminal
118
TEX
I
Sub system clock input terminal (12 MHz)
119
TX
O
Sub system clock output terminal (12 MHz)
120
AVDOSC2
-
Power supply terminal
121
AVSPLL
-
Ground terminal
122
AVDPLL
-
Power supply terminal
123
AVDUSB
-
Power supply terminal
124
AVSUSB
-
Ground terminal
125
DP
I/O
Two-way data bus for USB communication (+)
126
DN
I/O
Two-way data bus for USB communication (-)
127
VBUS/GPIOD0
I
USB power supply voltage detection signal input terminal
128
TxD0/GPIOI0
O
Not used
129
RxD0/GPIOI1
I
Not used
130
TxD1/GPIOJ0
O
Serial data output to the WM-port
131
RxD1/GPIOJ1
I
Serial data input from the WM-port
132
SI0/GPIOG1
I
Status signal input from the tuner
133
SO0/GPIOG0
O
Serial data output to the tuner and gain control
134
SCK0
O
Serial data transfer clock signal output to the tuner and gain control
135
SCS0/GPIOG2
O
Serial latch pulse signal output to the tuner
136
SI1/GPIOH1
I
Serial data input from the real time clock
137
SO1/GPIOH0
O
Serial data output to the real time clock
138
SCK1
O
Serial data transfer clock signal output to the real time clock
139
SCS1/GPIOH2
I
Serial data transfer clock signal input terminal Not used
140
DVS
-
Ground terminal
141, 142
DVDIO1
-
Power supply terminal
143
DVS
-
Ground terminal
144
DVDK1
-
Power supply terminal
145
DVS
-
Ground terminal
36
NW-S603/S605/S703F/S705F/S706F
Pin No.
Pin Name
I/O
Description
146
FS256
O
Not used
147
LRCK/WS
I
Not used
148
BCK/SCK
I
Not used
149
ADDT/SDI/
GPIOM0
I
Not used
150
DADT/SDO/
GPIOM1
O
Not used
151
MUTFGL/
GPIOM2
O
Chip enable signal output to the gain control
152
MUTFGR/
GPIOM3
O
Model setting terminal
153
DVS
-
Ground terminal
154, 155
DVDIO2
-
Power supply terminal
156
DVS
-
Ground terminal
157
DVDK2
-
Power supply terminal
158
DVS
-
Ground terminal
159
NBOOT
I
Not used
160
A0/GPIOA0
O
Power supply ON/OFF control signal output terminal for the noise canceller section
161 to 176
A1 to A16
O
Address signal output to the flash ROM, SRAM
177
AGND
-
Ground terminal
178
ADVREF
-
Reference voltage terminal
179
AVDD
-
Power supply terminal
180
SUBGND
-
Not used
181
MICOUTL
O
Microphone signal output terminal (L-ch) Not used
182
MICOUTR
O
Microphone signal output terminal (R-ch) Not used
183
MICINL
I
Audio signal input terminal (tuner L-ch) from the tuner
184
MLININL
I
Audio signal input terminal (L-ch) from the WM-port
185
MICVREF
-
Reference voltage terminal
186
MICINR
I
Audio signal input terminal (tuner R-ch) from the tuner
187
MLININR
I
Audio signal input terminal (R-ch) from the WM-port
188
T_ADINR
-
Not used
189
DVS
-
Ground terminal
190, 191
DVDIO2
-
Power supply terminal
192
DVS
-
Ground terminal
193
DVDK2
-
Power supply terminal
194
DVS
-
Ground terminal
195 to 199
A17 to A21
O
Address signal output to the flash ROM, SRAM
200
A22
O
Address signal output terminal Not used
201
A23/GPIOA1
O
Address signal output terminal Not used
202
A24/GPIOA2
I
Model setting terminal Not used
203
A25/GPIOA3
I
Model setting terminal Not used
204 to 208
D0 to D4
I/O
Two-way data bus with the flash ROM, SRAM, and serial data output to the organic EL indicator
module
module
209 to 211
D5/GPIOA9 to
D7/GPIOA11
I/O
Two-way data bus with the flash ROM, SRAM, and serial data output to the organic EL indicator
module
module
212
DVS
-
Ground terminal
213, 214
DVDIO2
-
Power supply terminal
215
DVS
-
Ground terminal
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