DOWNLOAD Sony NW-S4 Service Manual ↓ Size: 2.44 MB | Pages: 29 in PDF or view online for FREE

Model
NW-S4
Pages
29
Size
2.44 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
nw-s4.pdf
Date

Sony NW-S4 Service Manual ▷ View online

NW-S4
10
3-3.
JACK  FLEXIBLE  MODULE,  JACK (SMALL  TYPE) (WATERPROOF) (J301)
3-4.
MAIN  BOARD
6
retainer (jack)
5
screw
(1.7 
×
 2.5)
3
two screws
(1.7 
×
 2.5)
4
jack flexible module
7
jack (small type) (waterproof)
(J301)
2
P cover assy
1
5
MAIN board
1
Remove the solder of battery terminal (+).
2
Remove the solder of battery terminal (–).
4
connector
(CN802)
3
SUB board
upper case assy
NW-S4
11
3-5.
SUB  BOARD
7
SUB board
1
bracket retainer
4
connection conductive board
3
BL unit
2
liquid crystal display panel
6
LCD fitting plate
5
KEY flexible print board
5
MODE flexible module
NW-S4
13
13
USB
SWITCH
Q901
2
1
6
7
95
96
97
10
9
8
12
11
44 – 41, 38 – 35
32 – 25 
USB
TRANSCEIVER
END POINT FIFO/
8 BYTE SET-UP REGISTER
PROTOCOL
ENGINE
STATUS/
CONTROL
APPLICATION
INTERFACE
OSC
DPLL
19
7
16
9
18
8
17
13
14
15
25
58 69 45
71
6
48
53
59
2
1
3
5
16
10
9
81
23
22 11
66
29 – 32, 41 – 44
3
54
98
5
7
49
47
67
60
4
8
58
59
57
14
8
1
23
22
49
120
135
SERIAL
PORT
&
DE-
EMPHASIS
DIGITAL
FILTER
&
D/A
CONVERTER
HEADPHONE
AMP
DIGITAL
VOLUME
CONTROL,
BASS/
TREBLE
BOOST,
LIMITING
ANALOG
FILTER
&
ANALOG
VOLUME
CONTROL
14
10
AUDIO
OUTPUT
SWITCH
Q102, 202
MUTING
Q101, 201
MUTING
CONTROL
SWITCH
Q301(2/2)
MUTING
Q302
MUTING
CONTROL
SWITCH
Q301(1/2)
11
60
65
38
LIQUID
CRYSTAL
DISPLAY
LCD901
VOLTAGE
DETECT
IC403
VOLTAGE
DETECT
IC402
124
6
5
2
3
+1.8V
REGULATOR
IC301
B+ SWITCH
Q403
B+ SWITCH
Q405
10
15
41
62
: PLAYBACK
CN901
(1/2)
USB
CONNECTOR
X901
48MHz
D+
D+
XIN
XOUT
3
2
USB
CONTROLLER
IC901
AD0 – AD7
RESET
A0 – A7
INTR
CS
RD
WR
D903
I/O1 – I/O8
512M BIT FLASH ROM
IC602
RE
WE
WP
CE
CE
CLE
CLE
ALE
R/B
ALE
R/B
D0 – D7
ADDRESS BUS
DATA BUS
2B
2A
2G
2Y3
2Y2
2Y1
2Y0
2 TO 4 DECODER
IC604
D0 – D7
D0 – D7
A0 – A7
A0 – A7
CE
CLE
ALE
R/B
HD4
HD0
HD2
HD1
BDR0
IOSTRB
BFSX2
BCLKX2
BDR2
BDX2
INT2
INT3
BCLKR1
A0 – A7
D0 – D7
DIGITAL SIGNAL
PROCESSOR
IC601
INT1
IS
A15
R/W
RS
HD3
X1
X2/CLKIN
EEPROM
IC603
CS
WP
SI
SO
SCK
IRQ1
AN0
WKP7
P37
P32
X2
X1
OSC2
OSC1
P90
COM2
COM1
WKP5 – WKP0
CPU
IC801
IRQ0
P33
RES
RXD
D/A CONVERTER (IC302)
B+
TXD
SCK
P36
SEG9 – SEG22
SEG1 – SEG15
X601
16.9344MHz
LCD
BACK LIGHT
D803 – 805
S801 – 806
S808
V1 B+
X802
8MHz
X801
32.768kHz
OFF        HOLD
VBATT B+
Q402
VCORE
DSP (IC601)
B+
V2
DSP (IC601),
512M BIT EEPROM (IC602),
EEPROM (IC603),
USB CONTROLLER (IC901)
B+
D/A CONVERTER (IC302)
B+
V1
CPU (IC801)
B+
L301
BCLKX0
BCLKX1
HD6
BFSXO
BDXO
SDATA
LRCK
BCLK
ACLK
HD7
SDATA
SDATA
LRCK
LRCK
BCLK
SCLK
ACLK
MCLK
RST
D/A CONVERTER,
HEADPHONE AMP
IC302
HP B
HP A
i
J301
(HEADPHONE)
VBATT
B+
L401
DRY BATTERY
SIZE “AA”
IEC DESIGNATION 
R6
1PC. 1.5V
L404
L402
D405
D403
D402
THP401
CN901
(2/2)
1
4
VBUS
GND
USB
CONNECTOR
D802
HOLD
40 – 26
43 – 48
RESET SIGNAL 
GENERATOR
IC802
11
12
131 – 134, 136 – 139
99 – 104, 113, 114
 SIGNAL PATH
D–
D–
HD5
BATTERY/USB
CHANGE-OVER
SWITCH
Q401
2
3
8
7
5
OUT
EN
LBI
LBO
LX
SWITCHING
REGULATOR
IC401
42 WKP6
AVLS
CONTROL
SWITCH
Q801
S807
NORM         LIMIT
AVLS
S801
+
S802
VOL
S803
SHIFT
x
b
S804
.
MODE
S805
.
MEGA BASS
S806
+3.2V
REGULATOR
IC405
DC/DC
CONVERTER
IC404, L403
COM0
COM1
 SEG0
ı
SEG14
SECTION  4
DIAGRAMS
4-1.
BLOCK  DIAGRAM
NW-S4
14
14
3.4 Vp-p
22.7 
µ
s
3.4 Vp-p
710 ns
4.1 Vp-p
3.5 
µ
s
4.1 Vp-p
6.6 
µ
s
3.2 Vp-p
125 ns
1.8 Vp-p
30.5 
µ
s
1.2 Vp-p
59.1 ns
3.2 Vp-p
59.1 ns
3.4 Vp-p
22.7 
µ
s
3.4 Vp-p
710 ns
3 Vp-p
20.8 ns
Note on Printed Wiring Board:
X
: parts extracted from the component side.
Y
: parts extracted from the conductor side.
f
: internal component.
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side:
Parts on the pattern face side seen from
(Conductor Side)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Component Side)
the parts face are indicated.
4-2.
NOTE  FOR  PRINTED  WIRING  BOARDS  AND  SCHEMATIC  DIAGRAMS
• MAIN and SUB boards are multi-layer printed board.
However, the patterns of intermediate-layer have not been in-
cluded in this diagrams.
Note on Schematic Diagram:
• All capacitors are in 
µ
F unless otherwise noted.  pF: 
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in 
 and 
1
/
4
 
W or less unless otherwise
specified.
%
: indicates tolerance.
f
: internal component.
C
: panel designation.
A
: B+ Line.
• Power voltage is dc 1.5 V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground in
playback mode.
no mark : PLAYBACK
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
F
: PLAYBACK
*
The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
form that of conventional IC.
• Waveforms
– MAIN Board –
1
IC901 
6
 (XIN) (When power on)
50 mV/DIV, 50 ns/DIV
2
IC601 
rk
 (BCLKX0)
2 V/DIV, 500 ns/DIV
3
IC601 
td
 (BFSX0)
1 V/DIV, 5 
µ
s/DIV
4
IC601 
ua
 (BCLKX1)
2 V/DIV, 50 ns/DIV
5
IC601 
oj
 (X2/CLKIN)
200 mV/DIV, 50 ns/DIV
6
IC801 
2
 (X1)
500 mV/DIV, 20 
µ
s/DIV
7
IC801 
5
 (OSC2) (When power on)
100 mV/DIV, 200 ns/DIV
8
IC401 
7
 (LX)
1 V/DIV, 2 
µ
s/DIV
9
IC404 
9
 (LX)
1 V/DIV, 2 
µ
s/DIV
– SUB Board –
0
IC302 
1
 (LRCK)
1 V/DIV, 5 
µ
s/DIV
qa
IC302 
3
 (SCLK)
2 V/DIV, 500 ns/DIV
qs
IC302 
5
 (MCLK)
2 V/DIV, 50 ns/DIV
3.2 Vp-p
59.1 ns
*
Lead Layouts (IC601 and IC901)
surface
Lead layout of conventional IC
CSP (chip size package)
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