DOWNLOAD Sony NW-S4 Service Manual ↓ Size: 2.44 MB | Pages: 29 in PDF or view online for FREE

Model
NW-S4
Pages
29
Size
2.44 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
nw-s4.pdf
Date

Sony NW-S4 Service Manual ▷ View online

22
NW-S4
Pin No.
Pin Name
I/O
Description
51
HINT
O
Interrupt request signal output terminal    Not used (open)
52
CVDD
Power supply terminal (+1.5V)
53
BFSX0
O
LR frame signal output to the D/A converter (IC302)
54
BFSX2
O
Chip select signal output to the EEPROM (IC603)
55
HRDY
O
Ready signal output terminal    Not used (open)
56
DVDD
Power supply terminal (+3.2V)
57
DVSS
Ground terminal
58
HD0
O
Enable signal output to the flash ROM (IC602)
59
BDX0
O
Serial data transmit signal output to the D/A converter (IC302)
60
BDX2
O
Serial data transmit signal output to the EEPROM (IC603) and CPU (IC801)
61
IACK
O
Interrupt request signal output terminal    Not used (open)
62
HBIL
Not used (fixed at “H”)
63
NMI
I
Nonmaskable interrupt request signal input terminal    Not used (fixed at “H”)
64
INT0
I
Interrupt request signal input terminal    Not used (fixed at “H”)
65
INT1
I
Interrupt request signal input from the CPU (IC801)
66
INT2
I
Interrupt request signal input from the USB controller (IC901)
67
INT3
I
Interrupt request signal input terminal (connected to pin y; (BDX2))
68
CVDD
Power supply terminal (+1.5V)
69
HD1
O
Enable signal output to the flash ROM (IC602)
70
CVSS
Ground terminal
71
BCLKX1
O
Serial clock signal output to the D/A converter (IC302)
72
DVSS
Ground terminal
73
BFSX1
O
Serial data receive signal output terminal    Not used (fixed at “H”)
74
BDX1
O
Serial data transmit signal output terminal    Not used (open)
75
DVDD
Power supply terminal (+3.2V)
76
DVSS
Ground terminal
77
CLKMD1
I
Clock mode signal output terminal    Not used (fixed at “L”)
78
CLKMD2
I
Clock mode signal output terminal    Not used (fixed at “H”)
79
CLKMD3
I
Clock mode signal output terminal    Not used (fixed at “L”)
80
HPI16
Not used (fixed at “L”)
81
HD2
O
Reset signal output to the USB controller (IC901)    “L”: reset
82
TOUT
O
Timer signal output terminal    Not used (open)
83
EMU0
I
Emulator signal input terminal    Not used (open)
84
EMU1/OFF
O
Emulator signal output terminal    Not used (open)
85
TDO
O
Test data signal output terminal    Not used (open)
86
TDI
I
Test data signal input terminal    Not used (open)
87
TRST
I
Test reset signal input terminal    Not used (open)
88
TCK
I
Test clock input terminal    Not used (open)
89
TMS
I
Test mode select signal input terminal    Not used (open)
90
CVSS
Ground terminal
91
CVDD
Power supply terminal (+1.5V)
92
HPIENA
I
HPI module select signal input terminal    Not used (fixed at “L”)
93
DVSS
Ground terminal
94
CLKOUT
O
Master clock output terminal    Not used (open)
95
HD3
O
USB ON/OFF control signal output terminal    “L”: ON
23
NW-S4
Pin No.
Pin Name
I/O
Description
96
X1
O
System clock output terminal (16.9344MHz)
97
X2/CLKIN
I
System clock input terminal (16.9344MHz)
98
RS
I
Reset signal input to the CPU (IC801)    “L”: reset
99 to 104
D0 to D5
I/O
Two-way data bus with the flash ROM (IC602) and USB controller (IC901)
105
A16
Address signal terminal    Not used (open)
106
DVSS
Ground terminal
107 to 110
A17 to A20
Address signal terminal    Not used (open)
111
CVSS
Ground terminal
112
DVDD
Power supply terminal (+3.2V)
113, 114
D6, D7
I/O
Two-way data bus with the flash ROM (IC602) and USB controller (IC901)
115 to 119
D8 to D12
I/O
Two-way data bus    Not used (open)
120
HD4
O
Chip select signal output to the flash ROM (IC602)
121 to 123
D13 to D15
I/O
Two-way data bus    Not used (open)
124
HD5
O
Audio system power ON/OFF control signal output terminal    “H”: ON
125
CVDD
Power supply terminal (+1.5V)
126
CVSS
Ground terminal
127
HDS1
I
Data signal input terminal    Not used (fixed at “H”)
128
DVSS
Ground terminal
129
HDS2
I
Data signal input terminal    Not used (fixed at “H”)
130
DVDD
Power supply terminal (+3.2V)
131 to 134
A0 to A3
O
Address signal output to the USB controller (IC901)
135
HD6
O
Reset signal output to the D/A converter (IC302)    “L”: reset
136 to 139
A4 to A7
O
Address signal output to the USB controller (IC901)
140, 141
A8, A9
Address signal terminal    Not used (open)
142
CVDD
Power supply terminal (+1.5V)
143
A21
Address signal terminal    Not used (open)
144
DVSS
Ground terminal
24
NW-S4
 MAIN BOARD  IC801  HD6433800A02FP  (CPU)
Pin No.
Pin Name
I/O
Description
1
IRQ1
I
Voltage detect input terminal
2
X1
I
Sub system clock input terminal (32.768kHz)
3
X2
O
Sub system clock output terminal (32.768kHz)
4
VSS
Ground terminal
5
OSC2
O
Main system clock output terminal (8MHz)
6
OSC1
I
Main system clock input terminal (8MHz)
7
TEST
I
Test mode signal input terminal    Not used (fixed at “L” )
8
RES
I
System reset signal input from the reset signal generator (IC802)     “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
9
P31
Not used (open)
10
P32
O
Power supply (V2) ON/OFF control signal output terminal    “L”: ON
11
P33
O
Interrupt request signal output to the digital signal processor (IC601)
12, 13
P34, P35
Not used (fixed at “L” )
14
P36
O
Reset signal output to the digital signal processor (IC601) and EEPROM (IC603)
“L”: reset
15
P37
O
Power supply (VCORE) ON/OFF control signal output terminal    “L”: ON
16
VCC
Power supply terminal (+3.2V)
17
V1
Power supply terminal for the liquid crystal display (open in this set)
18
V2
Power supply terminal for the liquid crystal display (connected to pin ql (V3))
19
V3
Power supply terminal for the liquid crystal display (connected to pin qk (V2))
20, 21
COM4, COM3
O
Common signal output to the liquid crystal display    Not used (open)
22, 23
COM2, COM1
O
Common signal output to the liquid crystal display (LCD901)
24, 25
SEG25, SEG24
O
Segment signal output to the liquid crystal display    Not used (open)
26 to 40
SEG23 to SEG9
O
Segment signal output to the liquid crystal display (LCD901)
41
WKP7
I
USB connection detect signal input terminal
42
WKP6
I
AVLS switch (S807) input terminal    “L”: NORM
43
WKP5
I
. key (S806) input terminal
44
WKP4
I
> key (S805) input terminal
45
WKP3
I
Nx key (S804) input terminal
46
WKP2
I
SHIFT key (S803) input terminal
47
WKP1
I
VOL - key (S802) input terminal
48
WKP0
I
VOL + key (S801) input terminal
49
P90
O
LCD back light (D803 toD805) ON/OFF control signal output terminal    “H”: LED ON
50 to 54
P91 to P95
Not used (open)
55
VSS
Ground terminal
56
IRQACE
I
Interrupt request signal input terminal    Not used (fixed at “L” )
57
SCK
I
Serial clock signal input from the digital signal processor (IC601)
58
RXD
I
Serial data receive signal input from the digital signal processor (IC601)
59
TXD
O
Serial data transmit signal output to the digital signal processor (IC601)
60
IRQ0
I
Serial clock signal input from the digital signal processor (IC601)
61
AVCC
Power supply terminal (+3.2V) (for the analog)
62
AN0
I
Battery voltage detect input terminal
63, 64
PB1, PB2
I
Not used (fixed at “L” )
25
NW-S4
5-1. UPPER  CASE  ASSY
SECTION  5
EXPLODED  VIEWS
• Items marked “*” are not stocked since they
are seldom required for routine service. Some
delay should be anticipated when ordering
these items.
• The mechanical parts with no reference num-
ber in the exploded views are not supplied.
• Accessories and packing materials are given
in the last of the electrical parts list.
NOTE:
• -XX and -X mean standardized parts, so they
may have some difference from the original
one.
• Color Indication of Appearance Parts
Example:
KNOB, BALANCE (WHITE) . . . (RED)
Parts Color Cabinet's Color
Ref. No.
Part No.
Description
Remark
Ref. No.
Part No.
Description
Remark
7
1
2
3
5
6
4
8
4
5
1
X-4622-904-1 P COVER  ASSY
2
4-647-023-01 WINDOW, LCD INDICATION
3
X-4622-760-1 CASE ASSY, UPPER
4
3-231-262-01 SCREW (1.7X6), PRECISION
5
3-318-382-01 SCREW (1.7X2.5), TAPPING
6
4-647-027-01 RETAINER (JACK)
7
4-650-470-01 SHEET, INDICATION WINDOW
8
X-4622-761-1 CASE ASSY, LOWER
Ver 1.2  2001.07
Page of 29
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