Sony NW-MS11 Service Manual ▷ View online
32
NW-MS11
Pin No.
Pin Name
I/O
Description
69
WAKE1
I
System hold off signal input from the HOLD switch of console unit
The signal input, when switch position is changed from on to off
The signal input, when switch position is changed from on to off
70
WAKE0
I
System wake up signal input by any key is pressed
71
RXD
I
Not used (open)
72
SDI1
I
Serial data input from the RV5C348A (IC1001)
73
BIO
I
Not used (open)
74
VDDIO1
—
Power supply terminal (+2.8V)
75
VSSIO1
—
Ground terminal
76
XF
O
Not used (open)
77
TXD
O
Not used (open)
78
SDO1
O
Serial data output to the RV5C348A (IC1001)
79
SCK1
O
Serial data transfer clock signal output to the RV5C348A (IC1001)
80
VSSCORE
—
Ground terminal
81
USB CHGON
O
Not used (open)
82
FR XRST
O
Not used (open)
83
DAC XPD
O
Power on/off control signal output to the D/A converter (IC3100)
84
LCDON
O
Power on/off control signal output for the liauid crystal display unit “H”: LCD on
85
HP PWR
O
Power on/off control signal output to the headphone amplifier (IC3200)
86
HPBBON
O
Bass boost on/off control signal output to the headphone amplifier (IC3200)
87
HPMUTE
O
Muting on/off control signal output to the headphone amplifier (IC3200)
88
DAC DEMP
O
Emphasis control signal output to the D/A converter (IC3100)
89
ORANGE
O
LED drive signal output for access indicator (LED6000) “H”: LED on
90
LED ON
O
LED drive signal output terminal Not used (open)
91
EXTON
O
Not used (open)
92
EL ON
O
Power on/off control signal output for the back light of liquid crystal display unit
“H”: back light on
“H”: back light on
93
CHGON
O
Not used (open)
94
USB XDACK
O
Not used (open)
95
USB XINT
O
Not used (open)
96
USB REG CE
O
Not used (open)
97
TSB
I/O
Not used (open)
98
VSSCORE
—
Ground terminal
99
SPCK
O
Not used (open)
100
XIRQ
O
Not used (open)
101
SCK0
O
Serial data transfer clock signal output for liquid crystal display drive to the console unit
102
SDO0
O
Serial data output for liquid crystal display drive to the console unit
103
FS4
O
Clock signal output to the power controller (IC9005)
104
WAKE
O
Power wake up request signal output to the power controller (IC9005)
105
VDDCORE
—
Power supply terminal (+1.8V)
106
SDI0
O
Serial data output for liquid crystal display drive to the console unit
107
SLEEPEN
I
Not used (open)
108
WAKEEN
I
Wake up enable signal input from the reset signal generator (IC9003)
109
XCRST
I
System reset signal input from the reset signal generator (IC9007) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
110
OSCEN
I
OSC enable signal input from the reset signal generator (IC9003)
111
VDDCORE
—
Power supply terminal (+1.8V)
112
ROM RY/XBY
O
Ready/busy signal output to the flash memory (IC5000) “L”: busy, “H”: ready
33
NW-MS11
Pin No.
Pin Name
I/O
Description
113
USB XDET
I
Not used (open)
114
VBUS XON
I
Not used (open)
115
VBUS INT
I
USB connect detection signal input from the voltage detector (IC9003)
116
USB XDREQ
I
Not used (fixed at “L”)
117
USB XINT
I
Not used (fixed at “L”)
118
XHOLD
I
System hold signal input from the HOLD switch of console unit
119
XTEST
I
Input terminal for the test mode setting “L”: test mode, normally fixed at “H”
120
DSP CCLK
I
Not used (fixed at “H”)
121
USB TRON
I
Not used (fixed at “L”)
122
MS PWR
O
Power on/off control signal output to a memory stick
123
HP BEEP
O
Beep sound control signal output to the headphone amplifier (IC3200)
124
LCD XCS
O
Chip select signal output for liquid crystal display drive to the console unit
125
SAM INT
I
Interrupt request signal input from the CXD1859GA (IC8000)
126
SSAM2 USB XINT
I
Not used (fixed at “L”)
127
MS EJ
I
Not used (fixed at “L”)
128
VSSCORE
—
Ground terminal
129
AVSS
—
Ground terminal (for analog system)
130
AVCC
—
Power supply terminal (+2.8V) (for analog system)
131 to 133 AD12 to AD10
I
Not used (fixed at “L”)
134
VBUS MONI
I
USB power voltage monitor input terminal (A/D input) Not used (fixed at “L”)
135
BATT MONI
I
Battery voltage monitor input terminal (A/D input) Not used (fixed at “L”)
136 to 140
AD7 to AD3
I
Not used (fixed at “L”)
141
KEY2
I
Key input terminal (A/D input) S2203 to S2205, S7001, S7002 (MEGA BASS, MENU,
DISPLAY, VOLUME+, VOLUME–) keys input
DISPLAY, VOLUME+, VOLUME–) keys input
142
AD1
I
Not used (fixed at “L”)
143
AOUT
O
Not used (open)
144
VDDAD
—
Power supply terminal (+2.8V) (for A/D converter)
145
VSSAD
—
Ground terminal (for A/D converter)
146
VDDA
—
Power supply terminal (+1.8V)
147
LF
—
Low-pass filter connecting terminal
148
VSSA
—
Ground terminal
149
VDDCORE
—
Power supply terminal (+1.8V)
150
XTO
O
System clock output terminal (22.5792MHz)
151
XTI
I
System clock input terminal (22.5792MHz)
152
VSSCORE
—
Ground terminal
153
VSSIO2
—
Ground terminal
154
CUDATAI
I
Not used (fixed at “L”)
155
CUCLKI
I
Not used (fixed at “L”)
156
S RA
I
Not used (fixed at “L”)
157
VDDIO2
—
Power supply terminal (+2.8V)
158
CUDATAO
O
Not used (open)
159
CUCLKO
O
Not used (open)
160
S RB
O
Not used (open)
161
VSSIO2
—
Ground terminal
162
VDDIO2
—
Power supply terminal (+2.8V)
163 to 170 FRIO0 to FRIO7
I/O
Not used (open)
34
NW-MS11
Pin No.
Pin Name
I/O
Description
171
VDDIO2
—
Power supply terminal (+2.8V)
172
VSSIO2
—
Ground terminal
173 to 180
FRIO8 to FRIO15
I/O
Not used (open)
181
VDDIO2
—
Power supply terminal (+2.8V)
182
VSSIO2
—
Ground terminal
183 to 187
FRCE0 to FRCE4
O
Not used (pull up)
188
FRWE
O
Not used (pull up)
189
FRRE
O
Not used (pull up)
190
FRCLE
O
Not used (open)
191
FRALE
O
Not used (open)
192
FRWP
O
Not used (pull up)
193
VDDIO2
—
Power supply terminal (+2.8V)
194
FRREADY
I
Not used (fixed at “L”)
195
VSSIO2
—
Ground terminal
196
VSSIO3
—
Ground terminal
197
FS256
O
Clock signal (11.2896 MHz) output to the D/A converter (IC3100)
198
PCMO
O
Digital audio signal output to the D/A converter (IC3100)
199
XCSADA
—
Not used (open)
200
CDTO
O
Not used (open)
201
CCLK
—
Not used (open)
202
DGSDO
O
Not used (open)
203
VDDIO3
—
Power supply terminal (+1.8V)
204
BCK
O
Bit clock signal output to the D/A converter (IC3100)
205
LRCK
O
L/R sampling clock signal output to the D/A converter (IC3100)
206
VSSIO3
—
Ground terminal
207
DGSDI
I
Not used (fixed at “L”)
208
CDTI
I
Not used (fixed at “L”)
209
PCMI
I
Not used (fixed at “L”)
210
VDDIO3
—
Power supply terminal (+1.8V)
211
BUSPLU
I
Not used (fixed at “L”)
212 to 217 TEST0 to TEST5
I
For test terminal Normally open
218
VSSCORE
—
Ground terminal
219, 220
MD6, MD5
I
Mode setting input terminal Fixed at “H” in this set
221
MD4
I
Mode setting input terminal Fixed at “L” in this set
222
MD3
I
Mode setting input terminal Fixed at “H” in this set
223, 224
MD2, MD1
I
Mode setting input terminal Fixed at “L” in this set
225
MD0
I
Mode setting input terminal Fixed at “H” in this set
226
NMI
I
Not used (fixed at “L”)
227
VDDCORE
—
Power supply terminal (+1.8V)
228
TCLK
I
Not used (open)
229
TDI
I
Not used (open)
230
TMS
I
Not used (open)
231
XTRST
I
Not used (open)
232
TCLKD
I
Not used (open)
233
TDID
I
Not used (open)
234
TMSD
I
Not used (open)
35
NW-MS11
Pin No.
Pin Name
I/O
Description
235
XTRSTD
I
Not used (open)
236
VSSCORE
—
Ground terminal
237
TDOD
O
Not used (open)
238
TDO
O
Not used (open)
239
VDDCORE
—
Power supply terminal (+1.8V)
240, 241
MSEL0D, MSEL1D
I/O
Not used (open)
242, 243 MSEL1, MSEL0
I/O
Not used (open)
244
VSSIO1
—
Ground terminal
245
VDDIO1
—
Power supply terminal (+2.8V)
246 to 253
D15 to D8
I/O
Two-way data bus with the flash memory (IC5000), S-RAM (IC5600) and CXD1859GA
(IC8000)
(IC8000)
254
VSSIO1
—
Ground terminal
255
VDDIO1
—
Power supply terminal (+2.8V)
256
D7
I/O
Two-way data bus with the flash memory (IC5000), S-RAM (IC5600) and CXD1859GA
(IC8000)
(IC8000)
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