Sony NW-E403 / NW-E405 / NW-E407 / NW-E50 / NW-E503 / NW-E505 / NW-E507 / NW-E70 / NW-E90 Service Manual ▷ View online
Copying is strictly prohibited
5
1-2. Power control circuit when the unit is not connected to PC
Fig.1-1 shows Power Control Circuit of the unit.
1. Driving voltage (UNREG voltage)
In this unit, there are 2 kinds of power sources shown in Table.1-1.
1. Driving voltage (UNREG voltage)
In this unit, there are 2 kinds of power sources shown in Table.1-1.
Table.1-1 Power Sources
Voltage
Power Source
Battery Voltage
Rechargeable Lithium-ion battery
VBUS Voltage (5[V])
PC
= During the battery driving =
The battery voltage is input to pin-5 and pin-6 [BAT] of Charge Control IC501. During the battery driving, the controller section inside IC501 does not start-up.
The battery voltage is output from Pin-15, Pin-16 and Pin-17[OUT] to the unit as UNREG voltage.
= During the VBUS voltage driving =
VBUS voltage which is supplied from PC is input to Pin-20 [USB] of Charge Control IC501 and is also input to Pin-9 [CE] of IC501 via R529. Then, IC501 starts up.
When IC501 starts up, IC501 outputs VBUS voltage from Pin-15, Pin-16 and Pin-17 [OUT] to the unit as UNREG voltage.
2. VDD_RTC2.8 voltage (+2.8V)
When UNREG voltage is supplied to pin-2 [VDD] and pin-4 [CE] of +2.8V REGULATOR IC503, IC503 starts up. Next, when IC503 starts up, +2.8[V] is generated by
the series regulator inside IC503 and is output from pin-5 [VOUT] to the unit as VDD_RTC2.8 voltage.
3. VDD_CORE voltage (+1.2[V])
UNREG voltage is input to pin-1 [VIN] of +1.2V REGULATOR IC505 and pin-2 [VDD] of +2.9V VOLTAGE DETECTOR IC507. Next, IC507 is +2.9V voltage detector IC and is
also an Open-Drain type voltage detector and becomes “Open” state at pin-4 [VOUT] when the voltage input to pin-2 [VDD] becomes over +2.9[V]. Next, when the state of
pin-4 [VOUT] becomes “Open”, UNREG voltage is supplied to pin-3 [EN] of IC505 via the pull-up resistor, R504. Then IC505 starts up. Next, when IC505 starts up, IC505
outputs the switching waveform from Pin-5 [SW]. Then, 1.2[V] is generated by the DC-DC converter circuit composed of IC505, L501 and C516. Then, the created voltage is
supplied to the unit as VDD_CORE voltage.
4. VDD_IO voltage (+2.8V)
UNREG voltage is input to pin-1 [VIN] of +2.8V REGULATOR IC506 and pin-2 [VDD] of +2.9V VOLTAGE DETECTOR IC507. Next, IC507 is +2.9V voltage detector IC and is
also an Open-Drain type voltage detector and becomes “Open” state at pin-4 [VOUT] when the voltage input to pin-2 [VDD] becomes over +2.9[V]. Next, when the state of
pin-4 [VOUT] becomes “Open”, UNREG voltage is supplied to pin-3 [EN] of IC506 via the pull-up resistor, R504. Then IC506 starts up. Next, when IC506 starts up, IC506
outputs the switching waveform from Pin-5 [SW]. Then, 2.8[V] is generated by the DC-DC converter circuit composed of IC506, L502 and C501. Then, the created voltage is
supplied to the unit as VDD_IO voltage.
5. VDD_AD2.3 voltage
When the generated VDD_IO voltage is supplied to pin-1 [VIN] and pin-3 [CE] of +2.3V REGULATOR IC509, IC509 starts up. Next, when IC509 starts up, +2.3[V] is
generated by the series regulator inside IC509 and is output from pin-5 [VOUT] to the unit as VDD_AD2.3 voltage.
6. VDD_USB3.3 voltage
VDD_USB3.3 voltage is created by Charge Control IC501 only when the unit is connected to PC (3.3V Regulator Circuit is built inside IC501). When VBUS voltage is
supplied to Charge Control IC501, IC501 creates +3.3[V] and outputs it from pin-1 [LDO] to the unit as VDD_USB3.3 voltage.
Copying is strictly prohibited
6
1-3. RESET Circuit
Fig.1-1 shows the reset circuit of the unit.
The master reset signal of the unit is changed from “L” to “H” when any of the following conditions is satisfied. Then, the internal reset operation of SYSTEM CONTROLLER
IC400 terminates.
The master reset signal of the unit is changed from “L” to “H” when any of the following conditions is satisfied. Then, the internal reset operation of SYSTEM CONTROLLER
IC400 terminates.
Reset Condition
VDD_IO voltage is generated and VDD_IO voltage is over +2.4[V].
or
or
RESET Switch, S710 is pressed.
The flow of Reset Signal is described below.
VDD_IO voltage is supplied to +2.4V VOLTAGE DETECTOR IC508. IC508 is +2.4V voltage detector IC and is also an N-ch Open-Drain type voltage detector and becomes
“Open” state at pin-4 [VOUT] when the voltage input to pin-2 [VDD] becomes over +2.4[V]. By this function of IC508, Q507 and Q506 are turned “OFF”. Then, VDD_CORE
voltage is supplied to pin-106 [XRST] of SYSTEM CONTROLLER IC400 via the pull-up resister, R526 as the master reset signal. When the internal reset operation of
SYSTEM CONTROLLER IC400 terminates, IC400 performs the reset control shown in Table.1-2.
Table.1-2 RESET Control
Output Terminal
Description
Pin-176 [P15] of IC400
Reset signal for Organic EL Display Block (L:RESET)
Pin-147 [PQ1] of IC400
Reset signal for HEADPHONE AMP. IC301 (L:RESET) (See fig.3-1 on page 12)
= RESET signal for NOR FLASH RAM IC450 =
VDD_IO voltage is supplied to +2.4V VOLTAGE DETECTOR IC508. IC508 is +2.4V voltage detector IC and is also an N-ch Open-Drain type voltage detector and becomes
“Open” state at pin-4 [VOUT] when the voltage input to pin-2 [VDD] becomes over +2.4[V]. By this function of IC508, VDD_IO voltage is supplied to pin-10 [XRST] of NOR
FLASH RAM IC450 via the pull-up resister, R517. Then, the internal reset operation of IC450 terminates,
Copying is strictly prohibited
7
1-4. Power Control by System Controller IC400
System Controller IC400 performs the power control shown in Table.1-3 (See Fig.1-2).
Table.1-3 List of Power Control by System Controller IC400
Terminals
ON
OFF
Remarks
IC400 pin-174 [P13/RAM_ON]
H
(IC400:Wake-up)
L
(IC400:Sleep)
Power control signal for NAND FLASH RAM IC461
IC400 pin-146 [PQ0/AUD_PWRON]
H
L
Power control signal for HP Amp. IC301
(H:ON, L:OFF)
(H:ON, L:OFF)
Fig.1-2 Power control by System Controller IC400
Copying is strictly prohibited
8
2. Charging Circuit
2-1. Charging Circuit
Fig.2-1 shows the charging circuit. In this model, the charge control IC501 controls all charge operation. When “L” signal is supplied to Pin-8 [PSEL] of IC501, Charge Control
IC501 starts the operation shown in Table.2-1.
Table.2-1 Power Source Selection
Pin-8 [PSEL]
AC
USB
Charging Source
Maximum Charging Rate
System Power Source
L
Present
Absent
AC
ISET2
AC
L
Absent
Present
USB
ISET2
USB
L
Present
Present
USB
ISET2
USB
L
Absent
Absent
N/A
N/A
Battery
= Charging operation with VBUS voltage =
When VBUS voltage is supplied to Pin-20 [USB] of IC501, the controller section inside IC501 starts the charging operation. As the model has a built-in rechargeable
lithium-ion battery, the charging method is the constant current and constant voltage method. The charge current is set by ISET2. ISET2 is controllable by the external register
connected to Pin-7 [ISET2] of IC501. The control signal from Pin-83[PF2] of SYSTEM CONTROLLER IC400 controls the charge current and operates the charge with the
current shown in Table 2-6. When the constant current charging terminates, Charge Control IC501 changes the mode to the constant voltage charging.
Table.2-2 Charging Control by SYSTEM CONTROLLER IC400
Output Terminal
500[mA]- Permit
100[mA]- Permit
Description
IC400 Pin-83 [PF2]
H
L
Charging current control terminal during USB charging
During USB charging, SYSTEM CONTROLLER IC400 monitors the PC operation mode. Detecting that PC is in SUSPEND mode, it outputs “H” signal from Pin-171 [P10].
By this “H” signal, Q505 turns on and “L” signal is input to Pin-12 [TS] of IC501. Then, the controller section inside IC501 detects a temperature anomaly to terminate the
charge operation.
Table.2-3 Charging Control by System Controller IC400
Output Terminal
PC: SUSPEND
PC: Normal
Description
IC400 Pin-171 [P10]
H
L
Charging operation stops when PC is in SUSPEND mode.
Click on the first or last page to see other NW-E403 / NW-E405 / NW-E407 / NW-E50 / NW-E503 / NW-E505 / NW-E507 / NW-E70 / NW-E90 service manuals if exist.