Sony NW-A1000 / NW-A1200 Service Manual ▷ View online
NW-A1000/A1200
OPERATION MANUAL
NEW TECHNICAL THEORY
FOR SERVICING
Internal Use Only
PORTABLE HARD DISK AUDIO PLAYER
NW-A1000: 6GB
NW-A1200: 8GB
Copying is strictly prohibited
2
TABLE OF CONTENTS
Section Title Page Section Title Page
1. CPU INTERFACE......................................................................................... 3
1-1. Serial Interfaces ........................................................................................... 3
1-2. Data Bus Interfaces...................................................................................... 6
2. Power Control Circuit ................................................................................. 8
2-1. VB voltage ................................................................................................... 8
2-2. Wake-up operation (the internal operation of Power Control IC9001) ............. 9
2-3. Other Generated Voltages (2.8V_REG/OEL_VCC/LED_VCC) ..................... 13
2-4. Operation during Sleep Mode ..................................................................... 14
2-5. RESET Circuit............................................................................................ 15
2-6. Power Control by PLD IC8001.................................................................... 17
3. Playback Circuit........................................................................................ 19
3-1. Playback Circuit-1 ...................................................................................... 19
3-2. Playback Circuit-2 ...................................................................................... 22
4. Charging Circuit........................................................................................ 24
4-1. Charging Circuit ......................................................................................... 24
5. APPENDIX .................................................................................................27
5-1. Generated Voltages List.............................................................................. 27
3-1. Playback Circuit-1 ...................................................................................... 19
3-2. Playback Circuit-2 ...................................................................................... 22
4. Charging Circuit........................................................................................ 24
4-1. Charging Circuit ......................................................................................... 24
5. APPENDIX .................................................................................................27
5-1. Generated Voltages List.............................................................................. 27
NOTE ON HANDING THIS MANUAL
The contents described in this manual are prohibited from using outside Sony Corporation. Copying the data and reprinting the data in this PDF file to other
homepages are strictly forbidden.
homepages are strictly forbidden.
All block diagrams on the operation manual are created based on the circuit of NW-A1000. The circuit structure for NW-A3000 is almost same as that for
NW-A1000.
NW-A1000.
There are 2 options, Cradle (BCR-NWU1) and Dock Speaker (SRS-NWM10). In this operation manual, Cradle is mentioned as an example.
Cradle (BCR-NWU1)
Dock Speaker (SRS-NWM10)
Copying is strictly prohibited
3
1. CPU INTERFACE
1-1. Serial Interfaces
Fig.1-1 shows the serial interface of the model. Main System Controller IC6005 controls a whole system and PLD IC8001 controls the serial communications corresponding to
the commands which are output form Main System Controller IC6005.
1. Communication between Main System Controller IC6005 and PLD IC8001
the commands which are output form Main System Controller IC6005.
1. Communication between Main System Controller IC6005 and PLD IC8001
Main Control IC6005 controls PLD IC8001 by outputting the various serial commands. These serial commands are output from pin-58 [MULTI_SO] in synchronization
with the clock of pin-57 [MULTI_SCK] and the chip select signals of pin-50 [SPI_CS2], pin-59 [SPI_CS1] and pin-60 [SPI_CS0].
The main interfaces are described below.
[IC6005 -> IC8001]
Setting commands for Power Control IC9001
Setting commands for D/A CONVERTER IC3002
Display data to OEL Module etc.
[IC8001 -> IC6005]
RTC (Time) data
Status information of Power Control IC9001 etc.
with the clock of pin-57 [MULTI_SCK] and the chip select signals of pin-50 [SPI_CS2], pin-59 [SPI_CS1] and pin-60 [SPI_CS0].
The main interfaces are described below.
[IC6005 -> IC8001]
Setting commands for Power Control IC9001
Setting commands for D/A CONVERTER IC3002
Display data to OEL Module etc.
[IC8001 -> IC6005]
RTC (Time) data
Status information of Power Control IC9001 etc.
2. Communication between PLD IC8001 and Sub System Controller IC3101
PLD IC8001 controls the Sub system controller IC3101 by outputting the various serial commands. These serial commands are output from pin-92 [DEN_SIO]
in synchronization with the clock of pin-65 [DEN_SCK0] and the chip select signal of pin-105 [DEN_SCS0]. The main interfaces are described below.
[IC8001 -> IC3101]
Status information such as “Play Start” and “Play Stop”
Sound setting command etc.
[IC3101 -> IC8001]
Rap time information etc.
in synchronization with the clock of pin-65 [DEN_SCK0] and the chip select signal of pin-105 [DEN_SCS0]. The main interfaces are described below.
[IC8001 -> IC3101]
Status information such as “Play Start” and “Play Stop”
Sound setting command etc.
[IC3101 -> IC8001]
Rap time information etc.
3. Communication between PLD IC8001 and Power Control IC9001
To control the power control IC9001, PLD IC8001 outputs the serial data from pin-11 [EX_MULTI_SO] in synchronization with the clock of pin-4 [EX_MULTI_SCK] and
strobe signal of pin-22 [POWER_STB]. The power control IC9001 starts operating according to the input commands when the strobe signal becomes “L”.
The main interfaces are described below.
[IC8001 -> IC9001]
Voltage setting of the respective power voltage generator circuits (VO1/VO2/VO3/LDO1/LDO2/LDO3)
Output control of pin-76 [GPIO0] and pin-77 [GPIO1]
Suspend control of Charging Operation etc.
strobe signal of pin-22 [POWER_STB]. The power control IC9001 starts operating according to the input commands when the strobe signal becomes “L”.
The main interfaces are described below.
[IC8001 -> IC9001]
Voltage setting of the respective power voltage generator circuits (VO1/VO2/VO3/LDO1/LDO2/LDO3)
Output control of pin-76 [GPIO0] and pin-77 [GPIO1]
Suspend control of Charging Operation etc.
[IC9001 -> IC8001]: Not used in the unit.
Copying is strictly prohibited
4
4. Communication between PLD IC8001 and Real Time Clock IC4101
When the time data is to be set, Main System Controller IC6005 outputs the time setup data to Real Time Clock IC4101 from pin-58 [MULTI_SO] in synchronization
with the clock of pin-4[EX_MULTI_SCK] and chip enable signal of pin-20 [RTC_CE] of PLD IC8001. During the time data read, Main System Controller IC6005 outputs
the data read command to Real Time Clock IC4101 in the same manner as the time data writing. When the Real Time Clock IC4101 receives the read command, it
outputs the time data to PLD IC8001 from pin-1 [SIO]. PLD IC8001 thus receives the time information. (Main System Controller IC6005 receives the time information
through the serial communication between IC6005 and IC8001.)
with the clock of pin-4[EX_MULTI_SCK] and chip enable signal of pin-20 [RTC_CE] of PLD IC8001. During the time data read, Main System Controller IC6005 outputs
the data read command to Real Time Clock IC4101 in the same manner as the time data writing. When the Real Time Clock IC4101 receives the read command, it
outputs the time data to PLD IC8001 from pin-1 [SIO]. PLD IC8001 thus receives the time information. (Main System Controller IC6005 receives the time information
through the serial communication between IC6005 and IC8001.)
When the unit is in the sleep mode, Real Time Clock IC4101 works by the VB voltage supplied to pin-4 [VSB] and keeps counting the time information.
5. Communication between PLD IC8001 and D/A CONVERTER IC3002
To control D/A CONVERTER IC3002, PLD IC8001 outputs the serial data from pin-11 [EX_MULTI_SO] in synchronization with the clock of pin-4 [EX_MULTI_SCK] and
the chip select signal of pin-18 [DAC_XCS]. The D/A CONVERTER IC3002 starts operation according to the input commands when the chip select signal becomes “L”.
The main interfaces are described below.
Internal Reset
Mute Control
Volume Control
Setting of Sampling Frequency (Always 44.1 [kHz] in the unit) etc.
the chip select signal of pin-18 [DAC_XCS]. The D/A CONVERTER IC3002 starts operation according to the input commands when the chip select signal becomes “L”.
The main interfaces are described below.
Internal Reset
Mute Control
Volume Control
Setting of Sampling Frequency (Always 44.1 [kHz] in the unit) etc.
6. Communication between PLD IC8001 and OEL Block
To control the display of OEL Module, PLD IC8001 outputs the display data from pin-11 [EX_MULTI_SO] in synchronization with the clock of pin-4 [EX_MULTI_SCK]
and the chip select signal of pin-12 [LCD_XCS].
and the chip select signal of pin-12 [LCD_XCS].
7. Communication between PLD IC8001 and Cradle
Not available at the present. (This communication lines are prepared in the future.)
8. Communication between USB CONTROLLER IC5001 and PC
The unit has the USB terminal to communicate with PC. USB CONTROLLER IC5001 performs the data communication with PC through the following input / output
terminals.
USB CONTROLLER IC5001 Pin-10 [DM] (D-)
USB CONTROLLER IC5001 Pin-8 [DP] (D+)
terminals.
USB CONTROLLER IC5001 Pin-10 [DM] (D-)
USB CONTROLLER IC5001 Pin-8 [DP] (D+)