DOWNLOAD Sony MHC-S3 / ST-S3 Service Manual ↓ Size: 2.95 MB | Pages: 33 in PDF or view online for FREE

Model
MHC-S3 ST-S3
Pages
33
Size
2.95 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
mhc-s3-st-s3.pdf
Date

Sony MHC-S3 / ST-S3 Service Manual ▷ View online

10
ST-S3
Note on Schematic Diagram:
• All capacitors are in 
µ
F unless otherwise noted.  pF: 
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in 
 and 
1
/
4
 
W or less unless otherwise
specified.
f
: internal component.
5
: fusible resistor.
C
: panel designation.
5-1.
NOTE  FOR  PRINTED  WIRING  BOARDS  AND  SCHEMATIC  DIAGRAMS
Note on Printed Wiring Board:
X
: parts extracted from the component side.
Y
: parts extracted from the conductor side.
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
• Indication of transistor.
C
B
These are omitted.
E
Q
B
These are omitted.
C
E
Q
B
These are omitted.
C
E
Q
Note: The components identified by mark 
0
 or dotted line
with mark 
0
 are critical for safety.
Replace only with part number specified.
SECTION  5
DIAGRAMS
Caution:
Pattern face side:
Parts on the pattern face side seen from
(Conductor Side)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(Component Side) the parts face are indicated.
A
: B+ Line.
B
: B– Line.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : TUNER (FM/AM)
(
) : CD PLAY
〈〈
 
〉〉
: AC OFF
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 M
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
F
: TUNER (FM/AM)
E
: TAPE PLAY
G
: RECORD
J
: CD PLAY
c
: DIGITAL INPUT
• Circuit Boards Location
DSP board
TUNER PACK
MAIN board
SIRCS board
PANEL board
ST-S3
11
11
3.6 Vp-p
354 ns
4 Vp-p
354 ns
3.9 Vp-p
22.7 
µ
s
3.8 Vp-p
22.7 
µ
s
4.6 Vp-p
74.1 ns
2.7 Vp-p
62.5 ns
2.6 Vp-p
30.5 
µ
s
3.5 Vp-p
250 ns
4 Vp-p
74.1 ns
 Waveforms
– MAIN Board –
1
IC501 
qa
 (XCOUT)
– DSP Board –
1
IC601 
9
 (MCLK1), IC604 
w;
 (XMCK),
wa
 (XOUT)
2
IC501 
qd
 (XOUT)
7
IC601 
wl
 (BCKI2), IC604 
qf
 (BCK)
2
IC601 
qf
 (SCKOUT)
6
IC601 
wk
 (LRCKI2), IC604 
qg
 (LRCK)
4
IC601 
w;
 (BCKO), IC605 
4
 (BCK)
3
IC601 
ql
 (LRCKO), IC605 
5
 (LRCK)
4.4 Vp-p
88.6 ns
5
IC601 
ws
 (KFSIO), IC604 
qd
 (CKOUT)
– PANEL Board –
1
IC601 
id
 (XOUT)
• IC Block Diagrams
– DSP Board –
IC604
LC89056W-E
IC605
AK4527
38
37
36
23
24
1
2 3
4
5
44
8 9 10
46
17
22
21
20
30
35
25
26
27
28
29
32
33
34
16
45
13
14
15
47
40
41
48
CL
39
XSEL
CE
DI
EMPHA
AUDIO
DISEL
DOUT
DINO
DINI
DIN2
6
DGND
7
DVDD
11
AVDD
12
AGND
DOSEL0
R
VIN
LPF
CKSEL0
XSTATE
18 DGND
19 DVDD
XIN
XOUT
XMCK
XSEL
31
DGND
DO
CSFLAG
F0
F1
F2
VF
ERR9P
BPSYNC
ERROR
DATAO
DOSEL1
CKOUT
BCK
LRCK
CKSEL1
MODE0
MODE1
42
DGND
43
DVDD
XMODE
TIMING
MICROCOMPUTER
INTERFACE
SAMPLING
FREQUENCY
C BIT
DETECT
PA/PB
DETECT
LOCK
DETECT
INPUT
CIRCUIT
DATA
DEMODULATOR
PLL
X’ TAL
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34
FORMAT
CONVERTER
AUDIO
INTERFACE
INPUT
CIRCUIT
OUTPUT
CIRCUIT
LOOP1
LOOP0/SDA/CDTI
DIF1/SCL/CCLK
DIF0/CSN
P/SN
MCLK
DZF1
AVSS
AVDD
VREFH
VCOM
DZF2
RIN+
RIN–
LIN+
LIN–
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
DEM1
DEM0
TVDD
DVDD
DVSS
PDN
ICKS2
ICKS1
ICKS0
CAD1
CAD0
SDOS
I2C
SMUTE
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
DAUX
DFS
ST-S3
12
12
D552
R553
C552
R554
C553
Q551
IC551
D551
R552
R551
D923
D904
D903
D922
C918
C903
R912
R911
IC901
C902
D920
C907
C906
IC904
µ
PC7805AHF
C905
C904
C952
C953
IC903
L955
470
µ
H
C966
NO901
NO991
C991
C992
C955
R951
C957
NO507
CN508
CN510
C977
C978
C971
C970
C968
R941
D941
D942
R942
C941
R943
C964
C956
CN5031
CN5041
CN509
Q902
R555
D901
IC991
IC952
IC951
C916
R952
D924
C551
1SS133T
47k
0.1
47k
0.1
2SC2603
M51943BSL
1SS133T-72
10k
470
11ES2
11ES2
11ES2
11ES2
470
10V
10
50V
510
220
TA78057S
470
10V
11ES2-NTA2
220
10V
0.1
470
16V
3300
16V
4700
25V
0.1
NJM7810FA
10000p
3P
3P
0.1
0.1
10000p
470
10000p
4P
23P
5P
10
50V
10 50V
10000p
10000p
10000p
1k
1SS133T
1SS133T
1k
10
50V
3.3k
10000p
10
50V
5P
10P
21P
2SC2001-K1K2
4.7k
D3SBA20
NJM7815FA
TORX178B
TORX178B
10000p
470
1SS133T-72
4.7
50V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
AA4
AA5
AA4
AA5
BB1
BB2
BB3
BB4
BB1
BB2
BB3
BB4
DD1
DD2
DD3
DD4
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
DBFB FEEDBACK
AB20
AB21
TUNER L-IN
TC L-IN
TUNER R-IN
TC R-IN
A-GND
VCD L-IN
VCD R5-IN
DIG-Tx
DSP-Rx
DIG-CLK
AMP-DATA
AMP-CLK
AMP-LAT
DIR-UNLOCK
DIR-CS
DSP-CS
DIR-Rx
DSP-DECODE
DIR-XSTATE
DSP-ACK
CODEC-SMUTE
FL-OUT
FR-OUT
F-GND
LS-OUT
RS-OUT
S-GND
A-GND
A-GND
A+10V
D-GND
DBFB FEEDBACK
TC REC L-OUT
TC REC R-OUT
MIC-IN
D-GND
C-OUT
C-GND
LINE-MUTE
D+5V
A+5V
A-GND
D-GND
FRONT-GND
CENTER-OUT
CENTER-GND
MIC-SIG
MIC-GND
FR-OUT
FL-OUT
SR-OUT
SL-OUT
S-GND
D-GND
(A-GND)
EVER+5V
M(A)-GND
REC OUT-L 
PB-L
TC A-GND
PB-R
REC OUT-R
VCC
VCC
GND
OUT
GND
OUT
D+5V
(1/2)
(CHASSIS)
SYSTEM CONTROL 4
D-OUT
G
I
O
+5V REGULATOR
+7V REGULATOR
G
I
O
+3.3V REGULATOR
G
I
O
RESET SIGNAL
GENERATOR
RESET
SWITCH
G
I
O
+10V REGULATOR
+15V REGULATOR
G
I
O
OPTICAL RECEIVER
OPTICAL RECEIVER
OPTICAL IN
OPTICAL IN
(TO TC-S3)
(FROM CDP-S3)
(INCLUDED IN MAIN BOARD)
5-2.
SCHEMATIC  DIAGRAM  – MAIN Board (1/2) –
(Page 13)
(Page 13)
(Page 13)
(Page 16)
(Page 17)
(Page 16)
ST-S3
13
13
Q901
R908
R538
R530
R956
C505
C504
R518
R516
R515
R517
R501
C927
C928
D902
R963
R964
C962
C961
C915
D912
R903
C910
R904
R905
R906
C937
R549
C506
R558
R550
D944
D945
R532
R556
C942
C943
C561
EPT901
R524
C972
CN503
CN501
R523
R522
C562
C520
R520
R519
C519
R
5
0
8
C
5
0
1
C
5
0
2
C
5
0
3
X
5
0
1
R542
R541
R540
R539
C508
C509
R548
R521
R529
R525
D
9
2
1
CN5042
CN502
CN505
CN5032
R958
R959
R961
R962
JW95
X
5
0
2
IC501
Q503
Q502
R557
C510
D
9
1
3
C909
D911
EPT902
R966
R965
R
5
2
8
R
5
2
7
R
5
2
6
R
5
3
3
R
5
3
1
R
5
3
4
R
5
3
5
R
5
3
6
R
5
3
7
R
5
0
2
R
5
0
3
R
5
0
4
R
5
0
5
R
5
0
6
R
5
0
7
R
5
0
9
R
5
1
1
R
5
1
2
R
5
1
3
R
5
1
4
R545
R543
R
5
1
0
CN506
R957
D943
2SB734-3
1k
100
100
100
1000
6.3V
0.1
100
100
1k
100
100
0.1
0.1
11ES2-NTA2
5.6k
5.6k
10
50V
0.1
100
35V
MTZJ-T-
72-30B
10
10
50V
10k
100
100
0.1
3.3k
4.7
50V
1M
100k
1SS133T
1SS133T
47k
47k
470
6.3V
0.1
0.1
47k
0.1
10P
4P
100
10k
10000p
100p
10k
10k
100p
1
0
k
1
8
p
1
5
p
0
.1
3
2
.7
6
8
 H
z
47k
47k
100
100
10
50V
0.1
4.7k
100
100
100
1
S
S
1
33
T
-7
2
9P
19P
17P
15P
100
100
2.2k
2.2k
1
6
M
H
z
M30622MGA-A39FP
BN1A4M
BN1A4M
22k
4.7
50V
M
T
Z
J-T
-7
2
-5
.6
B
100
50V
11ES2
-NTA2
100
100
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
3
3
0
k
1
0
k
1
0
0
1
0
0
1
0
0
10k
10k
3
3
0
15P
100
1SS133T
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
ST-MUTE
ST-CE
ST-DOUT
ST-DIN
ST-CLK
M-RESET
ST-CLK
ST-DOUT
ST-DIN
ST-CE
ST-MUTE
M-RESET
RDS-DATA
RDS-INT
RDS-DATA
RDS-INT
I-DAT
I-CLK
TUN
STE
STE
TUN
EX-IN
EX-OUT
EX-LAT
EX-CLK
EX-CLK
EX-LAT
EX-OUT
EX-IN
AB1
AB2
AB1
AB2
JOG2-B
JOG2-A
JOG1-B
JOG1-A
VOLA
VOLB
KEY1
KEY1
JOG2-B
JOG2-A
JOG1-B
JOG1-A
VOLA
VOLB
CC1
CC2
CC3
CC4
CC5
CC6
CC5
CC6
I-CLK
I-DAT
DD1
DD4
DD2
DD3
M-RESET
I-DAT
I-CLK
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
CC1
CC4
CC3
CC2
SIRCS
DBFB FEEDBACK
POWER KEY
POWER KEY
AB20
AB21
I-CLK
I-DAT
SIRCS
CL
MC D0
MC D1
CE
A+10V
TUNED
STEREO
L-CH
ANALOG-GND
R-CH
MUTE
D+5V
N.C
RDS-INT
RDS-DATA
MRESET
I2C-CLK
I2C-DATA
VCD L-IN
VCD R-IN
V-MUTE
EVER+5V
POWER KEY
VF
VF
DBFB FEEDBACK
EXP-CLK
EXP-LAT
EXP-OUT DATA
EXP-IN DATA
VOLA
VOLB
KEY0 TA
AC LOW
AC LOW
AC HIGH
AC HIGH
UNREG
VP
CT
JOG1-A(FUNCTION)
JOG1-B(FUNCTION)
AC-LOW
AC-LOW
CD A-GND
CD D(M)-GND
UNREG 
TC M-GND
DISPLAY/STANDBY KEY
KEY1
JOG2-A
JOG2-B
JOG1-A
JOG1-B
VOLA
VOLB
TC M-GND
TC D-GND
CD D(M)-GND
CT
HAKO-GND
JOG2-B(F-SELECT)
JOG2-A(F-SELECT)
HAKO-GND
(CHASSIS)
(CHASSIS)
k
VSS
V
CC
N
M
I
ST-CE
ST-DOUT
ST-D
IN
ST-CLK
MODEL-IN
RD
S-IN
T
RD
S-D
ATA
G
ND
SIRCS
DIG-CLK
D
IR-U
NLOCK
DIR-CS
DSP-CS
AM
P-DATA
AM
P-CLK
AM
P-LAT
SO
FT-TEST
DSP-DECODE
STEREO
TUNED
DIR-XSTATE
POW
ER
 KEY
D
ISPLAY K
EY
EXP-IN
 DATA
EXP-O
UT DATA
EXP-LAT
EXP
-C
LK
CNVSS
AVSS
VREF
AVCC
SPEC-IN 
VCC
V
SS
DSP-ACK
NO-U
SE
VF
VF
-VP
D-GND
IIC-CLK
IIC-DATA
D+3.3V
SIRCS
RESET
D-GND
EVER+5V(SIRCS)
GND
RTS1
NC
+5V
CNVSS
RESET
GND
TXD1/CAN'T USE
CLK1/SQ-CLK
RXD1/SQ-DATA-IN
D-GND
D+5V
IIC-CLK
IIC-DATA
(2/2)
(FROM CDP-S3)
SYSTEM CONTROL 3
SYSTEM CONTROL 2
SYSTEM CONTROL 1
(FOR TEST)
(FOR TEST)
(CHASSIS)
M-RESET
S
T-MU
TE
X
IN
XOUT
R
ESET
XCOU
T
XCIN
D
SP-RX
DIG-TX
AC-
CUT
V-MUTE
CODEC
-SM
UTE
DIR-RX
LINE-M
U
TE
SYSTEM CONTROLLER
-28V REGULATOR
AC OFF
DRIVER
MUTING
MUTING
CONTROL
SWITCH
FM/AM
TUNER
UNIT
*
AM
ANTENNA
THE ASSEMBLED
BLOCK
SUPPLIED WITH
*
FM 75
COAXIAL
IIC CLK IIC DATA
NO-USE
NO-USE
NO-USE
NO-USE
(TO TA-S3)
(TO TA-S3)
5-3.
SCHEMATIC  DIAGRAM  – MAIN Board (2/2) –
 See page 11 for Waveforms.
(Page 12)
(Page 19)
(Page 12)
(Page 12)
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