Sony MDS-JB980 Service Manual ▷ View online
33
MDS-JB980
SECTION 6
DIAGRAMS
6-1. IC PIN DESCRIPTIONS
• IC101 CXA2523AR (RF AMP/FOCUS, TRACKING ERROR AMP) (BD BOARD)
Pin No.
Pin Name
I/O
Description
I
J
VC
A to F
PD
APC
APCREF
GND
TEMPI
TEMPR
SWDT
SCLK
XLAT
XSTBY
F0CNT
VREF
EQADJ
3TADJ
VCC
WBLADJ
TE
CSLED
SE
ADFM
ADIN
ADAGC
ADFG
AUX
FE
ABCD
BOTM
PEAK
RF
RFAGC
AGCI
COMPO
COMPP
ADDC
OPO
OPN
RFO
MORFI
MORFO
I
I
O
I
I
O
I
—
I
O
I
I
I
I
I
O
I
I
—
I
O
—
O
O
I
—
O
O
O
O
O
O
O
—
I
O
I
—
O
I
O
I
O
I-V converted RF signal I input
I-V converted RF signal J input
Middle point voltage generation output
Signal input from the optical pick-up detector
Light amount monitor signal input
Laser APC signal output
Reference voltage input for setting laser power
Ground
Temperature sensor connection
Reference voltage output for the temperature sensor
Serial data signal input from the CXD2664R (IC201)
Serial clock signal input from the CXD2664R (IC201)
Latch signal input from the CXD2664R (IC201)
“L”: Latch
Stand by signal input
(Fixed at “H”.)
Center frequency control voltage input of BPF22, BPF3T, EQ from the CXD2664R (IC201)
Reference voltage output (Not used in this set.)
Center frequency setting pin for the internal circuit EQ
Center frequency setting pin for the internal circuit BPF3T
Power supply pin (+3.3 V)
Center frequency setting pin for the internal circuit BPF22
Tracking error signal output to the CXD2664R (IC201)
External capacitor connection pin for the sled error signal LPF
Sled error signal output to the CXD2664R (IC201)
FM signal output of ADIP
ADIP signal comparator input
ADFM is connected with AC coupling
External capacitor connection pin for AGC of ADIP
ADIP duplex signal output to the CXD2664R (IC201)
I
3
signal/temperature signal output to the CXD2664R (IC201)
Focus error signal output to the CXD2664R (IC201)
Light amount signal output to the CXD2664R (IC201)
RF/ABCD bottom hold signal output to the CXD2664R (IC201)
RF/ABCD peak hold signal output to the CXD2664R (IC201)
RF equalizer signal output to the CXD2664R (IC201)
External capacitor connection pin for the RF AGC circuit
The RF amplifier output is input with AC coupling
User comparator output (Not used in this set.)
User comparator input (Fixed at “L”.)
External capacitor pin for cutting the low band of the ADIP amplifier
User operation amplifier output (Not used in this set.)
User operation amplifier inversion input (Fixed at “L”.)
RF amplifier signal output
Groove RF signal is input with AC coupling
Groove RF signal output
1
2
3
4 to 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
• Abbreviation
APC: Auto Power Control
AGC: Auto Gain Control
AGC: Auto Gain Control
34
MDS-JB980
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
• IC201 CXD2664R (DIGITAL SERVO SIGNAL PROCESSOR/DIGITAL SIGNAL PROCESSOR) (BD BOARD)
Description
Pin No.
Pin Name
I/O
Not used. (open)
Track jump detection signal output to the system control
In the state of executire command signal output
Not used. (open)
Power supply pin (+2.6 V)
Serial data signal input from the system control
Serial clock signal input from the system control
Serial latch signal input from the system control
Ground pin
Serial reading data signal output to the system control
Internal status (SENSE) output to the system control
Reset signal input from the system control
“L”: Reset
Subcode Q sync (SCOR) signal output to the system control
Digital In U-bit CD format or MD format subcode Q sync (SCOR) signal output to the
system control
Laser power switching signal input from the system control
“H”: Recording, “L”: Playback
Interrupt status signal output to the system control
Recording data signal output enable input from the system control
Power supply pin (+3.3 V)
System clock signal input (Fixed at “L”.)
System clock signal input (Input terminal during OSCN:“H” )
Internal oscillating circuit control signal input
Ground pin
System clock frequency setting
(Fixed at “H”.)
Digital audio signal input (Optical input)
Digital audio signal input (USB input)
Digital audio signal output (Optical output)
Serial data signal input
LR clock signal input
Serial data bit clock signal input
Power supply pin (+2.6 V)
Ground pin
Data input from the A/D converter
Data output to the D/A converter
LR clock signal output for the A/D and D/A converter
Bit clock signal output to the A/D and D/A converter
256Fs clock signal output (Not used.)
Write enable signal output for DRAM
Read enable signal output for DRAM
Power supply pin (+3.3 V)
Ground pin
DRAM address output (Not used.) (Open)
Data input/output for DRAM
* O (3) for 3-state output in the column I/O
MNT0 (FOK)
MNT1 (SHCK)
MNT2 (XBUSY)
MNT3 (SLOC)
VDC0
SWDT
SCLK
XLAT
VSC0
SRDT
SENS
XRST
SQSY
DQSY
RPWR
XINT
XT
VDIO0
OSCI
OSCO
OSCN
VSIO0
XTSL
DIN0
DIN1
DOUT
DATAI
LRCKI
XBCKI
VDC1
VSC1
ADDT
DADT
LRCK
XBCK
FS256
XWE
XOE
DRVDD0
DRVSS0
A11
D3
D0
D2
D1
O
O
O
O
—
I
I
I
—
O (3)
O (3)
I
O
O
I
O
O
—
I
I/O
I
—
I
I
I
O
I
I
I
—
—
I
O
O
O
O
O
O
—
—
O
I/O
I/O
I/O
I/O
35
MDS-JB980
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
Description
Pin No.
Pin Name
I/O
XCAS
XRAS
A09
A08
A10
A07
A00
A06
A01
A05
A02
VDC2
VSC2
A04
A03
DRVDD1
DRVSS1
TEST0
TEST1
TEST2
AVD1
ASYO
ASYI
BIAS
RFI
AVS1
PCO
FILI
FILO
CLTV
PEAK
BOTM
ABCD
FE
AUX1
VC
ADIO
ADRT
ADRB
SE
TE
AVD2
AVS2
CAS signal output for DRAM
RAS signal output for DRAM
DRAM address output
Not used. (Open)
DRAM address output
Power supply pin (+2.6 V)
Ground pin
DRAM address output
DRAM address output
Power supply pin (+3.3 V)
Ground pin
Not used. (Fixed at “L”.)
Not used. (Fixed at “H”.)
Not used. (Open)
Power supply pin (+3.3 V)
Play back EFM duplex signal output
Play back EFM comparator slice level input
Play back EFM comparator bias current input
Play back EFM RF signal input
Ground pin
Phase comparison output for the recording/playback EFM master PLL
Filter input for the recording/playback EFM master PLL
Filter output for the recording/playback EFM master PLL
Internal VCO control voltage input for the recording/playback EFM master PLL
Light amount signal peak hold input
Light amount signal bottom hold input
Light amount signal input
Focus error signal input from the CXA2523AR (IC101)
Auxiliary A/D input
Middle point voltage input from the CXA2523AR (IC101)
Monitor output of the A/D converter input signal (Not used.) (Open)
A/D converter operational range upper limit voltage input (Fixed at “H”.)
A/D converter operational range lower limit voltage input (Fixed at “L”.)
Sled error signal input from the CXA2523AR (IC101)
Tracking error signal input from the CXA2523AR (IC101)
Power supply pin (+3.3 V)
Ground pin
O
O
O
O
O
O
O
O
O
O
O
—
—
O
O
—
—
I
I
I
—
O
I (A)
I (A)
I (A)
—
O (3)
I (A)
O (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
I (A)
O (A)
I (A)
I (A)
I (A)
I (A)
—
—
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O
• Abbreviation
EFM: Eight to Fourteen Modulation
PLL : Phase Locked Loop
VCO: Voltage Controlled Oscillator
PLL : Phase Locked Loop
VCO: Voltage Controlled Oscillator
36
MDS-JB980
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112 to 114
115
116
117
118
119
120
Description
Pin No.
Pin Name
I/O
DCHG
APC
ADFG
VDIO1
VSIO1
F0CNT
VDC3
VSC3
XLRF
CLRF
DTRF
APCR
LDDR
TRDR
TFDR
FFDR
FRDR
FS4
SRDR
SFDR
SPRD
SPFD
FGIN
TST1 to TST3
EFMO
VDIO2
VSIO2
VDC4
VSC4
MDDT1
I (A)
I
I
—
—
O
—
—
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
O
—
—
—
—
I
Connected to +3 V power supply
APC error signal input (Not used.) (Fixed at “H”.)
ADIP duplex FM signal input from the CXA2523AR (IC101)
Power supply pin (+3.3 V)
Ground pin
Filter f0 control output to the CXA2523AR (IC101)
Power supply pin (+2.6 V)
Ground pin
Control latch signal output to the CXA2523AR (IC101)
Control clock signal output to the CXA2523AR (IC101)
Control data signal output to the CXA2523AR (IC101)
Reference PWM output for the laser APC
PWM output for the laser digital APC (Not used.) (Open)
Tracking servo drive PWM output (–)
Tracking servo drive PWM output (+)
Focus servo drive PWM output (+)
Focus servo drive PWM output (–)
4Fs clock signal output (Not used.) (Open)
Sled servo drive PWM output (–)
Sled servo drive PWM output (+)
Spindle servo drive PWM output (–)
Spindle servo drive PWM output (+)
Spindle CAV servo FG signal input (Fixed at “L”.)
Test input (Fixed at “L”.)
EFM output when recording
Power supply pin (+3.3 V)
Ground pin
Power supply pin (+2.6 V)
Ground pin
MD data mode1 switching signal input (Fixed at “L”.)
• Abbreviation
EFM: Eight to Fourteen Modulation
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