Sony ICF-CD855V Service Manual ▷ View online
29
ICF-CD855V
IC702
BA5826FP-E2
1
2
3
4
5
6
7
8
9
10
11
12
13
13
14
28
27
26
24
23
22
21
20
19
18
17
16
15
25
LEVEL
SHIFT
LEVEL
SHIFT
THERMAL
SHUT-DOWN
MONITOR
LEVEL
SHIFT
LEVEL
SHIFT
D.BUFF
D.BUFF
D.BUFF
GND
SLIN
(SLIN)
VREF
VCC
VCC
(FIN)
FIN
F–
F+
SL–
SL+
NC
OPIN
SP–
REG–B
SP+
SPIN
RST
REGO
MUTE
GND
TIN
(TIN)
T–
T+
GND
OPOUT
D.BUFF
D.BUFF
D.BUFF
D.BUFF
D.BUFF
REGULATOR
DRIVER
MUTE
VCC
VCC
– TUNER Board –
IC1
TA2149BN
RF GND
3
2
1
IF REQ
AM
MIX
FM RFIN
AM LOW CUT
5
4
MIX OUT
VCC
AM IF IN
8
7
6
FM IF IN
GND
10
9
AGC
QUAD
12
11
R-OUT
L-OUT
FM RFOUT
22
23
24
20
21
17
18
19
15
16
13
14
AM RFIN
RF VCC
FM OSC
ST LED
OSC OUT
AM OSC
IF REQ
LPF1
MPX IN
DET OUT
LPF2
FM
MIX
FM
OSC
LEVEL
DET
AM
DET
MUTE
FM
DET
ST/MO
FM/AM
AM
OSC
AGC
SW
ST
1/8
BUFF
BUFF
DIVIDE
DECODE
VCO
IF BUFF
AF BUFF
AF
FM RF
AM IF
FM IF
1/1 OR
1/16
30
ICF-CD855V
IC2
LC72137M-TLM-E
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
19
20
UNLOCK
DETECTOR
POWER ON
RESET
UNIVERSAL
COUNTER
CCB
I/F
CE
DI
CL
DO
XOUT
AOUT
XIN
AIN
PD
VSS
VDD
B04
FMIN
AMIN
B01
B02
B03
I01
I02
IFIN
PHASE
DETECTOR
CHARGE
PUMP
REFERENCE
DIVIDER
SWALLOW
COUNTER
1/16,1/17
4BITS
12BITS
PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER
LATCH
1/2
17
18
31
ICF-CD855V
– MAIN Board –
IC301
BD3870FS-E2
IC302
LA4627
1
STBY
2
OUT2
3
NC
4
PRE GND
5
NC
6
IN2
9
P.P
8
DC
7
IN1
VCC
OUT1
NC
POWER
AMP
RIPPLE
FILTER
+
–
–
POWER
AMP
REF
AMP
+
–
TSD
PROTECTOR
STANDBY SWITCH
POP SOUND
PROTECTION
BLOCK
12
11
10
32
ICF-CD855V
MAIN BOARD IC401
µ
PD789477GC-A39-8BT (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
NC
—
Not used
3 to 5
VLC2 to VLC0
—
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
6 to 9
COM0 to COM3
O
Common drive signal output to the liquid crystal display
10 to 37
SEG0 to SEG27
O
Segment drive signal output to the liquid crystal display
38
AVDD
—
Power supply terminal (+3.3V) (analog system)
39
FSEQ
I
CD synchronizing signal detection signal input from the digital signal processor
40
CD OPEN
I
CD lid open/close detect switch input terminal “L”: CD lid is closed, “H”: CD lid is opened
41
DRF
I
CD focus on/off detection signal input from the digital signal processor
42
VERSION
I
Setting input terminal for destination
43 to 46
KEY3 to KEY0
I
Key input terminal (A/D input)
47
AVSS
—
Ground terminal (for analog system)
48
R CLK
O
PLL serial data transfer clock signal output to the FM/AM PLL
49
AC IN
I
Power detection signal input terminal when connected AC power adapter (A/D input)
50
WRQ
I
CD interruption signal input from the digital signal processor
51
MUTE
O
Tuner muting on/off control signal output to the FM/AM PLL “L”: muting on
52
BUZZER
O
Beep sound signal output terminal
53
CD DATA-IN
I
Serial data input from the digital signal processor
54
CD DATA
O
Serial data output to the digital signal processor
55
CD CLK
O
Serial data transfer clock signal output to the digital signal processor
56
CD CE
O
Chip enable signal output to the digital signal processor
57
R DATA
O
PLL serial data output to the FM/AM PLL
58
XRST
O
System reset signal output to the digital signal processor “L”: reset
59
R CE
O
PLL chip enable signal output to the FM/AM PLL
60
POWER ON
O
Power on/off control signal output terminal for the power amplifier
“L”: standby mode, “H”: power amplifier on
“L”: standby mode, “H”: power amplifier on
61
ALARM A BUZ
O
LED drive signal output terminal for ALARM A BUZZER indicator
62
ALARM A RADIO
O
LED drive signal output terminal for ALARM A RADIO indicator
63
ALARM A CD
O
LED drive signal output terminal for ALARM A CD indicator
64
VOL CLK
O
Serial data transfer clock signal output to the electrical volume
65
VOL DAT
O
Serial data output to the electrical volume
66
ALARM B BUZ
O
LED drive signal output terminal for ALARM B BUZZER indicator
67
ALARM B RADIO
O
LED drive signal output terminal for ALARM B RADIO indicator
68
ALARM B CD
O
LED drive signal output terminal for ALARM B CD indicator
69
IC
—
Ground terminal
70
XT1
I
Sub system clock input terminal (32.768 kHz)
71
XT2
O
Sub system clock output terminal (32.768 kHz)
72
VDD0
—
Power supply terminal (+3.3V)
73
VSS0
—
Ground terminal
74
X1
I
Main system clock input terminal (4.19 MHz)
75
X2
O
Main system clock output terminal (4.19 MHz)
76
RESET
I
System reset signal input from the reset signal generator “L”: reset For several hundreds msec.
after the power supply rises, “L” is input, then it changes to “H”
after the power supply rises, “L” is input, then it changes to “H”
77
AMUTE
O
Audio muting on/off control signal output terminal “L”: muting on
78
RADIO ON
O
Power on/off control signal output for the tuner section “L”: tuner power on
79
CD ON
O
Power on/off control signal output for the CD section “L”: CD power on
80
NC
I
Not used
•
IC Pin Function Description
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