Sony ICF-CD543RM Service Manual ▷ View online
30
ICF-CD543RM
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
19
20
UNLOCK
DETECTOR
POWER ON
RESET
UNIVERSAL
COUNTER
CCB
I/F
CE
DI
CL
DO
XOUT
AOUT
XIN
AIN
PD
VSS
VDD
FMIN
AMIN
B01
B02
B03
I01
I02
IFIN
PHASE
DETECTOR
CHARGE
PUMP
REFERENCE
DIVIDER
SWALLOW
COUNTER
1/16,1/17
4BITS
12BITS
PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER
LATCH
1/2
16
17
18 VSSA
– MAIN Board –
IC1
CXA1960Q
+
–
12
13
14
19
15
TVIN
MREF
GRND
FMIB
IFCT
NC
FMIN
FMR
O
OLAG
ARFI
REGV
TVRO
FTLO
BAND
TUNE
PLLO
FALC
COMP
37
38
39
40
AAGC
DETO
PLT2
MPXI
MPRM
V12M
MUTE
PLT1
PLL1
PLL2
MPX DECODER
AM BPF
PSN
1/X
FM/TV
LPF
PD
VCO
1/2
1/2
STID
14V
PLAP
TUNE
38kHz
STEREO AUDIO R
STEREO AUDIO L
19kHz
1.65V
1.25V
36
8 9
10
VCO
STID
MCNT
GRND
VCC
1
4
2
3
5
6
MPRG
LOUT
ROUT
DDCN
PLLI
7
+
–
+
–
35
34
FM DET
150kHz
FM LMT
OL DET
TV RF
AMP
FM RF
AMP
AM RF
AMP
45kHz
31
32
33
MUTE
AGC AMP
AM AGC
1.25V
AM/FM: 1/2
TV: 1/8
TV: 1/8
1.25V
18
17
16
FMBF
AMLO
AM OSC
FM/TV OSC
20
30
29
27
28
23
24
25
26
22 21
11
IC51
LC72122V-TLM
31
ICF-CD543RM
STANDBY
T.S.D.
BS
FILTER
PRE GND2
PRE GND1
NF2
IN2
IN1
NF1
FIL
TER
STBY
POWER GND
BS1
OUT1
VCC
OUT2
10
3 4 5
6
BS
BS2
2
NC
1
8
9
7
11 12
13
14 15
+
–
–
+
–
–
+
–
–
1
VIN1
2
VOUT1
3
GND
4
DATA
LOGIC
CONTROL
VREF
+
–
–
+
–
8
VIN2
7
VOUT2
6
VCC
5
CLOCK
REF AMP
VOL AMP 2
VOL AMP 1
VR1
VR2
IC331
M62429P
IC371
BA5417
32
ICF-CD543RM
5-12.
IC PIN FUNCTION DESCRIPTION
IC401
µ
PD789477GC-A20-8BT (TYPE B) (SYSTEM CONTROLLER)
IC401
µ
PD789477GC-A52-8BT-A (TYPE B) (SYSTEM CONTROLLER)
IC401
µ
PD789477GC-A53-8BT-A (TYPE B) (SYSTEM CONTROLLER)
IC401
µ
PD789477GC-A54-8BT-A (TYPE B) (SYSTEM CONTROLLER)
•
LCD BOARD IC401
µ
PD789477GC-A16-8BT (TYPE A) (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
NC
—
Not used
3 to 5
VLC0 to VLC2
—
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
6 to 9
COM0 to COM3
O
Common drive signal output to the liquid crystal display
10 to 25
SEG0 to SEG15
O
Segment drive signal output to the liquid crystal display
26 to 32
NC
—
Not used
33
OPEN S/W
I
Detection input from the tray open/close detect switch
“L”: when tray is open, “H”: when tray is close
“L”: when tray is open, “H”: when tray is close
34
CLOSE S/W
I
Detection input from the tray open/close detect switch
“L”: when tray is close, “H”: when tray is open
“L”: when tray is close, “H”: when tray is open
35
TRAY OPEN
O
Motor drive signal output to the disc tray open/close motor driver “H” table out
36
TRAY CLOSE
O
Motor drive signal output to the disc tray open/close motor driver “H” table in
37
NC
—
Not used
38
AVDD
—
Power supply terminal (+3.3V) (analog system)
39
ENCODE +
I
Jog dial pulse input terminal
40
ENCODE –
I
Jog dial pulse input terminal
41
OPTION
I
Destination setting terminal Not used
42 to 44
KEY0 to KEY2
I
Key input terminal (A/D input)
45
RST
—
Not used
46
DRF
I
Focus on/off detection signal input from the digital signal processor
47
AVSS
—
Ground terminal (analog system)
48
RC
I
Remote control signal input from the remote control receiver
49
AC IN
I
Power failure detection signal input terminal “L”: power failure, “H”: power on
50
WRQ
I
Interruption detection signal input from the digital signal processor
51
FSEQ
I
Synchronizing signal detection signal input from the digital signal processor
52
BUZZER
O
Buzzer sound drive signal output
53
C LAT
O
Chip enable signal output to the digital signal processor
54
C DATA
O
Serial data output to the digital signal processor
55
C CLK
O
Serial data transfer clock signal output to the digital signal processor
56
C DATA IN
I
Serial data input from the digital signal processor
57
XRST
O
Reset signal output to the digital signal processor “L”: reset
58
VR DATA
O
Volume data output
59
VR CLOCK
O
Volume clock signal output
60
POWER ON
O
Power amplifier on/off control signal output “L”: standby mode, “H”: power amplifier on
61
R DATA
O
Serial data output terminal Not used
62
R CLK
O
Serial data transfer clock signal output to the FM/AM PLL
63
R DATA IN
I
Serial data input from the FM/AM PLL
64
R CE
O
Chip enable signal output to the FM/AM PLL
65
TRAY MUTE
O
Not used
66
NC
—
Not used
67
SHIFT 0
—
Not used
68
SHIFT 1
—
Not used
69
IC
—
Internal connection terminal
70
TX1
I
Sub system clock input terminal (32.768 kHz)
71
TX2
O
Sub system clock output terminal (32.768 kHz)
Ver. 1.3
33
ICF-CD543RM
Pin No.
Pin Name
I/O
Description
72
VDD0
—
Power supply terminal (+3.3V)
73
VSS0
—
Ground terminal
74
X1
I
Main system clock input terminal (4.19 MHz)
75
X2
O
Main system clock output terminal (4.19 MHz)
76
RESET
I
System reset signal input “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
77
CD ON
O
Power on/off control signal output for the CD +3.3V power supply “L”: CD power on
78
RADIO ON
O
Power on/off control signal output for the radio +3.3V power supply “L”: radio power on
79
A MUTE
O
Audio line muting on/off control signal output “L”: muting on
80
KITCHEN LED
O
LED drive signal output of the TIMER “L”: LED on
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