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Model
ICD-UX60 ICD-UX70 ICD-UX80
Pages
42
Size
1.51 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
icd-ux60-icd-ux70-icd-ux80.pdf
Date
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ICD-UX60/UX70/UX80
25
IC2003  MAX1797EUA+TG069 (AUDIO Board (3/4))
IC2004  MAX1797EUA+TG069 (AUDIO Board (3/4))
IC2007  XC6213B312NR (AUDIO Board (3/4))
IC2010  XC6213B152NR (AUDIO Board (3/4))
2
FB
1
LBI
4
SHDN
TIMER BLOCK
TON MAX
TOFF
MAX
START
0.85V
3
LBO
ERROR
AMPLIFIER
CURRENT
LIMIT
AMPLIFIER
Q
S
R
S
R
Q
S
R
Q
BATT
8
LX
6
GND
5
OUT
7
FB SELECT
REFERENCE
BODY
DIODE
CONTROL
1
CE
VIN
VOUT
2
VSS
EACH
CIRCUIT
ERROR
AMP
R2
R1
ON/OFF
CONTROL
VOLTAGE
REFERENCE
CURRENT
LIMIT
4
3
ICD-UX60/UX70/UX80
26
1
OSC
32.768kHz
GND
FCON
NC
CE1
DATA
CLK
TIRQ
AIRQ
CEO
FOUT
VDD
OUTPUT
CONTROLLER
CLOCK and CALENDAR
TIMER REGISTER
ALARM REGISTER
CONTROL REGISTER
SHIFT REGISTER
BUS
INTERFACE
CIRCUIT
DIVIDER
CONTROL LINE
6
5
8
7
21
22 NC
NC
NC
NC
NC
NC
NC
NC
NC
19
20
17
18
15
16
14
10
11
9
2
4
3
INTERRUPTS
CONTROLLER
IC2005  XC6215B312NR (AUDIO Board (3/4))
IC2006  XC6215B282NR (AUDIO Board (3/4))
IC2009  XC6215B152NR (AUDIO Board (3/4))
IC2011  XC6215B102NR (AUDIO Board (3/4))
IC3000  RTC-4574NB (AUDIO Board (4/4))
IC4001  XC61CN2702NR (AUDIO Board (4/4))
IC5000  XC61CN0902NR (MAIN Board (2/3))
IC5002  XC61CN2702NR (MAIN Board (2/3))
1
CE
VIN
VOUT
2
VSS
EACH CIRCUIT
R1
R2
ON/OFF
CONTROL
CURRENT
LIMIT
ERROR
AMP
VOLTAGE
REFERENCE
3
4
2
1
3
VREF
NC
VSS
4
VIN
VOUT
ICD-UX60/UX70/UX80
27
•  IC Pin Function Description
AUDIO BOARD  IC1001  WM8750BLGEFL/R (A/D CONVERTER)
Pin No.
Pin Name
I/O
Description
1
MCLK
I
Master clock signal input
2
DCVDD
—
Digital power supply pin (+1.8V)
3
DBVDD
—
Digital power supply pin (+3.1V)
4
DGND
—
Digital ground pin
5
BCLK
I/O
Audio interface bit clock signal input/output
6
DACDAT
I
DAC digital audio data signal input
7
DACLRC
I/O
Audio interface left/right clock/clock out signal input/output
8
ADCDAT
O
ADC digital audio data signal output
9
ADCLRC
I/O
Audio interface left/right clock signal input/output
10
MONOOUT
O
Mono signal output    Not used in this set. (Open)
11
OUT3
O
Analog signal output    Not used in this set. (Open)
12
ROUT1
O
Analog right signal output 1 (Line or headphone)
13
LOUT1
O
Analog left signal output 1 (Line or headphone)
14
HPGND
—
Analog ground pin
15
ROUT2
O
Analog right signal output 2 (Line or headphone or speaker)
16
LOUT2
O
Analog left signal output 2 (Line or headphone or speaker)
17
HPVDD
—
Analog power supply pin (+3.1V)
18
AVDD
—
Analog power supply pin (+3.1V)
19
AGND
—
Analog ground pin (Return path for AVDD.)
20
VREF
O
Reference voltage decoupling capacitor connect pin
21
VMID
O
Midrail voltage decoupling capacitor connect pin
22
MICBIAS
O
Microphone bias signal output
23
RINPUT3/HPDET
I
Analog right channel signal input 3 or headphone plug-in detection signal input
24
LINPUT3
I
Analog left channel signal input 3
25
RINPUT2
I
Analog right channel signal input 2
26
LINPUT2
I
Analog left channel signal input 2
27
RINPUT1
I
Analog right channel signal input 1
28
LINPUT1
I
Analog left channel signal input 1
29
MODE
I
Digital mode control interface selection signal input
30
CSB
I
Digital chip select/device address selection signal input
31
SDIN
I/O
Digital control interface data signal input/2-wire acknowledge signal output
32
SCLK
I
Digital control interface clock signal input
ICD-UX60/UX70/UX80
28
MAIN BOARD  IC5001  LC823403B-08B-E (SYSTEM CONTROL, D/A CONVERTER)
Pin No.
Pin Name
I/O
Description
B2
TEST1
I
Test pin 1
A1
TEST2
I
Test pin 2
C2
TEST3
I
Test pin 3
B1
TEST4
I
Test pin 4
D2
TEST5
I
Test pin 5
C1
TEST6
I
Test pin 6
C3
TCK
I
JTAG test clock signal input
D3
RTCK
O
JTAG test returned clock signal output
D1
NTRST
I
JTAG test reset signal input
E2
EXA16(A15)
O
External memory address bit 16 signal output    NOR address line signal output
D4
TDI
I
JTAG test data signal input
E3
EXA15(A14)
O
External memory address bit 15 signal output    NOR address line signal output
E1
EXA14(A13)
O
External memory address bit 14 signal output    NOR address line signal output
F2
TMS
I
JTAG test mode select signal input
E4
EXA13(A12)
O
External memory address bit 13 signal output    NOR address line signal output
E5
EXA12(A11)
O
External memory address bit 12 signal output    NOR address line signal output
F3
TDO
O
JTAG test data signal output
F1
NRES
I
Reset signal input
G2
EXA11(A10)
O
External memory address bit 11 signal output    NOR address line signal output
F4
Vdd1
—
Digital power supply pin (+1.0V)
F5
EXA10(A9)
O
External memory address bit 10 signal output    NOR address line signal output
G3
Vss
—
Digital ground pin
H2
EXA9(A8)
O
External memory address bit 9 signal output    NOR address line signal output
G1
Vdd2
—
Digital power supply pin (+3.1V)
G4
EXA20(A19)
O
External memory address bit 20 signal output    NOR address line signal output
G5
NCS0
O
External memory chip select signal output 0    NOR chip select signal output
H3
EXA21(P2E)
O
External memory address bit 21 signal output    NOR address line signal output
H1
NCS1
O
External memory chip select signal output 1    Not used in this set. (Open)
J2
NWRENWRL/NWE
O
External memory write/external memory write low byte signal output
H4
NCS2(P20)
O
External memory chip select 2 signal output    LCD chip select signal output
J1
NCS3(P10)
O
External memory chip select 3 signal output    RTC chip select signal output
H5
NRESET
I
Flash reset signal input    Not used in this set. (Open)
K2
NLBEXA0
O
External memory address bit 0/external memory low byte select signal output    
Not used in this set. (Open)
K1
NHBNWRH
O
External memory write/external memory write high byte signal output    
Not used in this set. (Open)
J3
PHI(P11)
O
AHB bus clock signal output (32.768kHz)    Not used in this set. (Open)
J4
EXA19(A18)
O
External memory address bit 19 signal output    NOR address line signal output
K3
EXA18(A17)
O
External memory address bit 18 signal output    NOR address line signal output
L2
EXTFIQ(P2F)
I
External FIQ interruption signal input    Not used in this set. (Open)
L1
SCK0
O
Serial interface 0 clock signal output    RTC/LCD clock signal output
K4
EXA8(A7)
O
External memory address bit 8 signal output    NOR address line signal output
J5
EXA7(A6)
O
External memory address bit 7 signal output    NOR address line signal output
M1
SDO0
O
Serial interface 0 data signal output    RTC/LCD data signal output
M2
EXA6(A5)
O
External memory address bit 6 signal output    NOR address line signal output
L3
SDI0
I
Serial interface 0 data signal input    RTC data signal input
L4
Vdd1
—
Digital power supply pin (+1.0V)
K5
EXA5(A4)
O
External memory address bit 5 signal output    NOR address line signal output
M3
Vss
—
Digital ground pin
N1
EXA4(A3)
O
External memory address bit 4 signal output    NOR address line signal output
N2
Vdd2
—
Digital power supply pin (+3.1V)
P1
EXA3(A2)
O
External memory address bit 3 signal output    NOR address line signal output
N3
EXA2(A1)
O
External memory address bit 2 signal output    NOR address line signal output
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