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Model
ICD-B25
Pages
26
Size
1.31 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
icd-b25.pdf
Date

Sony ICD-B25 Service Manual ▷ View online

6
ICD-B25
3-1. IC PIN DESCRIPTION
• IC712  MB90523APFF-G-122-BND (SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1
RTCCE
O
Real-time clock chip enable signal output
2
BEEP
O
Beep signal output
3
XFLMRE
O
Flash memory read enable signal output
4
XFLMWE
O
Flash memory write enable signal output
5
FLMRB
I
Flash memory R/B signal input
6
DSPPWR
O
DSP power supply signal output
7
ADASYSCK
O
ADA codec system clock signal output
8
VCC
Power supply pin
9
DSPSYSCK
O
DSP system clock signal output
10
XZRST
O
Zephy reset signal output (Not used in this set.)
11
DSPACK
O
DSP I/F acknowledge signal output
12
XDIFEN
O
DSP I/F enable signal output
13
DCOMDT
O
DSP I/F command/data signal output
14
SIN1
I
DSP I/F serial data signal input
15
SOT1
O
DSP I/F serial data signal output
16
SCK1
O
DSP I/F serial clock signal output
17 to 32
SEG00 to 15
O
LCD segment signal output
33
VSS
Ground pin
34
C
C (Connect to power supply pin.)
35
SIN2
I
Zephyr/RTC I/F serial data signal input
36
SOT2
O
Zephyr/RTC I/F serial data signal output
37
SCK2
O
Zephyr/RTC I/F serial clock signal output
38
DVCC
Digital power supply pin
39
DVSS
Digital ground pin
40
ZIFACK
O
Zephyr I/F acknowledge signal output (Not used in this set.)
41
SIPCS
O
Serial parallel converter IC I/F chip enable signal output
42
AVCC
Analog power supply pin
43
AVRH
A/D reference voltage H (Connect to VCC.)
44
AVRL
A/D reference voltage L (Connect to ground.)
45
AVSS
Analog ground pin
46
BATT
I
Battery level detection A/D signal input
47
KEYIN0
I
Key A/D signal input 0
48
KEYIN1
I
Key A/D signal input 1
49
SPEED
I
Speed switch A/D signal input
50
XVORSW
I
VOR switch signal input (Low: VOR switch ON)
51
HPJACK
I
Headphone jack ON/OFF signal input (Fixed at “L” in this set.)
52
FLMSEL
I
Flash memory select A/D signal input
53
KEYPUP
O
Key pull-up signal output
54
VCC
Power supply pin
55
FLMALE
O
Flash memory address latch enable signal output (AND: OE)
56
FLMCLE
O
Flash memory command enable signal output (AND: CDE)
57
XVORIN
I
VOR signal input
58
XDSPRST
O
DSP reset signal output
59 to 62
COM0 to 3
O
LCD common signal output
63
VSS
Ground pin
64 to 72
SEG16 to 24
O
LCD segment signal output
73
SUBXTAL
O
Sub clock oscillation pin (Not used in this set.)
74
SUBCLK
I
Sub clock oscillation signal input (32.768 kHz)
SECTION 3
DIAGRAMS
ICD-B25
7
7
Pin No.
Pin Name
I/O
Pin Description
75 to 81
SEG25 to 31
O
LCD segment signal output
82 to 85
V0 to 3
LCD driver reference power supply pin
86
XHSTBY
I
Hardware standby signal input
87
MD2
I
Operation mode signal input 2
88
MD1
I
Operation mode signal input 1 (Connect to VCC.)
89
MD0
I
Operation mode signal input 0
90
XRESET
I
Reset signal input
91
VSS
Ground pin
92
XTALIN
I
Main oscillation signal input (4.096 MHz)
93
XTAL
O
Main oscillation signal output (4.096 MHz)
94
VCC
Power supply pin
95
WAKEUP
I
Wake up signal input
96
DSPIFREQ
I
DSP voice I/F request signal input
97
ZIFREQ
I
USB microcomputer (zephyr) I/F request signal input
98
RTCINTR
I
Real-time clock interruption request signal input
99
VBUSOFF
I
USB Vbus ON/OFF detection signal input (H=OFF)
100
HOLDSW
I
Hold switch signal input (High: HOLD)
101
XFLMCEO
O
Flash memory chip enable 0 signal output
102
XFLMRST/CE1
O
Flash memory reset signal/chip enable 1 signal output (Not used in this set.)
103 to 110
FLMIO00 to 07
I/O
Flash memory data bus
111 to 118
FLMIO08 to 15
I/O
Flash memory data bus (Not used in this set.)
119
VSS
Ground pin
120
XFLMWP
O
Flash memory write protect signal output
ICD-B25
8
8
3-2. BLOCK DIAGRAM
3
4
1
3
5
1
6
4
22
4
1
13
6
11
8
13
7
11
2
3
12
8
5
6
10
38
35
37
34
36
59
72
7
8
9
16
17
19
18
5
3
101
56
55
120
4
96
13
12
14
15
16
57
52
49
95
53
47
48
100
29
31
33
27
28
42
43
9
4
14
15
9
6
3
3
1
6
7
6
1
58
11
36
4
3
2
35
37
41
1
98
74
7
6
1
46
2
51
86
90
1
92
93
15
20
17
8
9
10
11
103
ı
110
59
62
ı
12
37
64
72
ı
75
81
ı
17
32
ı
29
32
ı
41
44
ı
9
8
VIN+
VIN-
VOUT
2
3
VIN
CE
VOUT
IC505
+2.9V REG
2
3
VIN
CE
VOUT
IC506
+2.9V REG
5
2
3
VIN
CE
VOUT
IC502
+3.1V REG
DC-DC
CONVERTER
(3.2V)
DC-DC
CONVERTER
SI
SO
SCLK
CE
INTR
32KOUT
S701 - 705
3
1
+
-
17
 • Signal Path
: PB
: REC
MIC101
MIC
MIC
J101
IC101
MIC AMP
Q101
MIC
SENS
IC102
ALC AMP
IN
OUT
INPUT OUT1
IC103
VOR CONTROL
IC107
A/D, D/A CONVERTER
VIN
VOUT
PDWN
XTI
BCK
FS
DIN
DOUT
IC109
DSP
SCK1
SI1
SO1
SIEN1
SOEN1
P3
P2
SI2
SO2
SIEN2
SOEN2
SCK2
CLKIN
/RESET
IC105
IC106
IC712
SYSTEM CONTROL
IC104, 108
CLOCK GEN
CLKIN
CLKIN
CE
CE
Q0
Q0
IC706
FLASH MEMORY
Q702
+B
SW
ZVCC
Q705, 706
WAKE-UP
SW
IO1
ı
IO8
VCC
R/B
RE
CE
CLE
ALE
WE
WP
DSPIFREQ
DCOMDT
XDIFEN
SIN1
SOT1
SCK1
XVORIN
FLMIO00
ı
FLMIO07
FLMRB
XFLMRE
XFLMCE0
FLMCLE
FLMALE
XFLMWE
XFLMWP
FLMSEL
SPEED
WAKEUP
KEYPUP
KEYIN0
KEYIN1
HOLDSW
DSPSYSCK
DSPPWR
ADASYSCK
XDSPRST
DSPACK
SOT2
SIN2
SCK2
SIPCS
RTCCE
RTCINTR
SUBCLK
BATT
HPJACK
XHSTBY
XRESET
XTALIN
XTAL
COM0
COM3
SEG00
ı
SEG31
ı
X701
4.096MHz
LCD101
LIQUID
CRYSTAL
DISPLAY
PANEL
RESET
IC710
Q707
SW
IC716
REAL-TIME CLOCK
X702
32.768kHz
Q710
SW
IC715
SI/PO DRIVER
DATA
CLOCK
XFLMPWR
MICSENSE LMUTE
XSPPWR
XHPPWR
HPMUTE
XREDLED
XGRNLED
APOWER
ADAPWR
XLIGHT
XBATTEN
IC112
AMP
VIN- VOUT
Q106
LPF
SW
Q107, 108
LPF
SW
Q102
MUTE
Q105
BUFFER
IC110
POWER AMP
STNBY
IN2
IN1
INV
OUT
Q103
SW
D703
OPR
SP101
SPEAKER
J102
EAR
IC504
IC508, Q503
VOLTAGE
DETECTOR
IC507
DECODER
Q504
AVCC
DSPVCC
MICVCC
ADAVCC
ZVCC
SVCC
D701, 702
(BACK LIGHT)
AVCC
RF
AVCC
SOT2
OSCIN
OSCOUT
BEEP
S706, 707
S722
S726
S721, 723 - 725
MAIN BOARD
P-SW BOARD
F-SW BOARD    (2/2)
F-SW BOARD    (1/2)
DRY BATTERY
SIZE"AAA"
(IEC DESIGNATION LR03)
2PCS,3V
RED (REC)
GRN (PB)
RV101
VOL
SLOW       NORMAL      FAST
S702
PLAY SPEED
3.1V
2.9V
2.9V
2.3V
3V
5
5
ICD-B25
9
• Waveforms
1.3Vp-p
1
IC712 
od
 (XTAL)
0.5V/div   50nsec/div
4.096MHz
2
IC716 
8
 (OSCOUT)
0.2V/div   10µsec/div
32.768kHz
0.8Vp-p
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is
printed in each block.)
Common Note on Schematic Diagrams:
• All capacitors are in µF unless otherwise noted.  pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in 
1
 and 
1
/
4
 
W or less unless otherwise
specified.
f
: internal component.
C
: panel designation.
A
: B+ Line.
• Power voltage is dc 3V and fed with regulated dc power
supply from battery terminal.
• Voltages are taken with a VOM (Input impedance 10 M
1
).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
E
: PB
a
: REC
*
 IC109 on main board are not replaceable.
• The voltages and Waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
from that of conventional IC.
Common Note on Printed Wiring Boards:
X
: parts extracted from the component side.
Y
: parts extracted from the conductor side.
f
: internal component.
: Pattern from the side which enables seeing.
Lead layout of conventional IC        CSP (chip size package)
surface
Caution:
Pattern face side:
Parts on the pattern face side seen from
(SIDE B)
the pattern face are indicated.
Parts face side:
Parts on the parts face side seen from
(SIDE A)
the parts face are indicated.
*
 IC109 on main board are not replaceable.
Lead Layouts
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