DOWNLOAD Sony HT-SL5 / STR-KSL5 Service Manual ↓ Size: 9.77 MB | Pages: 37 in PDF or view online for FREE

Model
HT-SL5 STR-KSL5
Pages
37
Size
9.77 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
ht-sl5-str-ksl5.pdf
Date

Sony HT-SL5 / STR-KSL5 Service Manual ▷ View online

21
21
STR-KSL5
3-14. Schematic Diagram  – Power Section –
(CHASSIS)
22
22
STR-KSL5
3-15. IC Block Diagram
38
37
36
23
24
1
2 3
4
5
44
8 9 10
46
17
22
21
20
30
35
25
26
27
28
29
32
33
34
16
45
13
14
15
47
40
41
48
CL
39
XSEL
CE
DI
EMPHA
AUDIO
DISEL
DOUT
DINO
DINI
DIN2
6
DGND
7
DVDD
11
AVDD
12
AGND
DOSEL0
R
VIN
LPF
CKSEL0
XSTATE
18 DGND
19 DVDD
XIN
XOUT
XMCK
DVDD
31
DGND
DO
CSFLAG
F0/P0/C0
F1/P1/C1
F2/P2/C2
VF/P3/C3
AUTO
BPSYNC
ERROR
DATAO
DOSEL1
CKOUT
BCK
LRCK
CKSEL1
MODE0
MODE1
42
DGND
43
DVDD
XMODE
TIMING
MICROCOMPUTER
INTERFACE
SAMPLING
FREQUENCY
C BIT
DETECT
PA/PB
DETECT
LOCK
DETECT
SYSTEM
RESET
MODE
SELECT
INPUT
CIRCUIT
DATA
DEMODULATOR
PLL
CLOCK
– DIGITAL Board –
IC1101  LC89056W-E
VIN3
V-
14
SW2
13
VIN1
12
MUTE1
11
VOUT1
10
NC
9
V+
8
1
SW1
2
AMP
VIN2
3
MUTE2
4
VOUT2
5
GND2
6
GND1
7
AMP
– VIDEO Board –
IC201  NJM2279D
11
KEY2
10
KEY1
9
STB
8
CLK
7
DIN
6
DOUT
5
DSC
4
VIDEO LED
3
DVD LED
2
TV LED
1
33
AUX LED
GRID10
32
GRID11
31
GRID12
30
VEE
29
SEG16
28
SEG15
27
SEG14
26
SEG13
25
SEG12
24
SEG11
23
SEG10
44
12
VSS
VSS
13
VDD
14
SEG1
15
SEG2
16
SEG3
17
SEG4
18
SEG5
19
SEG6
20
SEG7
21
SEG8
22
SEG9
43
VDD
42
GRID1
41
GRID2
40
GRID3
39
GRID4
38
GRID5
37
GRID6
36
GRID7
35
GRID8
34
GRID9
SERIAL
INTERFACE
24-bit
OUTPUT LATCH
DATA SELECTOR
12-bit
SHIFT REGISTER
4-bit
LATCH
DISPLAY MEMORY
24 bits x 12 words
KEY DATA MEMORY
(2 x 16 bits)
TIMING GENERATOR
KEY SCAN
COMMAND DECODER
GRID DIRVER
MULTIPLEXED
DRIVER
DIMMING
CIRCUIT
OSC
OSC
R
SEGMENT DRIVER
– DISPLAY Board –
IC152  
µ
PD16315GB-3BS
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34
FORMAT
CONVERTER
AUDIO
INTERFACE
INPUT
CIRCUIT
OUTPUT
CIRCUIT
LOOP1
LOOP0/SDA/CDTI
DIF1/SCL/CCLK
DIF0/CSN
P/SN
MCLK
DZF1
AVSS
AVDD
VREFH
VCOM
DZF2
RIN+
RIN–
LIN+
LIN–
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
DEM1
DEM0
TVDD
DVDD
DVSS
PDN
ICKS2
ICKS1
ICKS0
CAD1
CAD0
SDOS
I2C
SMUTE
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
DAUX
DFS
IC1501  AK4527
23
STR-KSL5
3-16.  IC Pin Function Descriptions
• IC1201  CXD9617R (AUDIO DSP) (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23-25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
I/O
I
I
I
I
O
I
I/O
I
O
I/O
I/O
I
O
O
I/O
O
O
O
I
I
I
O
I
I
O
I
O
O
O
O
O
O
O
I
I
O
O
Pin Name
VSS
XRST
EXTIN
FS2
VDD1
FS1
PLOCK
VSS
MCLK1
VDD1
VSS
MCLK2
MS
SCKOUT
LRCKI1
VDDE
BCKI1
SDI1
LRCKO
BCKO
VSS
KFSIO
SDO1-SDO3
SDO4
SPDIF
LRCKI2
BCKI2
SDI2
VSS
HACN
HDIN
HCLK
HDOUT
HCS
SDCLK
CLKEN
RAS
VDDI
VSS
CAS
DQM/OE0
CSO
WEO
VDDE
WMD1
VSS
WMD0
PAGE2
VSS
PAGE1
Description
Ground terminal
Rest input from the system control
Not used (Ground)
Not used (Ground)
+2.5V
Not used (Ground)
Internal PLL lock signal output (TP1201)
Ground terminal
Clock pulse input
+2.5V
Ground terminal
Clock pulse input-output
Not used (Ground)
Internal system and clock power output to the CODEC (IC1501)
Not used
+3.3V
Bit clock input-output terminal for audio interface serial data (TP1202)
Data input from the CODEC (IC1501)
Sampling clock output to the CODEC (IC1501)
Bit clock output to the CODEC (IC1501)
Ground terminal
Audio clock (384fs/256fs) input from the DIR (IC1101)
Serial data output to the CODEC (IC1501)
Serial data output terminal (TP1203)
SPDIF power output terminal (TP1204)
Sampling clock input to the DIR (IC1101)
Bit clock input from the DIR (IC1101)
Data input from the DIR (IC1101)
Ground terminal
Acknowledge output to the system control (IC1601)
Serial data input from the system control (IC1601)
Clock input from the system control (IC1601)
Serial data output to the system control (IC1601)
Chip selection input from the system control (IC1601)
SDRAM clock (TP1205)
SDRAM clock enable (TP1206)
Row address strobing (TP1207)
+2.5V
Ground terminal
Column address strobing (TP1208)
Data I/O mask (TP1209)
Chip selection output to the SRAM (IC1202)
Write enable output to the SRAM (IC1202)
+3.3V
Setting for external memory WAIT mode (pull up)
Ground terminal
Setting for external memory WAIT mode (pull up)
ERAM page switch (TP1210)
Ground terminal
ERAM page switch (TP1211)
24
STR-KSL5
Pin No.
53
54
55
56
57
58
59
60
61
62
63
64-66
67-69
70
71
72-75
76
77-80
81
82-85
86
87
88
89
90
91
92-97
98,99
100
101
102-105
106
107,108
109,110
111
112
113
114
115
116
117-119
120
Pin Name
PAGE0
BOOT
BTACT
BST
MOD1
MOD0
EXLOCK
VDDI
VSS
A17
A16
A15-A13
GP10-GP8
VDDI
VSS
D15-D12
VDDE
D11-D8
VSS
A9-A10
TDO
TMS
XTRST
TCK
TDI
VSS
A8-A3
D7,D6
VDDI
VSS
D5-D2
VDDE
D1,D0
A2,A1
VSS
A0
PM
SD13
SD14
SYNC
VSS
VDDI
I/O
O
I
O
I
I
I
I
O
O
O
I/O
I/O
I/O
O
O
I
I
I
I
O
I/O
I/O
I/O
O
O
I
I
I
I
Description
ERAM page switch (TP1212)
Not used (Ground)
Boot mode status display signal (TP1213)
Boot strap signal input from the system control (IC1601)
Setting for 256fs (pllx9) (pull up)
Setting for single chip mode (pull down)
Lock signal input terminal
+2.5V
Ground terminal
External memory address (TP1214)
External memory address (TP1215)
Address signal output to the SRAM (IC1202)
External memory data I/O general purpose port terminal GP
+2.5V
Ground terminal
SRAM (IC1202) data signal I/O terminal
+3.3V
SRAM (IC1202) data signal I/O terminal
Ground terminal
Address signal output to the SRAM (IC1202)
Simple emulation data output (TP1216)
Simple emulation data entry beginning and the end terminal (TP1217)
Asynchronous simple BREAK input terminal of emulation (TP1218)
Simple emulation clock input (TP1219)
Simple emulation data entry (TP1220)
Ground terminal
Address signal output to the SRAM (IC1202)
SRAM (IC1202) data signal I/O terminal
+2.5V
Ground terminal
SRAM (IC1202) data signal I/O terminal
+3.3V
SRAM (IC1202) data signal I/O terminal
Address signal output to the SRAM (IC1202)
Ground terminal
Address signal output to the SRAM (IC1202)
PLL initialization input from the system control (IC1601)
Data entry terminal (TP1221)
Data entry terminal (TP1222)
Synchronization / asynchronous selection terminal (L:Sync. H:Async.)
Ground terminal
+2.5V
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