Sony HT-SL40 / STR-KSL40 / STR-SL40 Service Manual ▷ View online
STR-KSL40/SL40
5
• DSP Test Mode Items
Items
SWAP
DSP Version
DSP communication
Bass Management
Main Speaker cut off Freq.
LFE cut off Freq.
Co-ef. Read Address
Co-ef. Read Data
Co-ef. Write Address
Co-ef. Write Data
SRAM
Total operation time
Longest Power ON time
Output time less than
–50dB volume
Output time less than
–40dB volume
Output time less than
–30dB volume
Output time less than
–20dB volume
Output time less than
–10dB volume
Output time less than
0dB volume
Protector count value
Fuse open count value
EEPROM CONDITION
EEPROM READ
EEPROM Super Reset
DSP HALT MODE
Remark
Selection of setting
output channels
Checking communication
between DSP and microcom
between DSP and microcom
Checking communication
between DSP and SRAM
between DSP and SRAM
Four large charactors are
hour. Two small charactors
are minutes.
0 to 255
Description
Normal channel output
Left input
t Front Left, Surround Left, Center channel output
Right input
t Front Right, Surround Right, Sub Woofer channel output
Left input
t Center channel output
Right input
t Sub Woofer channel output
Left input
t Surround Left channel output
Right input
t Surround Right channel output
“DSPV XXX” is displayed. Three large charactors are the DSP version
that is being used.
that is being used.
When this item is selected the message will be displayed “ OK ” if the
checking is correct. “ ERROR ” will be displayed in a case of an error.
checking is correct. “ ERROR ” will be displayed in a case of an error.
“SUR-NORM” is displayed.
“EQ-NORM” is displayed.
“DLY-NORM” is displayed.
“BM-NORM” is displayed.
Not used for service “BM. AUTO” is displayed.
Not used for service “MAIN 120 Hz” is displayed.
Not used for service “LFE 120 Hz” is displayed.
Not used for service “RA. XXXXX” is displayed.
Not used for service “RD. XXXXXX xx” is displayed.
Not used for service “WA. XXXXX” is displayed.
Not used for service “WD. XXXXXX xx” is displayed.
“ RAMC. OFF ” will be displayed in a case of no checking.
By pressing Cursor button the checking starts.
“ RAMC. PASS ” will be displayed if the checking is good.
“ RAMC. NG ” will be displayed if an error occurs.
“ RAMC. NG ” will be displayed if an error occurs.
“TTL-XXXX xx” is displayed.
“LNG-XXXX xx” is displayed.
“V50-XXXX xx” is displayed.
“V40-XXXX xx” is displayed.
“V30-XXXX xx” is displayed.
“V20-XXXX xx” is displayed.
“V10-XXXX xx” is displayed.
“V00-XXXX xx” is displayed.
“PROT XXX” is displayed.
“FUSE XXX” is displayed.
“E- XXXX” is displayed.
S RST
t Super Reset : first time use EEPROM or test pattern
corrupted
FAIL
t EEPROM read / write with microcom has problem
V CHG
t Software version change
D CHG
t Destination / model change
CLEAR
t Back up data initialize
NORM
t Normal AC on
“E- XXX-XX” is displayed.
First four hex code is EEPROM address (controlled by +/– button).
Last two hex code is EEPROM data.
“S.RST- XXX” is displayed.
When YES is selected, press Cursor button to clear all EEPROM data
“HALT NO” or “HALT YES” is displayed.
Function
NORM
ALL
C SW
SLSR
–
–
–
–
–
–
–
–
–
–
–
–
–
OFF
ON
–
–
–
–
–
–
–
–
–
–
–
–
–
–
6
STR-KSL40/SL40
3-1. IC Pin Function Descriptions
• IC1201 CXD9617R (AUDIO DSP) (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23 to 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
I/O
—
I
I
I
—
I
O
—
I
—
—
O
I
O
I
—
I
I
O
O
—
I
O
O
O
I
I
I
—
O
I
I
O
I
O
O
O
—
—
O
O
O
O
—
I
—
I
O
—
O
Pin Name
VSS
XRST
EXTIN
FS2
VDD1
FS1
PLOCK
VSS
MCLK1
VDD1
VSS
MCLK2
MS
SCKOUT
LRCKI1
VDDE
BCKI1
SDI1
LRCKO
BCKO
VSS
KFSIO
SDO1 to SDO3
SDO4
SPDIF
LRCKI2
BCKI2
SDI2
VSS
HACN
HDIN
HCLK
HDOUT
HCS
SDCLK
CLKEN
RAS
VDDI
VSS
CAS
DQM/OE0
CSO
WEO
VDDE
WMD1
VSS
WMD0
PAGE2
VSS
PAGE1
Description
Ground terminal
Rest input from the system control
Not used (connected to ground)
Not used (connected to ground)
Power supply (+2.5V)
Not used (connected to ground)
Not used (open)
Ground terminal
Clock input (13.5MHz)
Power supply (+2.5V)
Ground terminal
Clock output (13.5MHz)
Not used (connected to ground)
Internal system clock output to AK4527B
Not used (open)
Power supply (+3.3V)
Not used (open)
Serial data input from AK4527B
Sampling clock output to AK4527B
Bit clock output to AK4527B
Ground
Audio clock (384fs/256fs) input from LC89056W
Serial data output to AK4527B
Not used (open)
Not used (open)
Sampling clock input from LC89056W
Bit clock input from LC89056W
Serial data input from LC89056W
Ground
Acknowledge output to MB90478
Serial data input from MB90478
Clock input from MB90478
Serial data output to MB90478
Chip selection input from MB90478
Not used (open)
Not used (open)
Not used (open)
Power supply (+2.5V)
Ground
Not used (open)
Not used (open)
Chip selection output to the SRAM
Write enable output to the SRAM
Power supply (+3.3V)
Not used (connected to ground)
Ground
Not used (connected to VDD)
Not used (open)
Ground
Not used (open)
SECTION 3
DIAGRAMS
7
STR-KSL40/SL40
Pin No.
53
54
55
56
57
58
59
60
61
62
63
64 to 66
67 to 69
70
71
72 to 75
76
77 to 80
81
82 to 85
86
87
88
89
90
91
92 to 97
98,99
100
101
102 to 105
106
107,108
109,110
111
112
113
114
115
116
117 to 119
120
Pin Name
PAGE0
BOOT
BTACT
BST
MOD1
MOD0
EXLOCK
VDDI
VSS
A17
A16
A15 to A13
GP10 to GP8
VDDI
VSS
D15/GP7 to D12/GP4
VDDE
D11/GP3 to D8/GP8
VSS
A9 to A10
TDO
TMS
XTRST
TCK
TDI
VSS
A8 to A3
D7,D6
VDDI
VSS
D5 to D2
VDDE
D1,D0
A2,A1
VSS
A0
PM
SD13
SD14
SYNC
VSS
VDDI
I/O
O
I
O
I
I
I
I
—
—
O
O
O
I/O
—
—
I/O
—
I/O
—
O
O
I
I
I
I
—
O
I/O
—
—
I/O
—
I/O
O
—
O
I
I
I
I
—
—
Description
Not used (open)
Not used (connected to ground)
Not used (open)
Boot strap signal input from MB90478
Mode input (connected to VDD)
Mode input (connected to ground)
Lock signal input to LC89056W
Power supply (+2.5V)
Ground
Not used (open)
Not used (open)
Address bus output to the SRAM
External memory data I/O general purpose port terminal GP
Power supply (+2.5V)
Ground
SRAM data bus
Power supply (+3.3V)
SRAM data bus
Ground
Address bus output to the SRAM
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Not used (open)
Ground
Address bus output to the SRAM
SRAM data bus
Power supply (+2.5V)
Ground
SRAM data bus
Power supply (+3.3V)
SRAM data bus
Address bus output to the SRAM
Ground
Address bus output to the SRAM
PLL initialization input from MB90478
Not used (open)
Not used (open)
Synchronization / asynchronous selection input (pull up)
Ground
Power supply (+2.5V)
8
STR-KSL40/SL40
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
I
I
O
O
I
O
O
O
O
O
—
O
O
O
O
O
O
I
O
O
O
O
—
O
I
O
I
I
O
I
I
I
O
I/O
—
I
—
I
I
I
I
—
I
I
I
I
I
I
I
I
Pin Name
DATA O
GP9
BST
HCS
HACN
XRST
PM
PD
SMUTE
CDT1
VSS
SCL
CS
DATA
CLK
LATCH
WOOFER RELAY
HDOUT
HDIN
HCLK
F.MUTE
VIDEO-SW1
VCC5
ANA/DIG
NOT IN USE
VIDEO SW2
FLASH2
FLASH1
VIDEO-MUTE
NC
NC
NC
SCL
SDA
AVCC
AVRH
AVSS
A/D0
A/D1
A/D2
A/D3
VSS
RDS SIGNAL
MODEL
VERSION
NC
CRYSTAL SEL
STOP
MD0
MD1
Description
Serial data input from LC89056W
External memory data input from CXD9617R
Boot strap signal output to CXD9617R
Chip selection signal output to CXD9617R
Acknowledge signal input from CXD9617R
Reset signal output to CXD9617R
PLL initialization signal output to CXD9617R
PD signal output to AK4527B
Smute signal output to AK4527B
CDT1 signal output to AK4527B
Ground
Serial clock signal output to AK4527B
Chip selection signal output to AK4527B
Serial control data output to the tuner and M61527FP
Serial control clock output to the tuner and M61527FP
Latch signal to M61527FP
Sub woofer relay control signal output
Serial data input from CXD9617R
Serial data output to CXD9617R
Clock signal output to CXD9617R
Function mute signal output
Video switch signal output to the NJM2279
Power supply (+3.3V (STBY))
Function mute and error port signal output
Not used (pull down)
Video switch signal output to NJM2279
Flash programming input
Flash programming input
Video mute signal output to NJM2279
Not used (pull down)
Not used (pull down)
Not used (pull down)
SCL signal output to the EEPROM
SDA signal from the EEPROM
Power supply (+3.3V(STBY))
A Vref input (connected to +3.3 (STBY))
Ground
Not used (pull down)
Key signal input
Key signal input
Key signal input
Ground
RDS signal input to tuner
Model detection input
Version resisrtor input
Not used (pull down)
Not used (pull down)
AC off signal input
Flash programming MD0 input
Not used (connected to +3.3V(STBY))
• IC1601MB90478PF-G-139-BND (SYSTEM CONTROL) (DIGITAL BOARD)
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