Sony HT-SF2300 / HT-SS2300 / STR-KS2300 Service Manual ▷ View online
STR-KS2300
STR-KS2300
10
10
BUFFER
IC1600
EEPROM
IC1131
SYSTEM CONTROLLER
IC1018 (1/4)
DIGITAL OPTICAL
RECEIVER
IC1700
22
DA
TA
23
CLK
VIDEO1 L
7
TV L
1
SACD L
L CH
R CH
DO
DI
3
TUNER L
5
LIN
1
DIR D0
DIR D1
DIR_CLK
DIR_CE(LA
T)
DIR ERROR
DIR_XMODE (RESET)
DIR XST
ATE
DIR DA
TA0
63
ADC RESET
73
BD3842_CLK
10
BD3842_DA
11
27
PDWN_BAR
7
DATA0, BCK
LRCK, CKOUT
DOUT
15
SCKI
12
BCK 11
LRCK 10
OUT L 14
DO 35
DI 36
CLK 38
CE 37
ERROR 34
XMODE 48
XSTATE
DIR_DO
DIR_DATA0
DIR_CKSEL1
DIR_DI
DIR_CLK
DIR_HCE
ERR
DIR_XMODE
DIR_XSTAE
DIR_DO
DIR_DA
TA0
DIR_DI
DIR_CLK
DIR_HCE
ERR
DIR_CKSEL1
DIR_XMODE
DIR_XST
AE
17
XMCK 20
DATA0 16
BCK 14
LRCK 15
CKOUT
DATA0
BCK
LRCK
CKOUT
13
AUDIO 24
CKSEL 0 46
TV
OPT IN
DIGITAL OPTICAL
RECEIVER
IC1701
OPT IN
VIDEO 2
SCHMITT
TRIGGER
IC1711
DIGITAL AUDIO
INTERFACE RECEIVER
IC1301
DIN1
J1700
4
COAX IN
DVD
FM 75
Ω
COAXIAL
72
69
26
69
26
DIGITAL
VIDEO 1
AUDIO IN
TV
AUDIO IN
ANTENNA
J1710
TUNER (FM/AM)
SA-CD/CD
AUDIO IN
AM
L
R
L
R
L
R
R-CH
CLINK L
9
C_LINK_L
C_LINK_R
14
13
CN1700 (1/2)
R-CH
CLINK_RX (UCOM_TX)
CLINK_TX (UCOM_RX)
6
5
CN1700 (2/2)
R-CH
R-CH
ANALOG AUDIO
INPUT SELECTOR
IC1710
A/D CONVERTER
IC1602
R-CH
21
22
X1301
12.288MHz
XOUT
XIN
FM ANT
GND
AM ANT
GND
CLOCK
CE
TUN_DO
TUNER DATA
TUNER CLK
TUN_LAT
TUNER DATA
TUNER CLK
TUN_LAT
BUFFER
IC1603
86
84
84
RDS DATA
RDS INT
RDS DATA
RDS CLK
RDS CLK
117
SD
TUNE SD
100 CLINK_RX (M-OUT-CLINK-IN)
99 CLINK_TX (M-IN-CLINK-OUT)
C_LINK_DEC
7
101 C_LINK_DET
DIR_CK_SEL
39
D1301
57
58
12.5MHz
12.5MHz
98
EEPROM DA
TA
78
EEPROM CLK
X1300
12.5MHz
A
• SIGNAL PATH
: TUNER
: AUDIO (ANALOG)
: AUDIO (DIGITAL)
• R-ch is omitted due to same as L-ch.
DATA SELECTOR
IC1302
1C1
5
1C0
6
DIN0
3
1Y 7
2
B
14
A
TC74HC153_A
36
TC74HC135_B
35
SDIN
8
AUTO
CAL MIC
J2800
DCAC_MIC_L
11
MIC AMP
IC2800
DCAC ON/OFF
3
CEC DATA
SWITCH
Q1103 – 1106
92
HDMI (M-IN-HDMI-OUT)
HDMI (M-OUT-HDMI-IN) 93
HDMI (M-OUT-HDMI-IN) 93
HDMI RESET
TX
RX
RESET
104
29
CEC OUT
CEC IN 88
AUDIO
B
DIR_XSTAE, ERR
C
CEC
D
48 47 45 46
49
38 37
RESET, TX, RX
E
: MIC
DIN2
5
J
SPDIF
R-CH
DMPORT
DMPORT
MUTING ON/OFF
CONTROL
Q2800 – 2802
ERR
DIR_XSTAE
(AEP, UK)
SECTION 6
DIAGRAMS
6-1. BLOCK DIAGRAM - MAIN Section -
(Page 11)
(Page 12)
(Page 12)
(Page 12)
(Page 11)
(Page 11)
STR-KS2300
STR-KS2300
11
11
• SIGNAL PATH
: AUDIO (DIGITAL)
: HDMI
HDMI CONTROLLER
IC3519
CN3501
HDMI
SAT IN
A32
52
B32
51
7
9
9
A33
55
B33
54
4
6
6
A34
58
B34
57
1
3
3
A31
49
B31
48
10
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
15
HDMI
INPUT
SELECTOR
IC3503
55
P5V_SELA
56
P5V_SELB
SDA3
45
19
HPD3
44
SCL3
46
CN3502
HDMI
DVD IN
A22
71
B22
70
7
9
9
A23
74
B23
73
4
6
6
A24
77
B24
76
1
3
3
A21
68
B21
67
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
15
SDA2
63
19
HPD2
62
SCL2
64
CN3503
HDMI
VIDEO 2/
BD IN
A12
9
B12
8
7
9
9
A13
12
B13
11
4
6
6
A14
15
B14
14
1
3
3
A11
6
B11
5
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
15
SDA1
2
19
HPD1
80
SCL1
3
RX_HPD1
HDMI RECEIVER
IC3511
HDMI
TRANSCEIVER
IC3513
Y1 34
Z1 35
51
50
50
Y2 31
Z2 32
55
54
54
Y3 28
Z3 29
59
58
58
Y4 25
Z4 26
63
RXC+
RXC–
RXC–
RX0+
RX0–
RX0–
RX1+
RX1–
RX1–
RX2+
RX2–
RX2–
DSDA
DSCL
DSCL
62
41
PWR5V
44
42
CSDA
CSCL
CSCL
39
40
40
SCL_SINK 38
HPD_SINK 40
xOE 42
SDA_SINK 39
S1 21
S2 22
S3 23
S2 22
S3 23
LEVEL
SHIFT
IC3501
(1/2)
LEVEL SHIFT
IC3507
S [1]
S [2]
S [3]
S [2]
S [3]
SIGNAL SELECTOR
IC3504
2Y2
2
2Y3
4
2Y1
5
3
2-COM
10 9
A B
21
51 52 53
S [1]
S [2]
S [3]
TMDS_S1
TMDS_S2
TMDS_S3
DATA SELECTOR
IC3521
EEPROM
IC3509
2Y1
5
2Y0
1
1Y1
14
1Y0
12
3
2-COM
13
1-COM
5 SDA
6 SCL
EEPROM1
10
A
7
WP
35
TMDS_OEB
54
RX_RST
19
MUTE
65
RX_INT
20
TX_INT
43
TX_RST
42
CSCL
27
CSDA
28
124 – 121,1
17 – 1
14,
11
1 – 108, 105 – 99,
96 – 92
QE0 – QE23
79 – 75, 70 – 67
65 – 61, 58 – 49
D0 – D23
ODCK 119
HSYNC 128
VSYNC 1
DE 127
SPDIF 70
SD0 – SD3
4
24
MCK 79
SCK 76
WS 75
MUTE 67
RESET 89
INT 91
IDCK
66
HSYNC
1
VSYNC
2
DE
80
74 – 71
SPDIF
5
SD0 – SD3
MCK
6
SCK
12
WS
11
10 – 7
TX0+ 30
TX0– 29
TX0– 29
7
9
9
TX1+ 33
TX1– 32
TX1– 32
4
6
6
TX2+ 36
TX2– 35
TX2– 35
1
3
3
TXC+ 27
TXC– 26
TXC– 26
10
HPD
DATA0+
DATA0–
DATA0–
DATA1+
DATA1–
DATA1–
DATA2+
DATA2–
DATA2–
CLOCK+
CLOCK–
CLOCK–
SDA (5V)
SCL (5V)
SCL (5V)
HOT PLUG DET
CEC
18
19
12
16
15
15
13
DSDA 19
DSCL 20
INT 17
RESET 42
CSDA 44
CSCL 43
LEVEL
SHIFT
IC3501 (2/2)
LEVEL
SHIFT
Q3504
CN3504
HDMI
OUT
SPDIF
LRCK
MCK
BCK
SD0 – SD3
85
84
XTALIN
XTALOUT
X3501
28.322MHz
10
RESET
RESET, TX, RX
D
13
11
XIN
XOUT
X3502
10MHz
SWITCH
Q3505 – 3507
F
G
E
33
TX
34
RX
CEC
MUTE
SD0 – 3, MCK,
BCK, LRCK
J
41
TX_5VPWR
K
5VPWR
6-2. BLOCK DIAGRAM - HDMI Section -
(Page 10)
(Page 12)
(Page 10)
(Page 12)
(Page 10)
(Page 14)
STR-KS2300
STR-KS2300
12
12
A
DATA0, BCK
LRCK CKOUT
G
MUTE
LRCK
DATA0
SD1
INPUT SELECTOR
IC1008
2 A0
3 B0
CKOUT
5 A1
6 B1
SDO
BCK
SD2
SD3
11 A2
LRCK
BCK
10 B2
MCK
13 B3
Y0 4
Y1 7
Y2 9
S
1
1
Y3 12
INPUT SELECTOR
IC1900
3 0B
6 1B
10 2B
14
13
14 A3
• SIGNAL PATH
F
3B
3A
0Y 4
1Y 7
2Y 9
S
1
1
3Y 12
DATA SELECTOR
IC1017
1 A
2 B
Y 5
A/B
6
MUTING
Q1900
C
DIR_XSTAE, ERR
HDMI_ERR
30
HDMI SELECT
22
SYSTEM CONTROLLER
IC1018 (2/4)
D FLIP-FLOP
IC1014
INVERTER
IC1010
78 DPSIA
79 DPSIB
88 DPLRCK
INVERTER
IC1016
RSRA
TE
50
94 DPFSCK
89 DPBCK
16 FLOG1
82 DPSIE
81 DPSID
80 DPSIC
DSP
SPDIF(LA
T)
64
DSP
RESET
65
DSP
INT
83
XSPIDS
XRESET
FLOG2
DSP
IC1009
DPSOA 64
SWITCHING
IC3951
1
2
5
3
7
6
MUTING
Q3950
DPDVLRCK 86
DPDVBCK 87
DPSOB 65
DPSOC 70
SWITCH
IC3950
BCKO
BCKO
MCKO
D1 – 3, MCKO,
BCKO, LRCKO
BCKO, LRCKO
H
D1
D2
D3
FLASH MEMORY
IC1903
DSP
SPI CLK
91
DSP
MOSI
90
DSP
MISO
89
SF DSP
MAS
67
SF CPU CE
66
DSP_SPI_CLK
DSP_MISO
DSP_MOSI
SPI_MAS
CPU_CE
SPICLK 125
MOSI 127
XSF_CE 98
SPI_MAS 63
MISO 126
DSP_SPI_CLK
DSP_MISO
DSP_MOSI
SPI_MAS
CPU_CE
SWITCHING
IC1003
1 CE
6 SCK
5 SI
5 SI
2 SO
: AUDIO (DIGITAL)
143
142
X1302
25MHz
XTAL
CLKIN
SD0 – 3, MCK,
BCK, LRCK
97 XNONAUDIO
B
AUDIO
DIR_XSTAE
ERR
RESET SIGNAL
BUFFER
IC1005
62
RST TRI
55
INIT
RESET SIGNAL
GENERATOR
IC1007
RESET
SWITCH
IC1006
STBY +3.3V
FLIP-FLOP
IC1004
122 121 15
6-3. BLOCK DIAGRAM - DSP Section -
(Page 10)
(Page 11)
(Page 10)
(Page 11)
(Page 10)
(Page 13)
STR-KS2300
STR-KS2300
13
13
+
H
D1 – 3, MCKO
BCKO, LRCKO
BCKO, LRCKO
L
SD
BCKO
D1
D2
DIGITAL POWER AMP
IC3150
STREAM PROCESSOR
IC3010
31 DATA
OVER LOAD
DETECT
Q3151, 3152
SYSTEM CONTROLLER
IC1018 (3/4)
30 BCK
LRCKO
29 LRCK
36 XFSIIN
21 SCDT
21 SCDT
SCDT
MCKO
BCKO
LRCKO
MCKO
D3
BCKO
LRCKO
MCKO
22 SCSHIFT
SHIFT
23 SCLATCH
LAT1
27 INIT
INIT
24 OVF FLAGR
25 OVF FLAGL
25 OVF FLAGL
OVF FLAGL
OVF FLAGL
OVFW
X3051
49.1MHz
L.P.F.
L.P.F.
OVF1
19 SOFT MUTE
SOFT_MUTE
19 SOFT MUTE
SOFT_MUTE
19 SOFT MUTE
SOFT_MUTE
OUTL1(+) 11
OUTL2(–) 9
OUTR1(+) 6
OUTR2(–) 4
XFSOIN 48
FSOCKO 37
XFSOOUT 14
FSOI 38
STREAM PROCESSOR
IC3020
31 DATA
30 BCK
29 LRCK
36 XFSIIN
21 SCDT
21 SCDT
SCDT
22 SCSHIFT
SHIFT
23 SCLATCH
LAT2
27 INIT
INIT
24 OVF FLAGR
25
25
OUTL1(+) 11
OUTL2(–) 9
OUTR1(+) 6
OUTR2(–) 4
XFSOIN 48
XFSOOUT 14
FSOI 38
STREAM PROCESSOR
IC3030
31 DATA
30 BCK
29 LRCK
36 XFSIIN
21 SCDT
21 SCDT
SCDT
22 SCSHIFT
SHIFT
23 SCLATCH
LAT3
27 INIT
INIT
24 OVF FLAGR
SCDT
SHIFT
LAT1
LAT2
LAT3
LAT2
LAT3
INIT
25
OUTR1(+) 6
OUTR2(–) 4
OUTL1(+) 11
OUTL2(–) 9
XFSOIN 48
FSOI 38
CLOCK
BUFFER
IC3051
FRONT L
+
_
_
_
_
_
DIGITAL POWER AMP
IC3100
OVER LOAD
DETECT
Q3101, 3102
L.P.F.
L.P.F.
FRONT R
+
TB3002
TB3001
+
_
OVER LOAD
DETECT
Q3201, 3102
OVER LOAD
DETECT
Q3301, 3302
OVER LOAD
DETECT
Q3251, 3252
L.P.F.
L.P.F.
SUR L
SPEAKERS
SUR R
SUBWOOFER
+
DIGITAL POWER AMP
IC3200
OVER LOAD
DETECT
Q3401, 3402
L.P.F.
L.P.F.
CENTER
+
DIGITAL POWER AMP
IC3300
L.P.F.
L.P.F.
DIGITAL POWER AMP
IC3250
/SD
DIGITAL POWER AMP
IC3500
PWM_B
OUT_B
14
PWM_A
6
4
/RESET
5
/SD
PWM_B
OUT_B
OUT_A
14
PWM_A
6
4
/RESET
5
DC DETECT
Q3551
SCDT 13
SHIFT 2
LAT1
LAT2
LAT3
LAT2
LAT3
5
6
7
6
7
INT 14
OVF1
OVF 17
OVFW
OVFW 20
SOFT_MUTE
SOFT_MUTE 1
POWER SD 12
DC_DET 24
POWER_RESET 4
DIGITAL POWER AMP
IC3400
L.P.F.
L.P.F.
L.P.F.
/SD
PWM_B
OUT_B
OUT_A
6 PWM_A
14
4
/RESET
5
/SD
PWM_BP
OUT_B
OUT_A
14
PWM_AP
6
4
/RESET
5
/SD
PWM_B
OUT_B
OUT_A
6 PWM_A
14
4
/RESET
5
/SD
PWM_B
OUT_B
OUT_A
14
PWM_A
6
4
/RESET
5
/SD
PWM_A
OUT_B
OUT_A
6
PWM_B
14
4
/RESET
5
• SIGNAL PATH
: AUDIO (ANALOG)
OUT_A
L.P.F.
OVER LOAD
DETECT
Q3451, 3452
PROTECT DETECT
Q3552 – 3554
+31.5V
28 – 30
: AUDIO (DIGITAL)
28 – 30
28 – 30
28 – 30
28 – 30
28 – 30
28 – 30
25 – 27
25 – 27
25 – 27
25 – 27
25 – 27
25 – 27
25 – 27
6-4. BLOCK DIAGRAM - AMP Section -
(Page 12)
(Page 14)
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