Sony HT-CT150 / HT-CT350 / SA-WCT150 / SA-WCT350 Service Manual ▷ View online
SA-WCT150/WCT350
45
Pin No.
Pin Name
I/O
Description
88 to 96
Q8 to Q0
O
Digital video signal output to the HDMI transmitter
97
CVCC12
-
Power supply terminal (+1.2V)
98
IOVCC33
-
Power supply terminal (+3.3V)
99
WS/DR0
O
Word select signal and DSD serial right channel-0 data output to the HDMI transmitter
L/R sampling clock signal output to the digital audio interface receiver
L/R sampling clock signal output to the digital audio interface receiver
100
SCK/DCLK
O
Serial clock signal and data clock signal output to the HDMI transmitter
Bit clock signal output to the digital audio interface receiver
Bit clock signal output to the digital audio interface receiver
101
SD0/DL0
O
Serial data and DSD serial left channel-0 data output to the HDMI transmitter
Digital audio signal output to the digital audio interface receiver
Digital audio signal output to the digital audio interface receiver
102
SD1/DR1
O
Serial data and DSD serial right channel-1 data output to the HDMI transmitter
Digital audio signal output to the digital audio interface receiver
Digital audio signal output to the digital audio interface receiver
103
SD2/DL1
O
Serial data and DSD serial left channel-1 data output to the HDMI transmitter
Digital audio signal output to the digital audio interface receiver
Digital audio signal output to the digital audio interface receiver
104
SD3/DR2
O
Serial data and DSD serial right channel-2 data output to the HDMI transmitter
Digital audio signal output to the digital audio interface receiver
Digital audio signal output to the digital audio interface receiver
105
MCLK
O
Audio master clock signal output to the HDMI transmitter and digital audio interface receiver
106
SPDIF/DL2
O
S/PDIF audio signal and DSD serial left channel-2 data output to the HDMI transmitter
S/PDIF audio signal output to the digital audio interface receiver
S/PDIF audio signal output to the digital audio interface receiver
107
MUTEOUT
O
Audio muting request signal output terminal Not used
108
AVCC33
-
Power supply terminal (+3.3V)
109
R0XC–
I
TMDS clock (negative) signal input terminal Not used
110
R0XC+
I
TMDS clock (positive) signal input terminal Not used
111
R0X0–
I
TMDS data (negative) input terminal Not used
112
R0X0+
I
TMDS data (positive) input terminal Not used
113
R0X1–
I
TMDS data (negative) input terminal Not used
114
R0X1+
I
TMDS data (positive) input terminal Not used
115
R0X2–
I
TMDS data (negative) input terminal Not used
116
R0X2+
I
TMDS data (positive) input terminal Not used
117
AVCC12
-
Power supply terminal (+1.2V)
118
R1XC–
I
TMDS clock (negative) signal input from the HDMI DVD IN connector
119
R1XC+
I
TMDS clock (positive) signal input from the HDMI DVD IN connector
120
R1X0–
I
TMDS data (negative) input from the HDMI DVD IN connector
121
R1X0+
I
TMDS data (positive) input from the HDMI DVD IN connector
122
R1X1–
I
TMDS data (negative) input from the HDMI DVD IN connector
123
R1X1+
I
TMDS data (positive) input from the HDMI DVD IN connector
124
R1X2–
I
TMDS data (negative) input from the HDMI DVD IN connector
125
R1X2+
I
TMDS data (positive) input from the HDMI DVD IN connector
126
AVCC33
-
Power supply terminal (+3.3V)
127
R2XC–
I
TMDS clock (negative) signal input from the HDMI BD IN connector
128
R2XC+
I
TMDS clock (positive) signal input from the HDMI BD IN connector
129
R2X0–
I
TMDS data (negative) input from the HDMI BD IN connector
130
R2X0+
I
TMDS data (positive) input from the HDMI BD IN connector
131
R2X1–
I
TMDS data (negative) input from the HDMI BD IN connector
132
R2X1+
I
TMDS data (positive) input from the HDMI BD IN connector
133
R2X2–
I
TMDS data (negative) input from the HDMI BD IN connector
134
R2X2+
I
TMDS data (positive) input from the HDMI BD IN connector
135
AVCC12
-
Power supply terminal (+1.2V)
136
R3XC–
I
TMDS clock (negative) signal input from the HDMI SAT/CATV IN connector
137
R3XC+
I
TMDS clock (positive) signal input from the HDMI SAT/CATV IN connector
138
R3X0–
I
TMDS data (negative) input from the HDMI SAT/CATV IN connector
139
R3X0+
I
TMDS data (positive) input from the HDMI SAT/CATV IN connector
140
R3X1–
I
TMDS data (negative) input from the HDMI SAT/CATV IN connector
141
R3X1+
I
TMDS data (positive) input from the HDMI SAT/CATV IN connector
142
R3X2–
I
TMDS data (negative) input from the HDMI SAT/CATV IN connector
143
R3X2+
I
TMDS data (positive) input from the HDMI SAT/CATV IN connector
144
AVCC33
-
Power supply terminal (+3.3V)
SA-WCT150/WCT350
46
HDMI BOARD IC3501 SII9134CTU (HDMI TRANSMITTER)
Pin No.
Pin Name
I/O
Description
1
DE
I
Data enable signal input from the HDMI receiver
2
HSYNC
I
Horizontal sync signal input from the HDMI receiver
3
VSYNC
I
Vertical sync signal input from the HDMI receiver
4
SPDIF
I
S/PDIF audio signal input from the HDMI receiver
5
MCLK
I
Audio master clock signal input from the HDMI receiver
6 to 9
SD3 to SD0
I
Serial data input from the HDMI receiver
10
WS
I
Word select signal input from the HDMI receiver
11
SCK
I
Serial clock signal input from the HDMI receiver
12
CVCC18
-
Power supply terminal (+1.8V)
13
GND
-
Ground terminal
14
IOVCC33
-
Power supply terminal (+3.3V)
15
DCLK
I
Data clock signal input from the HDMI receiver
16
DR0
I
DSD serial right channel-0 data input from the HDMI receiver
17
DL0
I
DSD serial left channel-0 data input from the HDMI receiver
18
DR1
I
DSD serial right channel-1 data input from the HDMI receiver
19
DL1
I
DSD serial left channel-1 data input from the HDMI receiver
20
DR2
I
DSD serial right channel-2 data input from the HDMI receiver
21
DL2
I
DSD serial left channel-2 data input from the HDMI receiver
22
DR3
I
DSD serial right channel-3 data input terminal Not used
23
DL3
I
DSD serial left channel-3 data input terminal Not used
24
INT
O
Interrupt signal output to the HDMI controller
25
RESET#
I
Reset signal input from the HDMI controller “L”: reset
26
AGND
-
Ground terminal
27
EXT_SWG
-
Not used
28
PVCC1
-
Power supply terminal (+1.8V)
29
AGND
-
Ground terminal
30
TXC–
O
TMDS clock (negative) output to the HDMI TV OUT ARC connector
31
TXC+
O
TMDS clock (positive) output to the HDMI TV OUT ARC connector
32
AVCC18
-
Power supply terminal (+1.8V)
33
TX0–
O
TMDS data (negative) output to the HDMI TV OUT ARC connector
34
TX0+
O
TMDS data (positive) output to the HDMI TV OUT ARC connector
35
AGND
-
Ground terminal
36
TX1–
O
TMDS data (negative) output to the HDMI TV OUT ARC connector
37
TX1+
O
TMDS data (positive) output to the HDMI TV OUT ARC connector
38
AVCC18
-
Power supply terminal (+1.8V)
39
TX2–
O
TMDS data (negative) output to the HDMI TV OUT ARC connector
40
TX2+
O
TMDS data (positive) output to the HDMI TV OUT ARC connector
41
AGND
-
Ground terminal
42
PVCC2
-
Power supply terminal (+1.8V)
43
AGND
-
Ground terminal
44
AVCC33
-
Power supply terminal (+3.3V)
45
DCCPWR5V
I
Power supply voltage (+5V) input terminal
46
DSCL
O
I2C clock signal output to the HDMI TV OUT ARC connector
47
DSDA
I/O
Two-way I2C data bus with the HDMI TV OUT ARC connector
48
CSCL
I
I2C clock signal input from the HDMI controller
49
CSDA
I/O
Two-way I2C data bus with the HDMI controller and HDMI receiver
50
CI2CA
-
Not used
51
HPD
I
Hot plug detection signal input from the HDMI TV OUT ARC connector
52
TMODE
-
Not used
53
IOVCC33
-
Power supply terminal (+3.3V)
54
GND
-
Ground terminal
55
VPP18
-
Power supply terminal (+1.8V)
56 to 63
D35 to D28
I
Digital video signal input from the HDMI receiver
64
CVCC18
-
Power supply terminal (+1.8V)
65
GND
-
Ground terminal
66
IOVCC33
-
Power supply terminal (+3.3V)
67 to 75
D27 to D19
I
Digital video signal input from the HDMI receiver
76
CVCC18
-
Power supply terminal (+1.8V)
SA-WCT150/WCT350
47
Pin No.
Pin Name
I/O
Description
77 to 86
D18 to D9
I
Digital video signal input from the HDMI receiver
87
GND
-
Ground terminal
88
IDCK
I
Output data clock signal input from the HDMI receiver
89
IOVCC33
-
Power supply terminal (+3.3V)
90 to 98
D8 to D0
I
Digital video signal input from the HDMI receiver
99
CVCC18
-
Power supply terminal (+1.8V)
100
GND
-
Ground terminal
SA-WCT150/WCT350
48
MAIN BOARD IC4 ADSST-AVR-1115 (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V) (for core)
2
CLKCFG0
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at “L” in this set
Fixed at “L” in this set
3
CLKCFG1
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at “H” in this set
Fixed at “H” in this set
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode selection signal input terminal Fixed at “H” in this set
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V) (for core)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V) (for core)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V) (for core)
14
GND
-
Ground terminal
15
INT_REQ
O
Interrupt request signal output to the system controller
16
DIR_ERR
I
Error detection signal input from the digital audio interface receiver “L”: error
17
AD7
I/O
Two-way address and data bus terminal Not used
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V) (for core)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V) (for core)
24 to 26
AD6 to AD4
I/O
Two-way address and data bus terminal Not used
27
VDDINT
-
Power supply terminal (+1.2V) (for core)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way address and data bus terminal Not used
31
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way address and data bus terminal Not used
35
WR
∗
O
Write enable signal output terminal Not used
36, 37
VDDINT
-
Power supply terminal (+1.2V) (for core)
38
GND
-
Ground terminal
39
RD
∗
O
Read enable signal output terminal Not used
40
ALE
O
Address latch enable signal output terminal Not used
41 to 43
AD15 to AD13
I/O
Two-way address and data bus terminal Not used
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
46
AD12
I/O
Two-way address and data bus terminal Not used
47
VDDINT
-
Power supply terminal (+1.2V) (for core)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way address and data bus terminal Not used
53
A16
-
Not used
54
VDDINT
-
Power supply terminal (+1.2V) (for core)
55
GND
-
Ground terminal
56, 57
A17, A18
-
Not used
58
GND
-
Ground terminal
59
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
60
VDDINT
-
Power supply terminal (+1.2V) (for core)
61
GND
-
Ground terminal
62
PF_CE
-
Not used
63
SPI_MAS
-
Not used
64
DPSOA
O
Audio signal output to the stream processor
65
DPSOB
O
Audio signal output terminal Not used
66
VDDINT
-
Power supply terminal (+1.2V) (for core)
67
GND
-
Ground terminal
68
VDDINT
-
Power supply terminal (+1.2V) (for core)
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