Sony HS-KP1 Service Manual ▷ View online
HS-KP1
37
Pin No.
Pin Name
I/O
Description
98
AD_KEY3
I
A/D key 3 signal input
99
AD_KEY2
I
A/D key 2 signal input
100
AD_KEY1
I
A/D key 1 signal input
101
KEYPAD_MODE_SW
I
Keypad MODE (HT/ZONE) switch signal input
102 to 113
NO USE
O
Not used. (Open)
114
AVSS/AVRL GND
—
Ground
115
AVCC3 +3.3V
—
Power supply pin (+3.3 V)
116
AVRH +3.3V
—
Power supply pin (+3.3 V)
117
I2C DATA BUS MONI-
TOR
O
Not used. (Fixed at L)
118
I2C CLK MONITOR
O
Not used. (Fixed at L)
119
YAMAHA INT_N
I
YAMAHA INT_N signal input
120
SIRCS
I
Remote control signal input
121, 122
NO USE
O
Not used. (Open)
123
STOP_IN
I
Power supply cut detect signal input
124, 125
NO USE
O
Not used. (Open)
126
UCOM RESET
O
Main micon reset trigger signal output
127
MD3
—
Connect to GND.
128
MD2
—
Not used. (Fixed at L)
129
MD1
—
Connect to GND.
130
MD0
—
Connect to GND.
131
INITX
—
Not used. (Fixed at H)
132
VSS GND
—
Ground
133
VCC5 +3.3V
—
Power supply pin (+3.3 V)
134
Flash Update RX
I
RS-232C RX signal input
135
Flash Update TX
O
RS-232C TX signal output
136
NO USE
O
Not used. (Open)
137
MIC_LCH_SW_A
O
Mic/audio switch Lch A (TC4053) signal output
138
MIC_LCH_SW_B
O
Mic/audio switch Lch B (TC4053) signal output
139
MIC_LCH_SW_INH
O
Mic/audio switch Lch INH (TC4053) signal output
140
MIC_RCH_SW_A
O
Mic/audio switch Rch A (TC4053) signal output
141
MIC_RCH_SW_B
O
Mic/audio switch Rch B (TC4053) signal output
142
MIC_RCH_SW_INH
O
Mic/audio switch Rch INH (TC4053) signal output
143
CHIME_ST
O
Chime (ML2201) ST signal output
144
CHIME_PI
O
Chime (ML2201) PI signal output
145
CHIME_PDOWN
O
Chime (ML2201) PDOWN signal output
146
VSS GND
—
Ground
147
VCC5 +3.3V
—
Power supply pin (+3.3 V)
148
EVOL_DAT
O
Volume & selector (R2S15904) DATA signal output
149
EVOL_CLK
O
Volume & selector (R2S15904) CLK signal output
150
OUT_SEL_A
O
Output selector (TC4053) A signal output
151
OUT_SEL_B
O
Output selector (TC4053) B signal output
152
NO USE
O
Not used. (Open)
153
OUT_SEL_INH
O
Output selector (TC4053) INH signal output
154
A_AMP_CD
O
Internal speaker amp (NJM2113) CD signal output
155
D_AMP_SHUTDOWN
O
Damp (TPA3100D2) SHUTDOWN signal output
156
D_AMP_MUTE
O
Damp (TPA3100D2) MUTE signal output
157, 158
NO USE
O
Not used. (Open)
159, 160
NO USE
—
Not used. (Fixed at L)
161
VSS GND
—
Ground
162
VCC5 +3.3V
—
Power supply pin (+3.3 V)
163
D_AMP_FAULT
O
Damp (TPA3100D2) FAULT detect signal output
164 to 173
NO USE
O
Not used. (Open)
174
EEPROM_SDA
O
EEPROM SDA signal output
175
EEPROM_SCL
O
EEPROM SCL signal output
176
VCC +3.3V
—
Power supply pin (+3.3 V)
HS-KP1
38
KP LCD BOARD (3/4) IC3604 YGV629-VZ (ON-SCREEN DISPLAY)
Pin No.
Pin Name
I/O
Description
1
PLLVDD
—
Power supply pin (+3.3 V)
2
FILTER
I
Filter connect pin for internal PLL
3
PLLVSS
—
Ground
4
NO USE
O
Not used. (Open)
5
PLLCTL5
I
PLL setting pin (Fixed at H)
6
PLLCTL4
I
PLL setting pin (Fixed at L)
7
PLLCTL3
I
PLL setting pin (Fixed at L)
8
PLLCTL2
I
PLL setting pin (Fixed at H)
9
PLLCTL1
I
PLL setting pin (Fixed at H)
10
PLLCTL0
I
PLL setting pin (Fixed at L)
11
DTCKS_N
I
Clock signal input (Fixed at H)
12
DTCK_IN
I
Clock signal input (Fixed at H)
13
VSS
—
Ground
14
VDD
—
Power supply pin (+3.3 V)
15 to 22
D0 to D7
I/O
Two-way data bus 0 to 7 input/output with the system control and S-RAM
23
WAIT_N
O
Wait signal output for the system control
24
READY_N
O
Ready signal output for the system control
25
INT_N
O
Interrupt signal output for the system control
26
VDD
—
Power supply pin (+3.3 V)
27
VSS
—
Ground
28
CS_N
I
Chip select signal input from the system control
29
WR_N
I
Write enable signal input from the system control
30
RD_N
I
Read enable signal input from the system control
31 to 33
PS2 to PS0
I
Address 2 to 0 signal input from the system control
34
NO USE
O
Not used. (Open)
35
SDIN
I
Not used. (Connect to VSS)
36
SCS_N
I
Not used. (Fixed at H)
37
SCLK
I
Not used. (Connect to VSS)
38
SER_N
I
Not used. (Fixed at H)
39
RESET_N
I
Reset signal input from the system control (L: reset)
40
VSS
—
Ground
41
VDD
—
Power supply pin (+3.3 V)
42
NO USE
O
Not used. (Open)
43 to 47
MA1 to MA5
O
Address 1 to 5 signal output for the fl ash memory
48
VSS
—
Ground
49 to 54
MA6 to MA11
O
Address 6 to 11 signal output for the fl ash memory
55
VDD
—
Power supply pin (+3.3 V)
56
VSS
—
Ground
57 to 62
MA12 to MA17
O
Address 12 to 17 signal output for the fl ash memory
63
VSS
—
Ground
64 to 70
MA18 to MA24
O
Address 18 to 24 signal output for the fl ash memory
71
VDD
—
Power supply pin (+3.3 V)
72
VSS
—
Ground
73
MWE_N
O
Write enable signal output for the fl ash memory
74
MOE_N
O
Output enable signal output for the fl ash memory
75
MD15
I/O
Two-way data bus 15 input/output with the fl ash memory
76
MD7
I/O
Two-way data bus 7 input/output with the fl ash memory
77
MD14
I/O
Two-way data bus 14 input/output with the fl ash memory
78
MD6
I/O
Two-way data bus 6 input/output with the fl ash memory
79
MD13
I/O
Two-way data bus 13 input/output with the fl ash memory
80
MD5
I/O
Two-way data bus 5 input/output with the fl ash memory
81
VSS
—
Ground
82
VDD
—
Power supply pin (+3.3 V)
83
MD12
I/O
Two-way data bus 12 input/output with the fl ash memory
84
MD4
I/O
Two-way data bus 4 input/output with the fl ash memory
HS-KP1
39
Pin No.
Pin Name
I/O
Description
85
MD11
I/O
Two-way data bus 11 input/output with the fl ash memory
86
MD3
I/O
Two-way data bus 3 input/output with the fl ash memory
87
MD10
I/O
Two-way data bus 10 input/output with the fl ash memory
88
MD2
I/O
Two-way data bus 2 input/output with the fl ash memory
89
MD9
I/O
Two-way data bus 9 input/output with the fl ash memory
90
MD1
I/O
Two-way data bus 1 input/output with the fl ash memory
91
VSS
—
Ground
92
VDD
—
Power supply pin (+3.3 V)
93
MD8
I/O
Two-way data bus 8 input/output with the fl ash memory
94
MD0
I/O
Two-way data bus 0 input/output with the fl ash memory
95
RAHZ_N
I
Not used. (Fixed at H)
96
XTEST2
I
Not used. (Fixed at H)
97
XTEST1
I
Not used. (Fixed at H)
98
XTEST0
I
Not used. (Fixed at H)
99
VSIN_N
I
Not used. (Fixed at H)
100
HSIN_N
I
Not used. (Fixed at H)
101
NO USE
O
Not used. (Open)
102
AVDD
—
Power supply pin (+3.3 V)
103
R
O
Not used. (Fixed at L)
104
G
O
Not used. (Fixed at L)
105
B
O
Not used. (Fixed at L)
106
IREF
I
Reference voltage detect signal input
107
VSS
—
Ground
108
NO USE
O
Not used. (Open)
109
VDD
—
Power supply pin (+3.3 V)
110
VSS
—
Ground
111 to 116
DR0 to DR5
O
Digital video (R) 0 to 5 signal output for the video processor
117
VSS
—
Ground
118
VDD
—
Power supply pin (+3.3 V)
119 to 124
DG0 to DG5
O
Digital video (G) 0 to 5 signal output for the video processor
125
VSS
—
Ground
126
VDD
—
Power supply pin (+3.3 V)
127 to 132
DB0 to DB5
O
Digital video (B) 0 to 5 signal output for the video processor
133
VSS
—
Ground
134, 135
NO USE
O
Not used. (Open)
136
VSYNC_N
O
Vertical sync signal output for the video processor
137
HSYNC_N
O
Horizontal sync signal output for the video processor
138
BLANK_N
O
Not used. (Open)
139
DOTCLK
O
Dot clock signal output for the video processor
140
VDD
—
Power supply pin (+3.3 V)
141
XIN
I
System clock input (33.2 MHz)
142
XOUT
O
System clock output (33.2 MHz)
143
VSS
—
Ground
144
NO USE
O
Not used. (Open)
HS-KP1
40
KP LCD BOARD (4/4) IC001 ML86V8208TPZ03A (TMP)
Pin No.
Pin Name
I/O
Description
1
PVDDA
—
Power supply pin for HPLL (+3.2 V)
2
LPF
I
Not used. (Open)
3
VREF
I
Not used. (Open)
4
PGNDA
—
Ground for HPLL
5 to 7
NC
—
Not used. (Open)
8
ADVDD
—
Power supply pin for ADC (+3.2 V)
9
ADGND
—
Ground for ADC
10
NC
—
Not used. (Open)
11
AVDD
—
Power supply pin for analog (+3.2 V)
12
REFN1
—
Reference voltage (low) for ADC1 (Open)
13
CM1
—
Reference voltage (mid) for ADC1 (Open)
14
REFP1
—
Reference voltage (high) for ADC1 (Open)
15
AGND
—
Ground for analog
16
LPFOUT1
O
Not used. (Open)
17
AVDD
—
Power supply pin for analog (+3.2 V)
18
VIN1
I
Analog video input 1
19
AGND
—
Ground for analog
20, 21
VIN2, VIN3
I
Analog video input 2, 3
22
VIN4
I
Not used. (Connect to AGND)
23
AVDD
—
Power supply pin for analog (+3.2 V)
24
LPFOUT2
O
Not used. (Open)
25
AGND
—
Ground for analog
26
REFP2
—
Reference voltage (low) for ADC2 (Open)
27
CM2
—
Reference voltage (mid) for ADC2 (Open)
28
REFN2
—
Reference voltage (high) for ADC2 (Open)
29
AVDD
—
Power supply pin for analog (+3.2 V)
30
VIN5
I
Not used. (Connect to AGND)
31
VIN6
I
Analog video input 6
32
VIN7
I
Not used. (Connect to AGND)
33
AGND
—
Ground for analog
34
VIN8
I
Not used. (Connect to AGND)
35
AVDD
—
Power supply pin for analog (+3.2 V)
36
REFN3
—
Reference voltage (high) for ADC3 (Open)
37
CM3
—
Reference voltage (mid) for ADC3 (Open)
38
REFP3
—
Reference voltage (low) for ADC3 (Open)
39
AGND
—
Ground for analog
40
LPFOUT3
O
Not used. (Open)
41
AVDD
—
Power supply pin for analog (+3.2 V)
42
NC
—
Not used. (Open)
43
ADVDD
—
Power supply pin for ADC (+3.2 V)
44
ADGND
—
Ground for ADC
45
DVDDIO
—
Power supply pin for output (+3.2 V)
46 to 49
DB0 to DB3
O
Display output data B0 to B3
50
DVSSIO
—
Ground for output
51 to 54
DB4 to DB7
O
Display output data B4 to B7
55
DVDDIO
—
Power supply pin for output (+3.2 V)
56 to 59
DG0 to DG3
O
Display output data G0 to G3
60
DVSSIO
—
Ground for output
61 to 64
DG4 to DG7
O
Display output data G4 to G7
65
DVDDIO
—
Power supply pin for output (+3.2 V)
66
CP
O
Display output data clock
67
DVDDC
—
Power supply pin for logic core (+2.5 V)
68
DISP
O
Display control
69
DE
O
Display output data enable
70
DVSSC
—
Ground for logic core
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