DOWNLOAD Sony HCD-RG295 / HCD-RG495 / HCD-RG595 / MHC-RG295 / MHC-RG495 / MHC-RG595 Service Manual ↓ Size: 10.49 MB | Pages: 86 in PDF or view online for FREE

Model
HCD-RG295 HCD-RG495 HCD-RG595 MHC-RG295 MHC-RG495 MHC-RG595
Pages
86
Size
10.49 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-rg295-hcd-rg495-hcd-rg595-mhc-rg295-mhc-rg495-.pdf
Date

Sony HCD-RG295 / HCD-RG495 / HCD-RG595 / MHC-RG295 / MHC-RG495 / MHC-RG595 Service Manual ▷ View online

53
HCD-RG295/RG495/RG595
– MAIN Board –
IC101
R2S15207FP
1 2
INPUT
SELECTOR
SURROUND
VOCAL CUT
TONE CONTROL
(BASS, TREBLE, MID)
TONE CONTROL
(BASS, TREBLE, MID)
MCU
INTERFACE
RECOUT
INC2
IND2
VOLIN2
INB2
INA2
MONO/STEREO
REF
TONE
ON/OFF
TONE
ON/OFF
BASSBOOST
ON/OFF
39
MIX2 37
VCC 38
40
3
REC2
5
BASS12
6
BASS22
7
TRE2
8
MID12
9
MID22
10
TONEOUT2
4
SAOUT
+
+
29 28
INPUT
SELECTOR
RECOUT
INC1
IND1
INA1 31
MIX1 36
GND 32
REFIN 33
SUR2 35
SUR1 34
30
INB1
27
REC1
26
BASS1
25
BASS21
24
TRE1
23
MID11
22
MID21
21
TONEOUT1
+
VOCALCUT
ON/OFF
VOCALCUT
ON/OFF
TONE ATT
TONE ATT
11
BB12
12
BB22
13
OUT2
14
CLOCK
15
DATA
16
VOLUME
VOLIN1
BASSBOOST
ON/OFF
20
BB11
19
BB21
18
OUT1
17
VOLUME
IC102
R2S15208SP
REFIN 1
VCC 4
CLOCK
6
REF AMP
GND
7
ROUT
8
DATA 5
MCU
INTERFACE
LIN 2
RIN 3
LOUT
9
REFOUT
10
3BAND
PARAMETRIC
EQUALIZER
54
HCD-RG295/RG495/RG595
IC  Pin  Function  Description
CD BOARD  IC201 CXD3014A-201R (CD DSP)
Pin No.
Pin Name
I/O
Description
1
LRCK
O
L/R sampling clock signal output terminal
2
LRCKI
I
L/R sampling clock signal input terminal
3
PCMD
O
Serial data output terminal
4
PCMDI
I
Serial data input terminal
5
BCK
O
Bit clock signal output terminal
6
BCKI
I
Bit clock signal input terminal
7
XTACN
I
Oscillation circuit on/off control signal input from the system controller
"L": oscillation stop, "H": self-oscillation
8
XRST
I
System reset signal input from the system controller    "L": reset
9
VSS
-
Ground terminal
10
IREQ-MP3
O
MP3 data request signal output to the system controller
11
CLOK
I
CD serial data transfer clock signal input from the system controller
12
DATA2
I
MP3 serial data input from the system controller
13
XLAT-MP3
I
MP3 serial data latch pulse signal input from the system controller
14
REQ-MP3
I
MP3 data request signal input from the system controller
15
ACK-MP3
O
MP3 acknowledge signal output to the system controller
16
XLAT
I
CD serial data latch pulse signal input from the system controller
17
VDD
-
Power supply terminal (+1.8V)
18
SVSS
-
Ground terminal
19
SVDD
-
Power supply terminal (+1.8V)
20
SENS
O
Internal status (SENSE) signal output to the system controller
21
WFCK
O
Write frame clock signal output terminal    Not used
22
XUGF
O
XUGF signal output terminal    Not used
23
XPCK
O
XPCK signal output terminal    Not used
24
GFS
O
Guard frame sync signal output terminal    Not used
25
C2PO
O
C2 pointer signal output terminal    Not used
26
SCOR
O
Subcode sync (S0+S1) detection signal output to the system controller
27
VDD
-
Power supply terminal (+1.8V)
28
COUT
O
Numbers of track counted signal output terminal    Not used
29
SVSS
-
Ground terminal
30
SVDD
-
Power supply terminal (+1.8V)
31
MIRR
O
Mirror signal output terminal    Not used
32
DFCT
O
Defect signal output terminal    Not used
33
FOK
O
Focus OK signal output terminal    Not used
34
VSS
-
Ground terminal
35
VDD
-
Power supply terminal (+1.8V)
36
VSS
-
Ground terminal
37
LOCK
O
GFS is sampled by 460 Hz    "H" output when GFS is "H"    Not used
38
MDP
O
Spindle motor servo control signal output terminal
39
SSTP
I
Disc inner position detection signal input terminal
40
IOVSS1
-
Ground terminal
41
SFDR
O
Sled servo drive signal (+) output terminal
42
SRDR
O
Sled servo drive signal (-) output terminal
43
TFDR
O
Tracking servo drive signal (+) output terminal
44
TRDR
O
Tracking servo drive signal (-) output terminal
45
FFDR
O
Focus servo drive signal (+) output terminal
55
HCD-RG295/RG495/RG595
Pin No.
Pin Name
I/O
Description
46
FRDR
O
Focus servo drive signal (-) output terminal
47
IOVDD1
-
Power supply terminal (+3.3V)
48
AVDD0
-
Power supply terminal (+3.3V)
49
AVSS0
-
Ground terminal
50
E
I
E signal input from the optical pick-up block
51
F
I
F signal input from the optical pick-up block
52
TEI
I
Tracking error signal input terminal
53
TEO
O
Tracking error signal output terminal
54
FEI
I
Focus error signal input terminal
55
FEO
O
Focus error signal output terminal
56
VC
O
Middle point voltage output terminal
57
A
I
A signal input from the optical pick-up block
58
B
I
B signal input from the optical pick-up block
59
C
I
C signal input from the optical pick-up block
60
D
I
D signal input from the optical pick-up block
61
AVDD4
-
Power supply terminal (+3.3V)
62
RFDCO
O
RFDC signal output terminal    Not used
63
PDSENS
I
Reference voltage input terminal for PD
64
AC_SUM
O
RFAC summing amplifier signal output terminal
65
EQ_IN
I
RF equalizer circuit input terminal
66
LD
O
Laser diode on/off control signal output to the automatic power control circuit
"H": laser diode on
67
PD
I
Light amount monitor input from the laser diode of optical pick-up block
68
RFC
I
Equalizer cut off frequency adjustment terminal
69
AVSS4
-
Ground terminal
70
RFACO
O
EFM signal output terminal
71
RFACI
I
EFM signal input terminal
72
AVDD3
-
Power supply terminal (+3.3V)
73
BIAS
I
Asymmetry circuit constant current input terminal
74
ASYI
I
Playback EFM asymmetry comparator voltage input terminal
75
ASYO
O
Playback EFM full-swing output terminal
76
VPCO
O
Charge pump output terminal for broad-band EFM PLL
77
VCTL
I
VCO2 control voltage input terminal for broad-band EFM PLL
78
AVSS3
-
Ground terminal
79
CLTV
I
VCO1 control voltage input terminal for multiplier
80
FILO
O
Filter output terminal for master PLL
81
FILI
I
Filter input terminal for master PLL
82
PCO
O
Charge pump output terminal for master PLL
83
SVSS
-
Ground terminal
84
SVDD
-
Power supply terminal (+1.8V)
85
SSTB-MP3
I
MP3 standby on/off control signal input terminal    "L": standby    Not used
86
VDD
-
Power supply terminal (+1.8V)
87
VSS
-
Ground terminal
88
TEST1
I
Input terminal for the test    Normally: fixed at "L"
89
DATA
I
CD serial data input from the system controller
90
CLK2
I
MP3 serial data transfer clock signal input from the system controller
91
SVSS
-
Ground terminal
56
HCD-RG295/RG495/RG595
Pin No.
Pin Name
I/O
Description
92
SVDD
-
Power supply terminal (+2.5V)
93
JTAGTCK
I
Clock signal input terminal (for JTAG)    Not used
94
JTAGTDI
I
Data input terminal (for JTAG)    Not used
95
JTAGTDO
O
Data output terminal (for JTAG)    Not used
96
JTAGTMS
I
Mode select signal input terminal (for JTAG)    Not used
97
TRST
I
Reset signal input terminal (for JTAG)    Not used
98
VSS
-
Ground terminal
99
VDD
-
Power supply terminal (+1.8V)
100
IOVDD2
-
Power supply terminal (+3.3V)
101
DOUT
O
Digital audio signal output terminal    Not used
102
TEST
I
Input terminal for the test    Normally: fixed at "L"
103
TES1
I
Input terminal for the test    Normally: fixed at "L"
104
IOVSS2
-
Ground terminal
105
PLLVDD
-
Power supply terminal (+1.8V)
106
PLLVSS
-
Ground terminal
107
XVSS
-
Ground terminal
108
XTAO
O
System clock output terminal (16.9344 MHz)
109
XTAI
I
System clock input terminal (16.9344 MHz)
110
XVDD
-
Power supply terminal (+1.8V)
111
AVDD1
-
Power supply terminal (+3.3V)
112
AOUT1
O
L-ch analog audio signal output terminal
113
VREFL
O
L-ch reference voltage output terminal
114
AVSS1
-
Ground terminal
115
AVSS2
-
Ground terminal
116
VREFR
O
R-ch reference voltage output terminal
117
AOUT2
O
R-ch analog audio signal output terminal
118
AVDD2
-
Power supply terminal (+3.3V)
119
IOVDD0
-
Power supply terminal (+3.3V)
120
IOVSS0
-
Ground terminal
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