Sony HCD-GX8000 / HCD-RG77 Service Manual ▷ View online
HCD-GX8000/RG77
46
46
MAIN TRANS BOARD
1-683-539-
11
(11)
4
1
∗ ∗
NOT REPLACEABLE:
BUILT IN TRANSFORMER
T910
MAIN POWER
TRANSFORMER
M
POWER
BOARD
NO501
IC971
SUB-TRANS BOARD
1-683-540-
11
(11)
1
3
3
E
N
POWER BOARD
NO504
1
1
4
2
1
2
AC IN
VOLTAGE SELECTOR
S901
120V
220V
230
−
240V
T972
SUB POWER
TRANSFORMER
A
B
C
D
E
F
G
H
1
2
3
4
5
6
7
(E, SP)
(MX)
(E, SP)
(AR)
(E, SP, AR)
(EXCEPT MX, AR)
(GX8000)
(E, SP)
(MX)
(EXCEPT E, SP, MX)
EXCEPT
MX
(EXCEPT E, SP)
(E, SP)
7-25. PRINTED WIRING BOARDS – MAIN TRANS/SUB-TRANS Boards –
•
See page 27 for Circuit Boards Location.
(Page
40)
(Page 40)
D971
G-4
D972
F-2
D973
F-2
D974
E-2
D975
E-2
D977
C-7
IC971
G-2
Q971
G-3
• Semiconductor
Location
Ref. No.
Location
HCD-GX8000/RG77
47
47
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
R944
D977
JW972
R974
R975
CN976
C975
D974
D975
D973
D972
C976
C973
C978
C977
JW984
JW990
JW987
CN997
R954
JW954
JW975
T972
T910
JW973
R951
R952
R941
C941
Q971
C971
D971
CN974
RY971
D976
F971
F976
F977
F974
F975
NO971
JW986
S901
JW993
JW971
CN973
JW974
11ES2
100k
10k
3P
2200
16V
11ES2
11ES2
11ES2
11ES2
0.1
100
16V
16V
0.1
0.1
13P
3.3M
1/2W
1/2W
0.1
0.15
1
100
63V
63V
2SC2785
10000p
250V
1SS133T
2P
T6.3AL
250V
∗
∗
∗
STBY RELAY
D-GND
N
220
120
AC3
AC4
AC4
VF
VF
VL
VL
AC3
VH
GND
GND
VH
230-240
220
120
230-240
N
EVER+4V
230-240
220
230-240
220
120
120
VP
TRANSFORMER
TRANSFORMER
SUB POWER
MAIN POWER
∗
NOT REPLACEABLE:
BUILT IN TRANSFORMER
RELAY DRIVE
POWER ON/OFF
AC IN
220V
VOLTAGE SELECTOR
120V
230-240V
-1
-2
(E,SP)
(E,SP)
(EXCEPT E,SP)
NO971
∗
4P
2P
(MX)
(E,SP)
(EXCEPT E,SP)
(EXCEPT MX)
(EXCEPT E,SP,MX)
(GX8000)
(EXCEPT MX,AR)
(AR)
(MX)
(E,SP)
(E,SP)
(E,SP)
(EXCEPT E,SP)
∗
4P
2P
(E,SP,AR)
CN973
∗
∗
∗
∗
F976, 977
8.0A/250V (RG77)
8.0A/125V (GX8000)
8.0A/125V (GX8000)
∗
F974, 975
T6.3AL/250V (RG77)
6.3A/125V (GX8000)
R953
G
O
I
+4V REGULATOR
IC971
µ
PC3504AHF
7-26. SCHEMATIC DIAGRAM – MAIN TRANS/SUB-TRANS Boards –
• Voltages are dc with respect to ground under no-signal
(detuned) conditions.
no mark : TUNER (FM/AM)
no mark : TUNER (FM/AM)
The components identified by mark
0
or dotted
line with mark
0
are critical for safety.
Replace only with part number specified.
(Page 41)
(Page 41)
HCD-GX8000/RG77
48
48
F01
R02
R01
LINE NF
LINE IN
REFERENCE
CURRENT
REFERENCE
CURRENT
RESET
BAND
PASS
FILTER
DET
17
RESET
18
F02
16
F03
15
F04
14
F05
13
F06
12
REC LEVEL
11
VCC
10
4
3
2
1
+
–
REC NF
REC IN
6
RESET C
7
BIAS C
8
GND
9
5
+
–
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
RW/ROM
RW/ROM
EQ ON/OFF
VOFST
VOFST
DVC
VC
VC
VC
RW/ROM
VC
DVC
30
29
28
+
–
+
–
DVC
VCC
DVC
27
26
25
24
RW/ROM
EQ
23
22
21
20
19
RFAC
VCA
VCC
+
–
DVC
+
–
+
–
RW/ROM
VC
RW/ROM
DVC
+
–
3
A
B
C
D
B
C
C
A
A
A
B
C
C
D
B
C D
D
+
–
1
2
APC AMP
5
6
7
8
9
4
RFAC
SUMMING
AMP
RW/ROM
APC-OFF
(Hi-Z)
RW/ROM
(H/L)
VOFST
VC
RW/ROM
+
–
10
11
GM
GM
18
17
16
B
D
A
C
13
14
15
12
EQ IN
LD
PD
GND
A
B
C
D
AC SUM
E
F
DVCC
DVC
RFAC
SW
DC OFST
RFDCI
RFDCO
VC
RFC
VFC
BST
RFG
VCC
CEI
CE
TE BAL
TE
FEI
FE
• IC Block Diagrams
– BD Board –
– BD Board –
IC101
CXD3017Q
IC102
BA5974FM-E2
IC103
CXA2581N-T4
– DRIVER Board –
IC701
BA6956AN
– PANEL Board –
IC602
BA3830F-E2
TE
RFDC
CE
IGEN
AVSS0
ADIO
AVDD0
CLTV
FILO
AVSS3
VSS
AVDD3
DOUT
VDD
PCO
FILI
ASYO
ASYI
RFAC
BIAS
SSTP
DFCT
MIRR
MDP
LOCK
FOK
SFDR
VSS
TEST
FRDR
FE
VC
VC
COUT
SE
XTSL
TES1
SRDR
TFDR
FFDR
TRDR
TRDR
2
1
70
71
68
69
66
67
64
65
62
61
63
73
74
72
75
76
77
78
79
80
4
XRST
3
SQCK
SQSO
5
9
8
7
6
56
60
53
54
55
59
57
58
51
52
48
49
50
47
44
45
46
43
41
42
XLAT
CLOK
SENS
SYSM
DATA
XUGF
XPCK
GFS
C2PO
WFCK
10 11 12 13 14 15 16 17 18 19 20
21
22
23
24
25
26
32
33
30
31
36
37
34
35
39
40
38
28
27
29
SPOA
ATSK
SCLK
VDD
SCOR
SPOB
XLON
XTAI
XVDD
EMPH
AVDD1
AOUT1
AIN1
XTAO
XVSS
XVSS
AIN2
AOUT2
AVDD2
RMUT
LOUT2
LOUT1
BCK
LRCK
PCMD
LMUT
AVSS1
AVSS2
CPU
INTERFACE
SERVO AUTO
SEQUENCER
SERIAL IN
INTERFACE
OVER SAMPLING
DIGITAL FILTER
3rd ORDER
NOISE SHAPER
PWM
PWM
EFM
DEMODULATOR
TIMING
LOGIC
DIGITAL
OUT
D/A
INTERFACE
DIGITAL
PLL
ASYMMETRY
CORRECTOR
CLOCK
GENERATOR
MIRR, DFCT,
FOK
DETECTOR
DIGITAL
CLV
SUBCODE
PROCESSOR
SERVO
INTERFACE
SERVO DSP
FOCUS
SERVO
SERVO
TRACKING
SERVO
SLED
SERVO
PWM GENERATOR
FOCUS PWM
GENERATOR
TRACKING
PWM GENERATOR
SLED PWM
GENERATOR
16K
RAM
ERROR
CORRECTOR
INTERNAL BUS
A/D
CONVERTER
OPERATIONAL
AMPLIFIER
ANALOG SWITCH
LEVEL SHIFT
INTERFACE
INTERFACE
INTERFACE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20
21
22
23
24
25
26
27
28
19
18
17
16
15
F
R
R
F
F
R
R
F
R
R
F
F
MUTE
THERMAL
SHUTDOWN
VREFOUT
VREFIN
POWVCC
CH1FIN
CH1RIN
CH2FIN
CH2RIN
CH2OUTR
CH2OUTF
CH1OUTR
CH1OUTF
CAP
AIN1
CAP
AIN2
GND
PRFVCC
MUTE
POWVCC
CH4SIN'
CH4SIN
CH4BIN
CH3FIN
CH3RIN
CH3OUTR
CH3OUTF
CH4OUTR
CH4OUTF
CAP
AIN3
GND
49
HCD-GX8000/RG77
7-27.
IC PIN FUNCTION DESCRIPTION
•
MAIN BOARD IC501 M30620MCN-A09FP (SYSTEM CONTROLLER (CD MECHANISM CONTROL))
Pin No.
Pin Name
I/O
Description
1
NO-USE
—
Not used
2
STEREO
I
FM stereo detection signal input from the tuner unit “L”: stereo
3
TUNED
I
Tuning detection signal input from the tuner unit “L”: tuned
4
SIRCS
I
Remote control signal input
5 to 7
SUR1 to SUR3
O
Surround signal processor control signal output terminal Not used
8, 9
GND
—
Ground terminal
10
XC-IN
I
Sub system clock input terminal (32.768 kHz)
11
XC-OUT
O
Sub system clock output terminal (32.768 kHz)
12
RESET
I
System reset signal input from the reset signal generator “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
13
X-OUT
O
Main system clock output terminal (16 MHz)
14
VSS
—
Ground terminal
15
X-IN
I
Main system clock input terminal (16 MHz)
16
VCC
—
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input terminal
18
NO-USE
—
Not used
19
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
20
AC-CUT
I
AC off detection signal input from the reset signal generator “L”: AC cut checked
21
ST-MUTE
O
Tuner muting on/off control signal output “H”: muting on
22
ST-CE
O
PLL chip enable signal output to the tuner unit
23
ST-DOUT
O
PLL serial data output to the tuner unit
24
PWM3
O
RFDC PWM signal output to the RF amplifier (for CD-RW)
25
ST-DIN
I
PLL serial data input from the tuner unit
26
PWM2
O
PWM signal output to the RF amplifier (for CD-RW)
27
ST-CLK
O
PLL serial data transfer clock signal output to the tuner unit
28
PWM1
O
Focus servo drive PWM signal output to the RF amplifier (for CD-RW)
29
IIC-CLK
I/O
Communication data reading clock signal input or transfer clock signal output with the fluorescent
indicator tube driver
indicator tube driver
30
IIC-DATA
I/O
Communication data bus with the fluorescent indicator tube driver
31
TXD1
—
Not used
32
SQ-DATA
I
Subcode Q data input from the digital signal processor
33
SQ-CLK
O
Subcode Q data reading clock signal output to the digital signal processor
34
SENS
I
Internal status detection monitor input from the digital signal processor
35
CD-DATA
O
Serial data output to the digital signal processor
36
XLT
O
Serial data latch pulse output to the digital signal processor
37
CD-CLK
O
Serial data transfer clock signal output to the digital signal processor
38
CD-POWER
O
Power on/off control signal output for the CD section “H”: power on
39
CLOCK-OUT
O
Clock (32.768 kHz) signal output terminal (for test mode)
40
LD ON
O
Laser diode on/off control signal output to the RF amplifier “L”: laser diode on
41
GC RESET
I
Reset signal output to the fluorescent indicator tube driver “L”: reset
42
NO-USE
—
Not used
43
XRST
O
Reset signal output to the digital signal processor and motor/coil driver “L”: reset
44
LOAD-IN
O
Turn motor drive signal output
45
LOAD-OUT
O
Turn motor drive signal output
46
OPEN-SW
I
Disc tray open detection signal input terminal “L”: disc tray open
47
CLOSE-SW
I
Disc tray close detection signal input terminal “L”: disc tray close
Ver 1.2
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