Sony HCD-GP8D (serv.man2) Service Manual ▷ View online
SERVICE MANUAL
9-879-166-81
Ver. 1.2 2004.12
HCD-GP8D
SUPPLEMENT-1
Subject: Block Diagram, IC Block Diagram and IC Pin Function
Description.
E Model
Australian Model
Russian Model
Chinese Model
2
HCD-GP8D
• IC Pin Function Description
MAIN BOARD IC501
MAIN BOARD IC501
µ
PD78007 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
RMUT
O
Tuner muting signal output
2
PMUT
O
Tape PLAY muting signal output
3
RPHD
O
REC/PLAY control signal output
4
BIAS
O
BIAS ON/OFF control signal output
5
TSOL
O
Tape solenoid control signal output
6
TMOT
O
Tape motor control signal output
7
TCNT
O
Tape control signal output
8
SMUTE
I
Not used Fixed at “L” in this set.
9
GND
—
Ground terminal
10
VDD
—
Power supply terminal (+5V)
11
STE
I
Stereo signal input
12
TUCE
O
Chip enable signal output to the tuner
13
TUND
I
Tuning signal input from the tuner
14
TOP
O
DVD/CD tray open control signal output
15
VEDA
O
Chip select output to the FL driver
16
VFCK
O
Clock output to the FL driver
17
VFSTB
O
Data output to the FL driver
18
TUDI
O
Data output to the tuner
19
TUDO
I
Data input from the tuner
20
TUCK
O
Clock output to the tuner
21
RDDA
O
Strobe signal input to the tuner
22
VUP
I
Volume up input
23
FPON
O
FL power supply control signal output
24
VDDI
—
Power supply terminal (+5V)
25
GND
—
Ground terminal
26
KEY1
I
Function key input
27
KEY2
I
Function key input
28
KEY3
I
Function key input
29
SFTY
I
AC cut detect signal input
30
HDPN
I
Tape SW (PACK, HDPLY) signal input
31
REPT
I
Tape SW (RECF, RECR) signal input
32
VER
I
Not used Fixed at “L” in this set.
33
VDWN
I
Volume down input
34
AVR
—
Reference voltage terminal
35
TCL
O
DVD/CD tray close control signal output
36
RST
I
System reset signal input
37
XT2
I
Subclock input (36.768KHz)
38
XT1
O
Subclock output (36.768KHz)
39
IC
—
Not used
40
X2
I
Main system clock input (8.38MHz)
41
X1
O
Main system clock output (8.38MHz)
42
GND
—
Ground terminal
43
SHFT
—
Not used Fixed at “L” in this set.
44
INH
I
Power down detect signal input
45
REM
I
SIRCS signal input from the remote control reciever
46
RDCK
O
RDCK signal output to the tuner
47
MRST
I
MPEG flash memory reset signal input
SECTION 1
DIAGRAMS
3
HCD-GP8D
Pin No.
Pin Name
I/O
Description
48
DSDA
O
DAC encoder data signal output
49
DSSTB
O
DAC encoder chip enable signal output
50
DSCK
O
DAC encoder clock signal output
51
XTO
—
Not used
52
E-STB
O
Chip enable output to the microphone echo
53
SDAT/ROM DA
O
Data output to the soundprocessor
54
SCK/ROM CK
O
Clock output to the soundprocessor
55
OPN
O
Loading motor FWD control signal output
56
CLS
O
Loading motor REV control signal output
57
E-CLK
O
Clock output to the microphone echo
58
E-DATA
O
Data output to the microphone echo
59
AMUTE
O
Audio line muting signal output
60
LED
O
LED control signal output
61
TUON
O
Tuner power supply control signal output
62
CD ON
O
CD power supply control signal output
63
RLY
O
Relay control signal output
64
PCON
O
Power supply control signal output
4
HCD-GP8D
MPEG BOARD UD705 ZR36748 (VIDEO DAC ENCODER)
Pin No.
Pin Name
I/O
Description
Pin No.
Pin Name
I/O
Description
1
VDDP
—
Power supply terminal (+3.3V)
2
DUPRD
—
Not used
3
BOOTSEL2
—
Not used
4
GPCI014
I
LSI RST signal input from the AV decoder
5
GPCI013
—
Not used
6
GPCI012
—
Not used
7
SSCRRO/CPC1011
I
Chip enable signal input from the system controller
8
SSCRRO/CPC1010
I
Clock signal input from the system controller
9 to 14
ATDD5 to 10
I
DVD (RF) signal input from the AV decoder
15
GNDP
—
Ground terminal
16
ATDD4
I
DVD (RF) signal input from the AV decoder
17
VDDP
—
Power supply terminal (+3.3V)
18
ATDD11
I
DVD (RF) signal input from the AV decoder
19
ATDD3
I
DRFO signal input from the AV decoder
20
ATDD12
I
DACK signal input from the AV decoder
21
ATDD2
I
DFFR signal input from the AV decoder
22
ATDD13
I
DBGN signal input from the AV decoder
23
ATDD1
I
DCLK signal input from the AV decoder
24
ATDD14
—
Not used
25
ATDD0
I
DMUTE signal input
26
ATDD15
O
DVD tray open signal output
27
ATIOW
O
DVD tray close signal output
28
VDDC
—
Power supply terminal (+1.8V)
29
ATIOR
O
LMTSW signal output from the AV decoder
30
GNDP
—
Ground terminal
31
ATIORD
I
RDY signal input
32
ATIOFFRO
—
Not used
33
GNDP
—
Ground terminal
34
ATDA2
O
RF servo gain up signal output
35
VDDP
—
Power supply terminal (+3.3V)
36
ATDA1
I
C2F signal input from the AV decoder
37
ATDA0
I
LRCK signal input from the AV decoder
38
ATCS1
I
BCK signal input from the AV decoder
39
ATCS0
I
CD DATA signal input from the AV decoder
40
BOOTSEL1
—
Not used
41
GPCI01
I
INTDET signal input from the AV decoder
42
SSCSRO
I
Not used in this set. Fixed at (“L”).
43
GPC103
I
WRO signal input from the AV decoder
44
GCP104
—
Not used
45
GCP105
O
Serial data output to the audio DAC
46
GCP106
O
Serial data clock output to the audio DAC
47
GCP107
I
SPDFG signal input
48
VDDP
—
Power supply terminal (+3.3V)
49
SSCRXD/GPC108
I
Data signal input from the system controller
50
GNDP
—
Ground terminal
51
SSCRXD/GPC109
I
Data signal input from the system controller
