Sony HCD-GNX700 / HCD-GNX800 / MHC-GNX700 / MHC-GNX800 Service Manual ▷ View online
57
HCD-GNX700/GNX800
Pin No.
Pin Name
I/O
Description
49
AVSS3
–
Ground terminal
50
CLTV
I
Multiplier VCO1 control voltage input
51
FILO
O
Master PLL (slave = digital PLL) filter signal output
52
FILI
I
Master PLL filter signal input
53
PCO
O
Master PLL charge pump signal output
54
AVDD5
–
Power supply terminal (+3.3V)
55
DDVROUT
O
DC/DC converter output (+2.5V)
56
DDVRSEN
I
DC/DC converter output voltage monitor signal input
57
AVSS5
–
Ground terminal
58
DDCR
I
DC/DC converter reset signal input
59
NC
–
Not used (Open)
60
BCKI
I
D/A interface bit clock input
61
PCMDI
I
D/A interface serial data input
62
LRCKl
I
D/A interface LR clock input
63
LRCK
O
D/A interface LR clock output f = Fs
64
VSS
–
Ground terminal
65
PCMD
O
D/A interface serial data output
66
BCK
O
D/A interface bit clock output
67
VDD
–
Power supply terminal (+2.5V)
68
EMPH
O
High when the playback disc has emphasis, low it has not
69
EMPHI
I
High when de-emphasis is ON, low when input OFF
70
IOVDD2
–
Power supply terminal (+3.3V)
71
DOUT
O
Digital Out signal output
72
TEST
I
Test terminal (Connected to ground)
73
TEST1
I
Test terminal (Connected to ground)
74
IOVSS2
–
Ground terminal
75
NC
–
Not used (Open)
76
XVSS
–
Ground terminal
77
XTAO
O
Crystal oscillation circuit signal output
78
XTAI
I
Crystal oscillation circuit signal input
79
XVDD
–
Power supply terminal (+2.5V)
80
AVDD1
–
Power supply terminal (+3.3V)
81
AOUT1
O
L-ch analog signal output
82
VREFL
O
L-ch reference voltage output
83
AVSS1
–
Ground terminal
84
AVSS2
–
Ground terminal
85
VREFR
O
R-ch reference voltage output
86
AOUT2
O
R-ch analog signal output
87
AVDD2
–
Power supply terminal (+3.3V)
88
NC
–
Not used (Open)
89
IOVDD0
–
Power supply terminal (+3.3V)
90
RMUT
O
Not used (Open)
91
LMUT
O
Not used (Open)
92
NC
–
Not used (Open)
93
XTSL
I
Crystal selection signal input (Pull down)
94
IOVSS0
–
Ground terminal
95
XTACN
I
Oscillation circuit control signal input (“H”: self-oscillation, “L”: oscillation stop)
96
SQSO
O
Not used (Open)
97
SQCK
I
SQSO readout clock input (Connected to +VDD(+3.3V))
98
SBSO
O
Not used (Open)
58
HCD-GNX700/GNX800
Pin No.
Pin Name
I/O
Description
99
EXCK
I
Not used (Open)
100
XRST
I
System reset signal input from M30622MEP
101
SYSM
I
Muting signal input (Connected to ground)
102
DATA
I
Serial data input from M30622MEP
103
VSS
–
Ground terminal
104
XLAT
I
Latch signal input from M30622MEP
105
CLOCK
I
Serial data transfer clock input from M30622MEP
106
VDD
–
Power supply terminal (+2.5V)
107
SENS
O
SENS output to M30622MEP
108
SCLK
I
SENS serial data readout clock input (Connected to +VDD(+3.3v))
109
ATSK
I/O
Not used (Open)
110
WFCK
O
Not used (Open)
111
XUGF
O
Not used (Open)
112
XPCK
O
Not used (Open)
113
GFS
O
Not used (Open)
114
C2PO
O
Not used (Open)
115
SCOR
O
High output when the sub code sync, S0 or S1, is detected
116
VDD
–
Power supply terminal (+2.5V)
117
C4M
O
Not used (Open)
118
WDCK
O
Not used (Open)
119
COUT
I/O
Not used (Open)
120
NC
–
Not used (Open)
59
HCD-GNX700/GNX800
Pin No.
Pin Name
I/O
Description
1
XRST
O
Reset signal output to CXD3059AR (“L”: reset)
2
CD-DATA
O
Serial data output to CXD3059AR
3
XLAT
O
Serial data latch signal output to CXD3059AR
4
SIRCS
I
Remote control signal input
5
MP3 DATA OUT
O
Serial data output to TC94A34FG
6
MP3 DATA IN
I
Serial data input from TC94A34FG
7
MP3 CLK
O
Serial data transfer clock output to TC94A34FG
8
BYTE
I
Not used (Connected to ground)
9
CNVSS
–
Ground at test (Pull down)
10
XC-IN
I
Sub system clock input (32.768KHz)
11
XC-OUT
O
Sub system clock output (32.768KHz)
12
RESET
I
System reset signal input
13
X-OUT
O
Main system clock output (5MHz)
14
VSS
–
Ground terminal
15
X-IN
I
Main system clock input (5MHz)
16
VCC
–
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input (Not used) (Pull up with resistor)
18
CD-CLK
O
Serial data transfer clock output to CXD3059AR
19
SCOR
I
Sub code sync (S0+S1) detection signal input from CXD3059AR
20
AC-CUT
I
AC off detection signal input (“L”: AC cut detected)
21
SENS
I
Internal status detection monitor input from CXD3059AR
22
MP3 RST
O
Reset signal output to TC94A34FG
23
MP3 CS
O
Chip select signal output to TC94A34FG (“L”: enable)
24
MP3 LP
O
Latch pulse output to TC94A34FG (“L”: enable)
25
MP3 ACK
I
Acknowledgement signal input from TC94A34FG (“L”: acknowledged)
26
MP3 REQ
I
Request signal input to TC94A34FG
27
MP3 STB
O
Standby mode signal output to TC94A34FG (“L”: standby mode)
28
XTCN
O
Oscillation on/off control signal output to CXD3059AR (“H”: on)
29
IIC-CLK
I/O
IIC bus serial clock input/output
30
IIC-DATA
I/O
IIC bus serial data input/output
31
VMUTE
O
CDG video signal muting on/off control signal output (“H”: muting on)
32
CD POWER
O
Power on/off control signal output (“H”: power on)
33
CDG DET
I
CDG disc detection signal input (“H”: CDG disc detected)
34
EFFECTOR-SELECT
O
Effector circuitry bypass control signal output (“L”: bypass)
35
CDG RST
O
Reset signal output to the CDG decoder (“L”: reset) (Not used) (Open)
36
EFFECTOR-S0
O
Effector circuitry delay time selection bit 0 output
37
CD MUTE
O
CD analog signal muting on/off control signal output “H”: muting on)
38
OPEN SW
I
Eject detection signal input from CD mechanism deck
39
TBL-SENS
I
Disc tray position detection signal input from CD mechanism deck
40
E-3
I
Disc tray status detection signal input from CD mechanism deck
41
E-2
I
Disc tray status detection signal input from CD mechanism deck
42
E-1
I
Disc tray status detection signal input from CD mechanism deck
43
TM-F
O
Table motor control signal output
44
TM-R
O
Table motor control signal output
45
LMF
O
Table loading motor control signal output
46
LMR
O
Table loading motor control signal output
47
NO USE
I
Not used
48
A-HALF
I
Deck A cassette detection signal input (“H”: Cassette detected)
49
EFFECTOR-S1
O
Effector circuitry delay time selection bit 1 output
• IC401 M30622MEP-A75FPUO SYSTEM CONTROL (MAIN BOARD)
Ver. 1.1
60
HCD-GNX700/GNX800
Pin No.
Pin Name
I/O
Description
50
EFFECTOR-S2
O
Effector circuitry delay time selection bit 2 output
51
NO USE
I
Not used
52
EFFECTOR CTRL 1
O
Flanger on/off signal output (“H”: on)
53
A-TRIG
O
Deck A side trigger plunger drive signal output (“H”: plunger on)
54
CAPM-CONT
O
Capstan motor drive signal output
55
B-TRIG
O
Deck B side trigger plunger drive signal output (“H”: plunger on)
56
REC BIAS
O
Recording bias on/off control signal output (“H”: bias on)
57
TC-RELAY
O
Recording/playback selection signal output (“H”: recording “L”: playback)
58
ALC
O
Automatic limiter control signal output (“H”: limiter on)
59
PB-AB
O
“Deck A/B playback selection signal output (“H”: deck A “L”: deck B)
60
FAN HI SPEED
O
Fan speed control signal output (“L”: high speed)
61
UNDER VOLTAGE DET
I
Under-voltage protection detection input (“H”: under-voltage detected)
62
VCC
–
Power supply terminal (+3.3V)
63
OVER VOLTAGE
I
Over-voltage protection detection input (“L”: over-voltage detected)
64
VSS
–
Ground terminal
65
TC MUTE
O
Tape playback muting on/off control signal output (“H”: muting on)
66
LINE MUTE
O
Line muting on/off control signal output (“H”: muting on)
67
REC MUTE
O
Recording muting on/off control signal output (“H”: muting on)
68
SW RY
O
Sub woofer relay drive signal output (“H”: relay on)
69
STBY-RLY
O
Main power on/off control signal output (“H”: power on)
____________
70
PROT
I
Speaker protect detection signal input (“L”: protector on)
71
GC-RESET
O
Reset signal output to MB90M407PF (“L”: reset)
72
STBY-LED/FAN CTRL
O
POWER indicator LED drive signal output (“H”: green color “L”: red color)
73
DISPLAY-KEY
I
DISPLAY key press detection Interrupt signal input
74
POWER-KEY
I
POWER key press detection Interrupt signal input
______________________
75
HP-MUTE
O
Headphone muting on/off control signal output (“H”: muting on)
76
FR RELAY
O
Front speakers relay drive signal output (“H”:relay on)
77
LINK/SURR-RLY
O
Surround speaker mode control signal output (“H”: LINK “L”: MATRIX SURROUND1/2)
78
STK-MUTE
O
Power amplifier and sub woofer amplifier on/off control signal output (“H”: amplifier on)
79
M61530-DATA
O
Serial data output to M61530FP
80
M61530-CLK
O
Serial data transfer clock output to M61530FP
81
M61529-DATA
O
Serial data output to M61529FP
82
M61529-CLK
O
Serial data transfer clock output to M61529FP
83
SW ON LED
O
SUB WOOFER ON LED drive signal output (“H”: LED on)
84
ST-CE
O
PLL chip enable signal output to the tuner unit
85
MC DIN (ST)
I
PLL serial data input to the tuner unit
86
ST-CLK
O
PLL serial data transfer clock output to the tuner unit
87
MC DOUT (ST)
O
PLL serial data output from the tuner unit (“L”: tuned)
88
TUNED
I
Tuning detection signal input from the tuner unit
89
A SHUT
I
Shut off detection signal input from deck A side reel pulse detector
90
B SHUT
I
Shut off detection signal input from deck A side reel pulse detector
91
NO USE
I
Not used
92
MODEL-IN
I
Model setting input
93
DEST-IN
I
Destination input
94
B-HALF
I
Deck B cassette , forward side recording tab and reverse side recording tab detection signal input
95
SW VOL IN
I
Subwoofer volume level detect signal input from subwoofer volume jog
96
AVSS
–
Ground terminal (for A/D conversion)
97
THERMAL VACS
I
Temperature detection signal input from thermistor
98
VREF
I
A/D converter reference voltage input terminal (+3.3V)
99
AVCC
–
Power supply terminal (+3.3V) (for A/D conversion)
100
HP DET
I
Headphone connection detection signal input (“H”: headphone connected)
Pin No.Pin
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