Sony HCD-GNX660 / MHC-GNX660 Service Manual ▷ View online
HCD-GNX660
25
25
HCD-GNX660
• CIRCUIT BOARDS LOCATION
TUNER pack
MAIN board
SMASTER board
SPEAKER board
ADC board
MIC board
VOL board
PANEL board
POWER board
IR board
MOTOR (LD) board
SW board
SENSOR board
BD84 board
DRIVER board
CDG board
MOTOR (TB) board
• WAVEFORMS
– MAIN BOARD –
– BD84 BOARD –
– SMASTER BOARD –
0.15 Vp-p
0.2V/DIV, 0.2 msec/DIV
0.1V/DIV, 1 msec/DIV
0.9
±
0.4 Vp-p
0.2V/DIV, 0.5
µ
sec/DIV
0.4 Vp-p
1
IC101
wa
TEI
2
IC101
wd
FEI
3
IC101
ra
RFAC
0.5V/DIV, 20 nsec/DIV
0.8 Vp-p
20.3 nsec
1
IC800
2
2V/DIV, 50 nsec/DIV
4 Vp-p
81.3 nsec
1
IC03
1
– ADC BOARD –
2.7 Vp-p
30.5
µ
sec
3.3 Vp-p
2
µ
sec
1V/DIV, 10
µ
sec/DIV
1V/DIV, 1
µ
sec/DIV
10.5
µ
sec
50V/DIV, 10
µ
sec/DIV
50V/DIV, 10
µ
sec/DIV
67 Vp-p
10.5
µ
sec
82 Vp-p
1
IC401
qa
XC-OUT
2
IC401
qd
X-OUT
3
T101
5
TAPE REC only
4
T101
4
TAPE REC only
– CDG BOARD –
5.9 Vp-p
69.84
µ
sec
2V/DIV, 50 nsec/DIV
1
IC1001
tl
XI1
HCD-GNX660
26
26
HCD-GNX660
7-1. BLOCK DIAGRAM – CDG SECTION –
A
MAIN
SECTION
(Page 28)
OPTICAL PICK-UP
BLOCK
(KSM-215DCP/C2NP)
LD
DRIVER
Q10
CD MUTE
Q237,287
Q237,287
+3.3V
LD
GND
FOCUS
COIL
F+
F
T+
T
TRACKING
COIL
IC251
X171
16.9MHz
SL/SP MOTOR
DRIVER
12
6
11
13
14
VR
PD
15
16
17
18
4
26
23
2
20
MUTE
CH2OUT-F
CH1FIN
OUT
VREF
CH1RIN
CH2FIN
SFDR
OPIN+
CH2OUT-R
CH1OUT-R
CH1OUT-F
CH4OUT-R
CH4OUT-F
CH3OUT-F
CH3OUT-R
M
M
M101
(SPINDLE)
M102
(SLED)
S101
(LIMIT)
VCC
VC
A
B
C
D
E
F
DETECTOR
A
B
E
19
F
20
LD
36
PD
37
TFDR
11
FFDR
13
CH3FIN
9
SSTP
7
MDP
6
95
XTACN
100
XRST
102
DATA
104
XLAT
105
CLOCK
86
AOUT2
81
AOUT1
61
PCMD1
62
LRCKI
63
LRCK
65
PCMD
IC301
MP3 DECODER
SYSTEM
IC401 (1/5)
CONTROL
21
40
SDO0
11
LRCKIA
16
SFSY/LRCK1B
19
SDI0
14
77 XTAO
78 XTAI
55
VDD
VDD
VDDM
26
25 VC
27
C
28
D
29
107
SENS
XTACN
XRST
DATA
XLT
CLOCK
SENS
TRDR
12
22
SRDR
CH3RIN
10
CH2RIN
FRDR
14
XRST
100
66
BCK
60
BCK1
BCKIA
15
SBSY/BCK1B
18
5
+3.3V
IC303
7
5
1
3
26
27
25
7
5
24
23
22
49
48
47
46
42
45
44
6
19
21
43
41
82
3
2
1
28
35
34
STANBY
36
PO11/BUCK/AD14
8
MIACK
7
MICK
6
MIDIO
4
MICS
5
MILP
2
RESET
41
SRMSTB
115
SCOR
SCOR
REG
CD MUTE DRIVE
Q307, 308
IC101
RF AMP, DSP, DAC
IC1002
DRAM
IC1001
VIDEO D/A
IC1003
+5V REG
IC1006
VIDEO BUFFER
25,27,29,30
VA0-7
15-22
VD0-3
14
4
26
23
RAS
CAS
A0-7
DQ1-4
X1002
14.31818MHz
60
XO1
59
XI1
+B SWITCH
Q1007,1008
NO401
CN402
IIC-CLK
IIC-DATA
3
4
CNVSS
RESET
J1001
TXD1
RTS1
ON BOARD
PROGRAM
PROGRAM
CLK1
RXD1
CN VSS
RESET
VIDEO
OUT
VMUTE
13
3
WE
28
22
CE
3
2
6
9
7
8
RAS
CAS
WE
CE
3
98
DATA
SBSO
5
110
SFSY
WFCK
2
99
CLCK
EXCK
6
MUTE
56
PDOWN
1,2,24,25
9-12,14-17
9
8
5
4
Q1004
SBSY
Q1005,1009
6
3
4
1
2
11
10
13
12
IC1005
Q1010
VCC
55
SENTSC
54
RESET
Q1002,1006
52
DEN
37
GDET
MUTE DATA
HALT_CLK
PAL/_NTSC
CDG-RST
EVER+3.3V
CDG-DET
CDG-DET
MUTE DATA
CDG-RST
44
VDOUT
Q1001
33 31 32 12
MUTE DATA
HALT_CLK
VMUTE
CDG-POWER
CDG-RST
CDG-DET
RESET
VMUTE
CDG-POWER
CDG RST
CDG-DET
RESET
9
CNVSS
CNVSS
VMUTE
CDG-POWER
1
4
3
2
PWR
SAVE
SAVE
VIN
VSAG
6
VCC
VOUT
1
3
VIN
VOUT
: CD
: CDG
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
: VIDEO
R-CH
CD-L
MP3 STB
MP3 REQ
XTACN
MP3 REQ
MP3 STB
MP3 CLK
MP3 CLK
MP3 ACK
MP3 ACK
MP3 DATA OUT
MP3 DATA
MP3 LP
MP3 LP
MP3 CS
MP3 RST
MP3 CS
MP3 RST
MP3 DATA IN
SCOR
SENS
CD-CLK
XLAT
CD-DATA
XRST
XTACN
SCOR
SENS
CLOCK
XLT
DATA
XRST
CD MUTE
LM-R
LM-F
TM-R
TM-F
TBL_SENS
E-1
E-2
E-3
OPEN SW
30
IIC-DATA
29
IIC-CLK
IC701
TABLE LOADING
MOTOR DRIVER
4
2
9
7
RIN
FIN
OUT1
OUT2
IC712
TABLE MOTOR DRIVER
4
2
9
7
RIN
FIN
OUT1
OUT2
M751
(TABLE LOADING)
M741
(TABLE)
S751
(OPEN)
ROTARY
ENCODER
INVERTER
M
M
IC731
TBL ADDRESS
SENS
S711
E-3
E-2
E-1
M+9V
Q731
HCD-GNX660
27
27
HCD-GNX660
7-2. BLOCK DIAGRAM – TAPE/TUNER SECTION –
E
MAIN
SECTION
(Page
28
)
D
MAIN
SECTION
(Page
28
)
C
MAIN
SECTION
(Page 28)
ST-L
REC-OUT-L
TAPE
MECHANISM
DECK
75
A TRIG
DRIVE
Q122, 123
: PLAYBACK (DECK B)
: PLAYBACK (DECK A)
R-CH
FM/AM TUNER UNIT
CN101
ANTENNA
ST-L
FM ANT
AM ANT
AM ANT
ST-R
TUNED
ST-DIN
ST-DOUT
ST-CLK
ST-CE
FM 75
COAXIAL
CAP M+
BTRGM+
ATRGM+
AHALF
BHALF
B SHUT
A SHUT
A SHUT
REC(FWD)
CAPM-CNT
B-TRIG
A-TRIG
TC-RELAY
A-HALF
B-HALF
B SHUT
A SHUT
A SHUT
AM
EQ OUT1
A
B
TUNED
ST-DOUT
ST-DIN
ST-CLK
ST-CE
ST-CE
76
78
79
80
15
26
DI1
66 IO-EXP-DATA-OUT
2
RESET
68 IO-EXP-RST
3
CLK
69 IO-EXP-CLK
4
LATCH
5
TC-MUTE
70 IO-EXP-LAT
17
90
89
91
63
21
REC-MUTE
7
REC BIAS
20
17
19
18
40
38
36
39
37
PB OUT1
TAI1
REC IN1
AIN1
BIN1
IC101(1/2)
DECK A/B SELECT,
PB/REC EQUALIZER AMP
IC401(2/5)
SYSTEM CONTROL
(CD/TAPE MECHANISM CONTROL)
IC403(1/2)
SIGNAL IN/OUT CONTROL
REC-OUT1
EQ
TC-PB-L
TEST
CONNECTOR
CN111
R-CH
R-CH
R
L
1
3
MUTE
Q103
MUTE DRIVE
Q303, 304
PB
HEAD
DECK-A
DECK-B
BIAS OSC
Q101
BIAS
TRAP
SWITCH DRIVE
Q107, 108
SWITCH DRIVE
Q110, 111
R-CH
R-CH
Q166
Q154, 155
Q109
L – CH
R – CH
R-CH
C174, L104
BIAS+9V
REC/PB
HEAD
ERASE
HEAD
Q113,114
T101
L – CH
R – CH
R-CH
MUTE
Q175
TC REC
MUTE DRIVE
Q301, 302
: TUNER (FM/AM)
: RECORD
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
B TRIG
DRIVE
Q118, 119
CAP MOTOR
DRIVE
Q120, 121
Ver. 1.2
HCD-GNX660
28
28
HCD-GNX660
7-3. BLOCK DIAGRAM – MAIN SECTION –
AMP
SECTION
(Page 29)
(Page 29)
B
TAPE/TUNER
SECTION
(Page 27)
D
(Page 26)
A
CDG SECTION
MCU
INTERFACE
SURROUND
INPUT
SELECT
SWITCH
COMMAND
+
+
RV1402
IC1401
MIC AMP
IC101(2/2)
INPUT SELECT SWITCH,
GRAPHIC EQUALIZER CONTROL,
ELECTRICAL VOLUME
IC401(3/5)
SYSTEM CONTROL
DATA
CLK
REC-OUT-L
CD-L
J1400(1/3)
J1450(2/3)
59
34
35
5
J501
R-CH
R-CH
+
R-CH
R-CH
FRONT-L
R-CH
L
R
AUDIO
IN
MIC 1
ECHO
LEVEL
RV1400
MIC 1
LEVEL
RV1401
MIC 2
LEVEL
14
23
24
28
30
31
29
MIC
3
MIC OUT
IC1400
DIGTAL ECHO
MC1P
MC2P
VACS IN
88
J1450(1/3)
J1400(2/3)
J1450(3/3)
J1400(3/3)
MIC 2
15
16
+
+
+
PRE
LPF
POST
LPF
ADPCM
ENCODE
ADPCM
DECODE
ADC
DAC
S/H
DELAY
25
29
23
5
6
7
DA OUT
POOUT
AD IN
ALC
ALC
MIC VOL
ECHO
VOL
MIC
VOL
VOL
VOLUME
CONTROL
VOL1
VOL2
VOL3
M61537-CLK
84
M61537-DATA
83
3
7
FRONT-R
37
SW
TONE
L + R
53
J506
D-LIGHT
SYNC OUT
L+R
D+4V
2
3
1
(Page 27)
E
TAPE/TUNER SECTION
ST-L
1
C
(Page 27)
TAPE/TUNER SECTION
TC-PB-L
4
: TUNER (FM/AM)
: CD
: TAPE PLAY
: RECORD
: MIC
: AUDIO
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
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