Sony HCD-GN1300D / MHC-GN1300D Service Manual ▷ View online
HCD-GN1300D
73
54
STBY RELAY
O
Main power on/off control signal output. (“H”:power on)
55
STK-MUTE
O
Power amplifi er and sub woofer amplifi er on/off control signal output. (“H”: amplifi er on)
56
PROTECTOR
I
Speaker protect detection signal input from speaker protect circuit. (“H”:protector on)
57
NO-USE
I
Unused port (Pull to GND)
58
ST-TUNED
I
“TUNED” input signal from Tuner pack.
59
MTK-KRMOD
I
Karaoke mode detection input.
60
ST-CE
O
PLL chip enable signal output to the TUNER unit.
61
ST-DOUT
I
PLL serial data output from the tuner unit.
62
VCC
–
Power supply terminal. (+3.3V)
63
ST-DIN
O
PLL serial data input to the tuner unit
64
VSS
–
Ground terminal.
65
ST-CLK
O
PLL serial data transfer clock signal output to the tuner unit.
66
MTK POWER MONITOR
I
Micom monitoring the MTK power supply pin.(A/D input)
67
NO-USE
I
Unused port (pull to GND)
68
OVER VOLTAGE DETECT
I
Over-voltage protection detection input terminal.(A/D input)
69
VACS IN
I
Spectrum analyzer drive signal input from Audio IC signal. (A/D input)
70
POWER ILLUM & METER
INPUT
I
Audio signal level for Meter level and power illum detect (A/D input).
71
NO-USE
I
Unused port (Pull to GND)
72
AD POWER CONTROL
O
Micom AD pull up supply control
73
REC BIAS
O
Recording bias on/off control signal output. (“H”: bias on)
74
POWER KEY
I
Power key press detection signal. (interrupt input)
75
REC MUTE
O
Recording muting on/off control signal output. (“H”:muting on)
76
FAN CONTROL
O
Fan on/off control port.
77
MIC STATUS
O
Mic status output to DVD motherboard.
78
VIDEO-OUT-SW
O
Composite video output switching output control. (“L”: DVD VIDEO output/ “H”:
VIDEOVIDEO input)
VIDEOVIDEO input)
79
CAPM-CNT2
O
Capstan motor drive signal output.
80
B-TRIG
O
Deck side trigger plunger drive signal output. (“H”:plunger on)
81
B-SHUT
I
Shut off detection signal input from deck A side reel pulse detector. (A/D input)
82
B-HALF
I
Deck B cassette detection, forward side recording tab detection and reverse side recording
tab detection signal input terminal. (A/D input)
tab detection signal input terminal. (A/D input)
83
TC-RELAY
O
Recording/playback selection signal output. (“H”:recording “L”:playback)
84
METER_CTRL4
O
Meter motor control port
85
METER_CTRL3
O
Meter motor control port
86
METER_CTRL2
O
Meter motor control port
87
METER_CTRL1
O
Meter motor control port
88
METER SW
I
Meter position switch (Initial & End Position) for calibration purpose.
89
AD-KEY-1
I
Key input terminal for AD key line 1.
90
AD-KEY-0
I
Key input terminal for AD key line 0.
91
AD-KEY-2
I
Key input terminal for AD key line 2.
92
VIDEO-MUTE
O
Video muting on/off control signal output. (“L”: muting on)
93
DEST-IN
I
Destination setting terminal. (A/D input)
94
OPERATION DIAL
I
Jog dial pulse input from OPERATION DIAL encoder (A/D input)
95
MASTER VOLUME
I
Jog dial pulse input from the VOLUME encoder. (A/D input)
96
Avss
I
Ground terminal.(for A/D conversion)
97
STBY LED
O
LED drive signal output of POWER indicator.
98
VREF
I
A/D Converter reference voltage input terminal.(+3.3V)
99
AVCC
–
Power supply terminal. (+3.3V) (for A/D conversion)
100
METER BACKGROUND
LED
O
LED drive signal output of Meter backlight LED
HCD-GN1300D
74
DMB18 BOARD (3/5) IC102 CXD9894R-A
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGITAL SERVO PROCESSOR)
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGITAL SERVO PROCESSOR)
Pin No.
Pin Name
I/O
Desciption
1
OSN
O
RF offset cancellation capacitor connecting pin
2
RFGC
O
RF AGC loop capacitor connecting for DVD-ROM
3
IREF
I
Current reference input
4
AVDD3
–
Analog power supply pin (+3.3 V)
5
AGND
–
Analog ground
6
DVDA
I
AC coupled input path A
7
DVDB
I
AC coupled input path B
8
DVDC
I
AC coupled input path C
9
DVDD
I
AC coupled input path D
10
DVDRFIP
I
AC coupled DVD RF signal input RFIP
11
MA
I
DC coupled main-beam RF signal input A
12
MB
I
DC coupled main-beam RF signal input B
13
MC
I
DC coupled main-beam RF signal input C
14
MD
I
DC coupled main-beam RF signal input D
15
SA
I
DC coupled sub-beam RF signal input A (Not used in this set)
16
SB
I
DC coupled sub-beam RF signal input B (Not used in this set)
17
TNI
I
3 beam satellite PD signal negative input
18
TPI
I
3 beam satellite PD signal positive input
19, 20
MDI1, MDI2
I
Laser power monitor input
21,22
LDO2, LDO1
O
Laser driver output
23
SVDD3
–
Analog power supply pin (+3.3 V)
24
CSO
O
Central servo output (Not used in this set)
25
RFLVL
O
RFRP low pass output (Not used in this set)
26
SGND
–
Ground pin for analog circuitry
27
V2REFO
O
Reference voltage 2.8 V output
28
V2O
O
Reference voltage 2.0 V output
29
VREFO
O
Reference voltage 1.4 V output
30
FEO
O
Focus error monitor output (Not used in this set)
31
TEO
O
Tracking error monitor output (Not used in this set)
32
TEZISLV
O
TE slicing level output
33
OP_OUT
O
SPFG via op amp (Op amp output)
34
OP_INN
I
Loop back input (Op amp negative input)
35
OP_INP
I
Raw SPFG signal input (Op amp positive input)
36
DMO
O
Disc motor control output. PWM output
37
FMO
O
Feed motor control output. PWM output
38
TROPENPWM
O
Tray PWM output/tray open output (Not used in this set)
39
IOPMON
I
General A/D input
t Iop monitor
40
TRO
O
PDM output of tracking servo compensator
41
FOO
O
PDM output of focus servo compensator
42
AGND18
–
Analog ground pin for DMPLL
43
AVDD18
–
Analog power supply pin (+1.8 V) for DMPLL
44
USB_DP
I/O
USB port DPLUS pin
45
USB_DM
I/O
USB port DMINUS pin
46
USB_VDD3
–
Power supply pin (+3.3 V) for USB
47
USB_VSS
–
Ground pin for USB
48
PAD_VRT
I/O
USB generating reference current
49
USB_VDD18
–
Power supply pin (+1.8 V) for USB
50
USB_VSS
–
Ground pin for USB
51
DIR_ERROR
I
PLL lock error, input data error detection from DIR (L: non error)
52
DIR_AUDIO
I
PCM/non PCM detection input from DIR (L: PCM)
53
LIMITSW
I
Limit switch detection input
54
MSW
O
Media switch output (L: CD, H: DVD)
55
DVDD18
–
Power supply pin (+1.8 V) for internal digital circuitry
56 to 62
HA2 to HA8
O
Host address output bit 2 to 8
HCD-GN1300D
75
63, 64
HA18, HA19
O
Host address output bit 18, 19
65
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
66
XWR
O
Write enable output (active Low)
67 to 74
HA16 to HA9
O
Host address output bit 16 to 9
75
HA20
O
Host address output bit 20
76
XROMCS
O
Chip select output (active Low)
77
HA1
O
Host address output bit 1
78
XRD
O
Read enable output (active Low)
79, 80
HD0, HD1
O
Host data output bit 0, 1
81
DVSS
–
Ground pin for internal digital circuitry
82 to 86
HD2 to HD6
O
Host data output bit 2 to 6
87
HA21
O
Host address output bit 21
88
RESERVED
O
Not used. (Open)
89
HD7
O
Host data output bit 7
90
DVSS
–
Ground pin for internal digital circuitry
91
HA17
O
Host address output bit 17
92
HA0
O
Host address output bit 0
93
DVDD18
–
Power supply pin (+1.8 V) for internal digital circuitry
94
FWD
O
Forward signal output for loading motor driver (Not used in this set)
95
REV
O
Reserve signal output for loading motor driver (Not used in this set)
96
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
97
IFSDO
O
External CPU serial data output (H/W method)
98
IFCK
O
External CPU serial clock output (H/W method)
99
xIFCS
O
External CPU serial chip select output (active Low, H/W method)
100
IFSDI
I
External CPU serial data input (H/W method)
101
SCL
O
I2C clock output for EEPROM
102
SDA
O
I2C data output for EEPROM
103
CKSW
I
Chucking switch detection input (Not used in this set)
104
OCSW
I
Open/close switch detection input (Not used in this set)
105
RXD
I
Hardwired RS232C RXD input
106
TXD
O
Hardwired RS232C TXD output
107
ICE
I
ICE mode enable input (Not used in this set)
108
xSYSRST
I
MT1389 reset input (active Low)
109
RESERVED
I
Not used. (Open)
110
xIFBSY
I
External CPU ready/busy interrupt signal input (L: ready, H: busy)
111
DQM0
O
Mask for DRAM output byte 0
112
EEWP
O
EEPROM write protect control output (L: write allowed)
113 to 117
RD7 to RD3
O
DRAM data output bit 7 to 3
118
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
119 to 121
RD2 to RD0
O
DRAM data output bit 2 to 0
122 to 129
RD15 to RD8
O
DRAM data output bit 15 to 8
130
TSD_M
I
Thermal shutdown monitor input
131
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
132
DQM1
O
Mask for DRAM output byte 1
133
_RWE
O
DRAM write enable output
134
_CAS
O
DRAM column address strobe output
135
_RAS
O
DRAM row address strobe output
136
_RCS
O
DRAM chip select output
137, 138
BA0, BA1
O
DRAM bank address output 0, 1
139
RA10
O
DRAM address output bit 10
140, 141
RA0, RA1
O
DRAM address output bit 0, 1
142
DVDD18
–
Power supply pin (+1.8 V) for internal digital circuitry
143, 144
RA2, RA3
O
DRAM address output bit 2, 3
145
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
146
DRCLK
O
DRAM clock output
147
CKE
O
DRAM clock enable output
148
DVSS
–
Ground pin for internal digital circuitry
HCD-GN1300D
76
149
RA11
O
DRAM address output bit 11
150 to 155
RA9 to RA4
O
DRAM address output bit 9 to 4
156
DVDD3
–
Power supply pin (+3.3 V) for internal digital circuitry
157
MUTE123
O
Mute signal output for other motor drivers (SL, TRK, FCS)
158
MUTE
O
Mute signal output for spindle motor driver
159
DDC_DA
I/O
HDMI DDC line SDA
160
DVDD18
–
Power supply pin (+1.8 V) for internal digital circuitry
161
DDC_CLK
I/O
HDMI DDC line CLK
162
HTPLG
I
Hot plug detection input
163
AGND3
–
Analog ground pin for HDMI TX
164
EXT_RES
I
External resistor for HDMI TX
165, 166
AVDD3
–
Analog power supply pin (+3.3 V) for HDMI TX
167
EXT_CAP
I
External capacitor for HDMI TX
168
AGND3
–
Analog ground pin for HDMI TX
169
AGND18
–
Analog ground pin for HDMI TX
170
TXCN
O
Negative TX CLK output (Not used in this set)
171
TXCP
O
Positive TX CLK output (Not used in this set)
172
AVDD18
–
Analog power supply pin (+1.8 V) for HDMI TX
173
TX0N
O
Negative TX 0CH output (Not used in this set)
174
TX0P
O
Positive TX 0CH output (Not used in this set)
175
AGND18
–
Analog ground pin for HDMI TX
176
TX1N
O
Negative TX 1CH output (Not used in this set)
177
TX1P
O
Positive TX 1CH output (Not used in this set)
178
AVDD18
–
Analog power supply pin (+1.8 V) for HDMI TX
179
TX2N
O
Negative TX 2CH output (Not used in this set)
180
TX2P
O
Positive TX 2CH output (Not used in this set)
181
AGND18
–
Analog ground pin for HDMI TX
182
R/Cr/Pr
O
Red or CR output
183
B/Cb/Pb
O
Blue or CB output
184
DACVSSA
–
Ground pin for video DAC circuitry
185
Y/G
O
Green or Y output
186
DACVDDA
–
Power supply pin (+3.3 V) for video DAC circuitry
187
CVBS
O
Analog composite output
188
DACVSSB
–
Ground pin for video DAC circuitry
189
C
O
Analog chroma output
190
DACVDDB
–
Power supply pin (+3.3 V) for video DAC circuitry
191
Y
O
Analog Y output
192
DACVSSC
–
Ground pin for video DAC circuitry
193
FS
I
Full scale adjustment input
194
VREF
I
Bandgap reference voltage (Not used in this set)
195
DACVDDC
–
Power supply pin (+3.3 V) for video DAC circuitry
196
VBUS_OE
O
VBUS control output enable output (L: output disable, H: output enable)
197
VBUS_OC
I
VBUS control over current input (L: over, H: non over)
198
SCORE
I
Calculation input of SCORE
199
DAC_SDA
I
SDA input from DIR
200
DAC_SCL
I
SCL input from DIR
201
SPLRCK
I
LRCK input from DIR (Fixed at L in this set)
202
SPDATA
I
Audio data input from DIR (Fixed at L in this set)
203
ACLK
O
Master clock output for audio DAC
204
ABCK
O
Audio bit clock output
205
ALRCK
O
Audio left/right channel clock output
206
ADIN
I
External analog audio data input
207
DVDD3
–
Power supply pin (+3.3 V) for video DAC digital circuitry
208
MIC
I
Karaoke microphone detection signal input (L: mic removed, H: mic exist)
209
WIDE
O
Voltage select output signal for S terminal (L; 4:3, H; 16:9)
210
RGB_SEL/DSEL
O
RGB select output (L: RGB enable, H: RGB disable)
211
TRG_SW
I
Slot in mechanism trigger switch detection input (Fixed at L in this set)
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