Sony HCD-EC98P / MHC-EC98P / MHC-EC98PI Service Manual ▷ View online
HCD-EC98P
41
– MAIN Board –
IC602 BD3499FV-E2
1
A1
18 BCB1
17 BCA1
16 BCA2
17 BCA1
16 BCA2
20 SB2
19 OUT2
22 SB1
21 SR
21 SR
24 VCC
23 OUT1
26 SDA
25 SCL
25 SCL
28 FIL
27 GND
27 GND
15 BCB2
2
A2
3
B1
5
C1
6
C2
4
B2
11
VOL1
12
VOL2
13
TC2
14
TC1
7
D1
8
D2
9
SEL2
10
SEL1
INPUT
SELECTOR
TREBLE/
BASS
INVERTER
VOLUME
INPUT
GAIN
SURROUND
PC BUS
LOGIC
IC701 BD9701CP-V5
VCC
1
OUT
2
GND
3
INV
4
STBY
5
REGULATOR
STANDBY
VOLTAGE
REFERENCE
HCD-EC98P
42
IC801 LV23003VA
1
AM RF-IN
3
FM-MIX
2
REG
6
VCC1
4
GND1
AM
RF
AM
MIX
AM
DET
AM
IF
FM
DET
FM
IF
SD
FF
VCO
FF
FF
ST
TRIG
STSW
FM
MIX
FM
OSC
AM
OSC
OSC
BUFFER
FM
S-METER
DECODER
PHASE
COMPARATOR
MUTE
PROGRAMMABLE
DIVIDER
REFERENCE
DIVIDER
UNLOCK
DETECTOR
SWALLOW
COUNTER
POWER ON
RESET
DATA SHIFT
REGISTER
LATCH
PHASE
DETECTOR
CHARGE
PUMP
UNIVERSAL
COUNTER
5
AM-MIX
7
AMIF-IN
8
FMIF-IN
9
P-DET
10
P-COMP
11
FM-DET
12
L-OUT
13
R-OUT
14
VSS
FM
RF
36 FM RF-IN
35 GND2
34 FMRF-OUT
33 VCC2
35 GND2
34 FMRF-OUT
33 VCC2
30 BO2
29 BO1
29 BO1
32 FM-OSC
31 AM-OSC
28 LP-OUT
27 LP-IN
27 LP-IN
23 FMDET-OUT
15
CE
16
DI
17
CL
18
DO
22 MPX-IN
19 XIN
20 XOUT
21 VDD
26 PD
25 AGC
25 AGC
24 AMDET-OUT
LOW-PASS
FILTER
AGC
IF
BUFFER
PIROT
DET
CCB
I/F
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
– PANEL Board –
IC303 BA6956AN
HCD-EC98P
43
• IC Pin Function Description
CD BOARD IC101 TC94A70FG-006 (CD-MP3 PROCESSOR)
CD BOARD IC101 TC94A70FG-006 (CD-MP3 PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZi
I
RF ripple zero crossing signal input terminal
3
RFRP
O
RF ripple signal output terminal
4
SBAD/RFDC
O
Sub beam addition signal or RF peak detection signal output terminal Not used
5
FEi
O
Focus error signal output terminal Not used
6
TEi
O
Tracking error signal output terminal
7
TEZi
I
Tracking error zero crossing signal input terminal
8
AVDD3
-
Power supply terminal (+3.3 V)
9
FOo
O
Focus coil drive signal output terminal
10
TRo
O
Tracking coil drive signal output terminal
11
VREF
I
Reference voltage (+1.65V) input terminal
12
FMo
O
Sled motor drive signal output terminal
13
DMo
O
Spindle motor drive signal output terminal
14
VSSP3
-
Ground terminal
15
VCOi
I
VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3 V)
17
VDD1
-
Power supply terminal (+1.5 V)
18
VSS
-
Ground terminal
19
FGiN
I
FG signal input terminal Not used
20
IO0 (/HSO)
I
Disc inner position detection signal input terminal
21
IO1 (/UHSO)
O
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.9344 MHz)
24
XO
O
System clock output terminal (16.9344 MHz)
25
XVDD3
-
Power supply terminal (+3.3 V)
26
DVSS3
-
Ground terminal
27
RO
O
Audio data (R-ch) output to the input selector
28
DVDD3
-
Power supply terminal (+3.3 V)
29
DVR
O
Reference voltage (+1.65V) output terminal
30
LO
O
Audio data (L-ch) output to the input selector
31
DVSS3
-
Ground terminal
32
VDDT3
-
Power supply terminal (+3.3 V)
33
VSS1
-
Ground terminal
34
VDD1
-
Power supply terminal (+1.5 V)
35
VDDM1
-
Power supply terminal (+1.5 V)
36
SRAMSTB
I
S-RAM standby mode control signal input terminal Fixed at "L" in this set
37
XRST
I
Reset signal input from the system controller "L": reset
38, 39
BUS0, BUS1
I
Serial data input from the system controller
40
BUS2 (SO)
I
Serial data input from the system controller
41
BUS3 (SI)
I
Serial data input from the system controller
42
BUCK (CLK)
I
Serial data transfer clock signal input from the system controller
43
XCCE
I
Chip enable signal input from the system controller
44
TEST
I
Setting terminal for test mode Normally fi xed at "L"
45
IRQ
I
Interrupt request signal input terminal Not used
46
AoUT3 (PO4)
O
Request signal output terminal Not used
47
AoUT2 (PO5)
O
Audio data output terminal Not used
48
PIO0
O
Request signal output to the system controller
49, 50
PIO1, PIO2
O
Not used
51
PIO3
I
Gate signal input terminal Not used
52
VSS1
-
Ground terminal
53
VDDT3
-
Power supply terminal (+3.3 V)
54
SBSY
O
Subcode block sync signal output to the system controller
55
SBOK/FOK
O
Not used
56
IPF
O
Not used
57
SFSY/LOCK
O
Not used
58
ZDET
O
Zero detection signal output terminal Not used
59
GPIN
I
Not used
60
MS
I
Microcomputer interface mode selection signal input terminal Fixed at "H" in this set
HCD-EC98P
44
Pin No.
Pin Name
I/O
Description
61
DOUT (PO6)
O
Digital audio data output terminal Not used
62
AOUT (PO7)
O
Audio data output terminal Not used
63
BCK (PO8)
O
Bit clock signal output terminal Not used
64
LRCK (PO9)
O
L/R sampling clock signal output terminal Not used
65
AIN (PI4)
I
Digital audio data input terminal Not used
66
BCKi (PI5)
I
Bit clock signal input terminal Not used
67
LRCKi (PI6)
I
L/R sampling clock signal input terminal Not used
68
VDD1
-
Power supply terminal (+1.5 V)
69
VSS
-
Ground terminal
70
AWRC
-
Not used
71
PVDD3
-
Power supply terminal (+3.3 V)
72
PDO
O
Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS
O
TMAX detection signal output terminal Not used
74
TMAX
O
TMAX detection signal output terminal
75
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
76
LPFo
O
Signal output from the operation amplifi er for PLL loop fi lter
77
PVREF
I
Reference voltage (+1.65V) input terminal
78
VCOF
O
VCO fi lter output terminal
79
PVSS3
-
Ground terminal
80
SLCo
O
EFM slice level output terminal
81
RFi
I
RF signal input terminal
82
RFRPi
I
RF ripple signal input terminal
83
RFEQo
O
EFM slice level output terminal
84
VRo
O
Reference voltage (+1.65V) output terminal
85
RESiN
O
External resistor connection terminal
86
VMDiR
O
Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR
O
Low-pass fi lter terminal for RFEQO offset correction
88
AGCi
I
RF signal amplitude adjustment amplifi cation input terminal
89
RFo
O
RF signal generation amplifi cation output terminal
90
RVDD3
-
Power supply terminal (+3.3 V)
91
LDo
O
Laser diode on/off control signal output to the automatic power control circuit
"H": laser diode on
"H": laser diode on
92
MDi
I
Light amount monitor input from the laser diode of optical pick-up block
93
RVSS3
-
Ground terminal
94
FNi2 (C)
I
Main beam (C) input from the optical pick-up block
95
FNi1 (A)
I
Main beam (A) input from the optical pick-up block
96
FPi2 (D)
I
Main beam (D) input from the optical pick-up block
97
FPi1 (B)
I
Main beam (B) input from the optical pick-up block
98
TPi (F)
I
Sub beam (F) input from the optical pick-up block
99
TNPC
O
External capacitor connection terminal
100
TNi (E)
I
Sub beam (E) input from the optical pick-up block
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