Sony HCD-D890AV / HCD-XB55AV / HCD-XB80AV / HCD-XB88AV / LBT-D890AV / LBT-XB55AV / LBT-XB80AV Service Manual ▷ View online
– 83 –
– 84 –
6-29. PRINTED WIRING BOARD – SURROUND SECTION –
• See page 18 for Circuit Boards Location.
HCD-D890AV/XB55AV/XB80AV/XB88AV
6-30. SCHEMATIC DIAGRAM – SURROUND SECTION –
(Page 49)
(Page 61)
(Page 62)
(Page 44)
(Page 59)
(Page 60)
– 85 –
• Tuner section
6-31. IC BLOCK DIAGRAMS
IC21 LC72130
IC41 LA1838
1
2
3
4
5
6
7
8
XIN
B03
CE
IFIN
AOUT
2
AIN1
AIN2
D1
CL
B04
D0
B01
I01
B02
XOUT
PD1
VSS
PD2
FMIN
AMIN
AOUT1
VDD
I02
B05
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PHASE DETECTOR
CHARGE PUMP
SWALLOW COUNTER
1/16.1/17 4bits
SWALLOW COUNTER
1/16.1/17 4bits
POWER
ON
RESET
1/2
C B
I / F
I / F
REFERENCE
DIVIDER
REFERENCE
DIVIDER
C B
I / F
I / F
2
DATA SHIFT REGISTER
LATCH
ALC
BUFF
AM
OSC
AM
MIX
AM
RF. AMP
AGC
IF
DET
S-CURVE
AM/FM
IF
BUFF
REG
TUNING
DRIVE
GND
VCC
PILOT
DET
VCO
FF
STEREO
DRIVE
STEREO
SW
MUTE
FF
FF
FM
IF
FM
DET
DECODER
ANTI BIRDIE
1
2 3
4
5
6
7
9
8
20
19
18
17 16
15
14
11
10
21
22
23
24
25
27
26
29
30
OSC.BUFF
FM-SD.ADJ
AM-OSC
REG
FM-AFC
AM-RF-IN
AGC
MPX-IN
FM-DET OUT
AM-DET OUT
OUT L
OUT R
AMP-IN L
AMP-IN R
AMP OUT R
AMP OUT L
VCO-STOP
STEREO
AM/FM
AM. SD
FM. SD
AM. SD ADJ
IF-BUFF
MUTE
VCC
FM DET
FM-IN
AM-MIX
FM-IF
AM-IF
GND
TUNED
S METER
FM
S METER
AM
COMP
SD
AM
12
13
PHASE
DET
28
– 86 –
IC1701 IR3R42
IC1752 BU1922
OSC
1/2
1/2
PHASE
WAVEFORM
SEP.
GATE
SAMPLE
& HOLD
BUFFER
REGULATOR
PHASE
COMPARATOR
PHASE
COMPARATOR 2
MUTE
TRIGGER
1
2
3
4
5
6 7
8
9
10
20
19 18
17
16
15
14 13
12
11
AMP
AMP
AMP
LAMP
VCO STOP
ST
LOUT
ROUT
LHC
RHC
POUT
IN
VCC
GND
VCO
LPF1A
LPF1B
DETIN
LPF2A
LPF2B
SUBIN
SUBOUT
MON
QUALITY BIT
GENERATOR
DEFFERENTIAL
DECODER
BIPHASE
SYMBOL
SYMBOL
DECODER
OSCILLATOR
AND
DIVIDER
57kHz
BANDPASS
(8th ORDER)
CONTAS LOOP
VARIABLE AND
FIXED DIVIDER
FIXED DIVIDER
REFERENCE
VOLTAGE
ANTI-
ALIASING
FILTER
CLOCKED
COMPARATOR
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
RECONSTRUCTION
FILTER
14
15
16
13
12
11
10
9
3
2
1
4
5
6
7
8
CLOCK REGENERATION
AND SYNC
VP1
RDCL
TS7
OSCO
OSCI
V
DDD
V
SSD
TEST
TSTL
D
QUAL
RDDA
Vref
MUX
V
DDA
V
SSA
CIN
SCOUT
– 87 –
• CD section
IC101 CXA1992AR
–
+
+
–
–
+
+
1
2
3
4
5
6
7
8
9
10
20
19
17
16
15
14
13
12
11
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
52
51
50
49
48
47
+
–
+
–
+
–
+
–
–
+
–
+
–
+
+
–
+
–
+
–
+
–
–
–
+
+
–
–
+
–
+
+
–
+
–
–
+
–
–
+
–
+
–
+
–
–
+
–
+
–
+
–
+
+
–
+
–
–
+
+
–
–
+
–
+
+
–
–
18
–
+
–
+
–
+
+
–
+
–
–
+
Charge
up
FEO
FEI
FDFCT
FGD
FLB
FE_O
FE_M
SRCH
TGU
TG2
FSET
TA_M
TA_O
SL_P
SL_M
SL_O
ISET
VCC
VCC
LOCK
CLK
XLT
DATA
XRST
C. OUT
SENS1
SENS2
FOK
CC2
CC1
CB
CP
RF_I
RF_O
RF_M
RFTC
LD
PD
PD1
PD2
FE_BIAS
F
E
EI
VEE
TEO
LPFI
TEI
ATSC
TZC
VC
FZC
TM2
VEE
VEE
TM3
TM5
TM4
TM6
VCC
VCC
TM7
ISET
TTL
↓
IIL
IIL
↓
TTL
IIL
↓
TTL
IIL DATA REGISTER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
INPUT SHIFT REGISTER
ADDRESS DECODER
SENS SELECTOR
OUTPUT DECODER
DFCTO
IFB1-6
BAL1-4
TOG1-4
BAL1-4
TOG1-4
FS1-4
TG1-2
TM1-7
PS1-4
FOH
FOL
TGH
TGL
BALH
BALL
ATSC
TZC
FZC
FSET
TG2
VEE
VCC
FS1
FS2
FOCUS
PHASE COMPENSATION
PHASE COMPENSATION
DFCT
FS4
TRACKING
PHASE COMPENSATION
PHASE COMPENSATION
TG1
TM1
DFCT
FZC COMP.
VEE
VCC
VCC
TDFCT
TZC COMP.
ATSC
WINDOW
COMP.
WINDOW
COMP.
E-F BALANCE
WINDOW COMP.
WINDOW COMP.
TRK. GAIN
WINDOW COMP.
WINDOW COMP.
FO. BIAS
WINDOW
COMP.
WINDOW
COMP.
VEE
TGFL
TOG1
TOG2
TOG3
TOG4
BAL1
BAL2
BAL3
BAL4
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
FE AMP
VEE
E IV AMP
F IV AMP
VCC
APC
VCC
VEE
LASER POWER CONTROL
VEE
PD1 IV
AMP
AMP
PD2 IV
AMP
AMP
RF SUMMING
AMP
AMP
VCC
VEE
VEE
LEVEL S
LEVEL S
VEE
MIRR
VCC
DFCT
FOK
VCC
LDON
LPCL
LPC
TGFL
MIRR
DFCT1
CC1
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