Sony HBD-E190 / HBD-E290 / HBD-E490 / HBD-E690 Service Manual ▷ View online
HBD-E190/E290/E490/E690
77
Pin No.
Pin Name
I/O
Description
N8
BA1
I
Bank Address Inputs: BA1 defi ne to which bank an Active, Read, Write or Precharge com-
mand is being applied. Bank address also determines if the mode register or extended mode
register is to be accessed during a MRS cycle.
mand is being applied. Bank address also determines if the mode register or extended mode
register is to be accessed during a MRS cycle.
N9
VDD
-
Power Supply: 1.5V +/-0.075
P1
VSS
-
Ground
P2
A5
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
P3
A2
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
P4
NO_USE
-
Not used
P5
NO_USE
-
Not used
P6
NO_USE
-
Not used
P7
A1
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
P8
A4
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
P9
VSS
-
Ground
R1
VDD
-
Power Supply: 1.5V +/-0.075
R2
A7
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
R3
A9
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
R4
NO_USE
-
Not used
R5
NO_USE
-
Not used
R6
NO_USE
-
Not used
R7
A11
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
R8
A6
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
R9
VDD
-
Power Supply: 1.5V +/-0.075
T1
VSS
-
Ground
T2
RESET
I
Active Low Asynchronous Reset: Reset is active when RESET is LOW, and inactive when
RESET is HIGH. RESET must be HIGH during normal operation. RESET is CMOS rail to rail
signal with DC high and low at 80% and 20% of V
RESET is HIGH. RESET must be HIGH during normal operation. RESET is CMOS rail to rail
signal with DC high and low at 80% and 20% of V
DD
, example, 1.20V for DC high and 0.30V
for DC low.
T3
A13
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
T4
NO_USE
-
Not used
T5
NO_USE
-
Not used
T6
NO_USE
-
Not used
T7
NC
-
No Connect: No internal electrical connection is present.
T8
A8
I
Address inputs: Provided the row address for active commands and the column address for
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
T9
VSS
-
Ground
HBD-E190/E290/E490/E690
78
MB148 BOARD (9/9) IC6301 R5F3650KCDFB (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
SIRCS_IN
I
SIRCS signal input from the remote control receiver
2
FAN CONT2
O
Fan motor speed control signal output terminal control by DA converter
Port output higher, speed slower
Port output higher, speed slower
3
FL_D_OUT
O
Serial data output to the fl uorescent indicator tube driver
4
NO_USE
-
No used
5
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
6
BYTE
I
External data bus width selection signal input terminal
7
CNVss
I
Processor mode selection signal input terminal
8
NO_USE
-
No used
9
NO_USE
-
No used
10
RESET
I
System reset signal input from the reset signal generator and reset switch "L": reset
For several hundreds msec. After the power supply rises, "L" is input, then it change to
"H"
For several hundreds msec. After the power supply rises, "L" is input, then it change to
"H"
11
Xout
O
System clock output terminal (8MHz)
12
Vss
-
Ground terminal
13
Xin
I
System clock input terminal (5MHz)
14
Vcc1
-
Power supply terminal (+3.3V)
15
CEC_TX_RX
I/O
CEC serial data input/output with the HDMI connector
16
NO_USE
-
No used
17
KEY_INT
I
Key wake-up signal input terminal
18
AC_CUT
I
AC cut detection signal input terminal "L": AC cut
19
BD_IF_START
O
Ready signal output to the BD decoder "H": ready
20
NO_USE
-
No used
21
NO_USE
-
No used
22
NO_USE
-
No used
23
BD_IF_REQ
I
Request signal input from the BD decoder
24
NO_USE
-
No used
25
PCONT_FL
O
Power supply on/off control signal output terminal for fl uorescent indicator tube driver
"H": power on
"H": power on
26
LED_PWM 1
O
LED drive signal output terminal
27
NO_USE
-
No used
28
NO_USE
-
No used
29
TXD1
O
No used
30
RXD1
I
No used
31
ON CHIP DEBUG / CLK1
I
No used
32
NO USE / RTS1
O
No used
33
DAMP_SDAO
I/O
Two-way data bus with the DAMP processor
34
DAMP_SCLO
I/O
Serial data transfer clock signal output to the DAMP processor
35
DC_DET
I
Speaker DC detection signal input terminal "L": speaker DC is detected
36
PCONT1
O
Power supply on/off control signal output terminal "H": power on
37
PCONT2
O
Power supply control signal output terminal
38
PCONT3
O
Power supply on/off control signal output terminal "H": power on
39
EPM
O
EPM for update used
40
STA516_POWER
O
STA516 IC Power Control, "H": power on
41
NO_USE
-
No used
42
FAN_ON
O
Power supply on/off control signal output terminal for fan motor "H": power on
43
NO_USE
-
No used
44
CE
I
Chip enable signal input terminal
45
ST_SDA
I/O
Two-way data bus with the FM receiver
46
ST_SCL
I/O
Serial data transfer clock signal output to the FM receiver
47
PVDD_CONT
O
Power Supply PVDD control for eco used
48
DRIVER_RST (EN)
O
Reset signal output to the power amplifi er "L": reset
49
NO_USE
-
No used
HBD-E190/E290/E490/E690
79
Pin No.
Pin Name
I/O
Description
50
DAMP_PDN
O
DAMP Driver Standby Control
51
DAMP XRST
O
Reset signal output to the DAMP processor "L": reset
52
DAMP_XMUTE
O
Muting on/off control signal output to DAMP processor "L": muting on
53
NO_USE
-
No used
54
NO_USE
-
No used
55
NO_USE
-
No used
56
KARAOKE_MODE
I
Karaoke mode information input terminal
57
MIC_CLK
I/O
Clock signal output terminal
58
MIC_DATA
I/O
Serial data output terminal
59
MIC-DET_OUT
O
Microphone detection signal output terminal
60
Vcc
-
Power supply terminal (+3.3V)
61
NJU72341_POWER
O
Power control for MIC IC
62
Vss
-
Ground terminal
63
PLUG DET / PLUG1 DET
/ PLUG2 DET
I
Microphone A or B plug insert detection signal input terminal
Detection by AD
Detection by AD
64
NO_USE
-
No used
65
DRIVE_SD / POWER_
DET
I
Shut down signal input from the power amplifi er "L": shut down
66
NO_USE
-
No used
67
STA516_TH_WARN
I
Thermal warning for temperature of the IC STA516 more than 130 °C
68
FL_CS
O
Chip select signal output to the fl uorescent indicator tube driver
69
ASEL0
O
Audio selection signal output terminal "L": external audio input, "H": FM
70
ASEL1
O
Audio selection signal output terminal
71
NO_USE
-
No used
72
NO_USE
-
No used
73
ST_RDS_INT
I
RDS interrupt signal input from the FM receiver
74
NO_USE
-
No used
75
BD_SDI (IF_SDO)
O
Serial data output to the BD decoder
76
BD_SDO (IF_SDI)
I
Serial data input from the BD decoder
77
BD_SCLK
I
Serial data transfer clock signal input from the BD decoder
78
BD_CS
O
Chip select signal output to the BD decoder
79
NO_USE
-
No used
80
NO_USE
-
No used
81
BD_RESET
O
Reset signal output to the BD decoder, NAND fl ash and EEPROM "L": reset
82
JIG MODE1
I/O
Jig mode selection signal input from the BD decoder
83
OPWRSB
I
Power control signal input from the BD decoder
84
FE EJECT
O
Eject/ stop key input detection signal output to the BD decoder
85
UPG STATUS
I
UPG status signal input from the BD decoder
86
NO_USE
-
No used
87
NO_USE
-
No used
88
NO_USE
-
No used
89
BD_TEMP
I
Temperature detection signal input terminal
90
DESTINATION
I
Destination setting terminal
91
MODEL
I
Model setting terminal Fixed at "L" in this unit
92, 93
KEY2, KEY1
I
Key input terminal
94
Vss
-
Ground terminal
95
KEY0
I
Power supply key input terminal
96
Vref
I
Reference voltage (+3.3V) input terminal
97
Vcc
-
Power supply terminal (+3.3V)
98
NO_USE
-
No used
99
NO_USE
-
No used
100
NO_USE
-
No used
80
HBD-E190/E290/E490/E690
SECTION 6
EXPLODED VIEWS
Note:
• -XX and -X mean standardized parts, so
• -XX and -X mean standardized parts, so
they may have some difference from the
original one.
original one.
• Items marked “*” are not stocked since
they are seldom required for routine ser-
vice. Some delay should be anticipated
when ordering these items.
vice. Some delay should be anticipated
when ordering these items.
• The mechanical parts with no reference
number in the exploded views are not sup-
plied.
plied.
• Color Indication of Appearance Parts Ex-
ample:
KNOB, BALANCE (WHITE) . . . (RED)
Parts Color Cabinet’s Color
• Abbreviation
AUS :
AUS :
Australian
model
CH
: Chinese model
CND : Canadian model
E3
E3
: 240 V AC area in E model
E12
: 220-240 V AC area in E model
E15
: Iran model
E32
: 110-240 V AC area in E model
EA
: Saudi Arabia model
MX6 : Latin-American model
PX
PX
: PX model
RU
: Russian model
SAF : South African model
SP
SP
: Singapore model
TH :
Thai
model
TW :
Taiwan
model
6-1. PANEL SECTION
1
X-2582-883-2 LOADING
ASSY
2
4-295-431-01 SPRING,
LOADING
3
3-077-331-71 +BV3
(3-CR)
4
4-295-412-31 PANEL,
TOP
Ref. No.
Part No.
Description
Remark
Ref. No.
Part No.
Description
Remark
3
3
3
4
front panel section
not supplied
not supplied
2
1
not supplied
Ver. 1.1
The components identifi ed by mark 0
or dotted line with mark 0 are critical for
safety.
Replace only with part number specifi ed.
or dotted line with mark 0 are critical for
safety.
Replace only with part number specifi ed.
Les composants identifi és par une marque
0 sont critiques pour la sécurité.
Ne les remplacer que par une pièce por-
tant le numéro spécifi é.
0 sont critiques pour la sécurité.
Ne les remplacer que par une pièce por-
tant le numéro spécifi é.
The components identifi ed by mark 9 con-
tain confi dential information.
Strictly follow the instructions whenever the
components are repaired and/or replaced.
tain confi dential information.
Strictly follow the instructions whenever the
components are repaired and/or replaced.
Les composants identifi és par la marque
9 contiennent des informations confi den-
tielles.
Suivre scrupuleusement les instructions
chaque fois qu’un composant est remplacé
et / ou réparé.
9 contiennent des informations confi den-
tielles.
Suivre scrupuleusement les instructions
chaque fois qu’un composant est remplacé
et / ou réparé.
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