Sony FST-ZX6 / FST-ZX8 / HCD-ZX6 / HCD-ZX8 / LBT-ZX6 / LBT-ZX8 Service Manual ▷ View online
57
HCD-ZX6/ZX8
7-31. IC PIN DESCRIPTIONS
• IC101 CXD3059AR (RF AMP) (BD81A BOARD)
Pin No.
Pin Name
I/O
Pin Description
1
MIRR
I/O
Mirror signal input/output Not used in this set. (Open)
2
DFCT
I/O
Defect signal input/output Not used in this set. (Open)
3
FOK
I/O
Focus OK signal input/output Not used in this set. (Open)
4
VSS
—
Internal digital ground pin
5
LOCK
I/O
GFS is sampled at 460Hz; when GFS is high , this pin outputs a high signal
If GFS is low eight consecutive Not used in this set. (Open)
6
MDP
O
Spindle motor servo control signal output
7
SSTP
I
Disc innermost detection signal input
8
IOVSS1
—
I/O digital ground pin
9
SFDR
O
Sled drive signal output
10
SRDR
O
Sled drive signal output
11
TFDR
O
Tracking drive signal output
12
TRDR
O
Tracking drive signal output
13
FFDR
O
Focus drive signal output
14
FRDR
O
Focus drive signal output
15
IOVDD1
—
I/O digital power supply pin (+3.3 V)
16
AVDD0
—
Analog power supply pin (+3.3 V)
17
AVSS0
—
Analog ground pin
18
NC
—
Not used. (Open)
19
E
I
E signal input
20
F
I
F signal input
21
TEI
I
Tracking error signal input
22
TEO
O
Tracking error signal output
23
FEI
I
Focus error signal input
24
FEO
O
Focus error signal output
25
VC
O
Center voltage output
26
A
I
A signal input
27
B
I
B signal input
28
C
I
C signal input
29
D
I
D signal input
30
NC
—
Not used. (Open)
31
AVDD4
—
Analog power supply pin (+3.3 V)
32
RFDCO
O
RFDC signal output Not used in this set. (Open)
33
PDSENS
I
Reference voltage pin for PD Connect to ground in this set.
34
AC_SUM
O
RFAC summing amplifier signal output
35
EQ_IN
I
Equalizer circuit signal input
36
LD
O
APC amplifier signal output
37
PD
I
APC amplifier signal input
38
NC
—
Not used. (Open)
39
RFC
I
Equalizer cut-off frequency adjustment pin
40
AVSS4
—
Analog ground pin
41
RFACO
O
RFAC signal output
42
RFACI
I
RFAC signal input or EFM signal input
43
AVDD3
—
Analog power supply pin (+3.3 V)
44
BIAS
I
Asymmetry circuit constant current signal input
45
ASYI
I
Asymmetry comparator voltage signal input
46
ASYO
O
EFM full-swing signal output (Low=VSS, High=VDD)
47
VPCO
O
Wide-band EFM PLL charge pump signal output Not used in this set. (Open)
48
VCTL
I
Wide-band EFM PLL VCO2 control voltage signal input
49
AVSS3
—
Analog ground pin
50
CLTV
I
Multiplier VCO1 control voltage signal input
58
HCD-ZX6/ZX8
Pin No.
Pin Name
I/O
Pin Description
51
FILO
O
Master PLL (slave=digital PLL) filter signal output
52
FILI
I
Master PLL filter signal input
53
PCO
O
Master PLL charge pump signal output
54
AVDD5
—
Analog power supply pin (+3.3 V)
55
DDVROUT
O
DC/DC converter signal output
56
DDVRSEN
I
DC/DC converter output voltage monitor pin
57
AVSS5
—
Analog ground pin
58
DDCR
I
DC/DC converter reset pin
59
NC
—
Not used. (Open)
60
BCKI
I
D/A interface bit clock signal input
61
PCMDI
I
D/A interface serial data signal input (2’s COMP, MSB first)
62
LRCKI
I
D/A interface LR clock signal input
63
LRCK
O
D/A interface LR clock signal output f=Fs
64
VSS
—
Internal digital ground pin
65
PCMD
O
D/A interface serial data signal output (2’s COMP, MSB first)
66
BCK
O
D/A interface bit clock signal output
67
VDD
—
Internal digital power supply pin (+3.3 V)
68
EMPH
O
High when the playback disc has emphasis, low it has not
69
EMPHI
I
High when de-emphasis is ON, low when input OFF
70
IOVDD2
—
I/O digital power supply pin (+3.3 V)
71
DOUT
O
Digital signal output
72
TEST
I
Test pin Normally ground
73
TEST1
I
Test pin Normally ground
74
IOVSS2
—
I/O digital ground pin
75
NC
—
Not used. (Open)
76
XVSS
—
Master clock ground pin
77
XTAO
O
Crystal oscillation circuit signal output (16.9344 MHz)
78
XTAI
I
Crystal oscillation circuit signal input (16.9344 MHz)
79
XVDD
—
Master clock power supply pin (+3.3 V)
80
AVDD1
—
Analog power supply pin (+3.3 V)
81
AOUT1
O
Lch analog signal output
82
VREFL
O
Lch reference voltage signal output
83
AVSS1
—
Analog ground pin
84
AVSS2
—
Analog ground pin
85
VREFR
O
Rch reference voltage signal output
86
AOUT2
O
Rch analog signal output
87
AVDD2
—
Analog power supply pin (+3.3 V)
88
NC
—
Not used. (Open)
89
IOVDD0
—
I/O digital power supply pin (+3.3 V)
90
RMUT
O
Rch “0” detection flag Not used in this set. (Open)
91
LMUT
O
Lch “0” detection flag Not used in this set. (Open)
92
NC
—
Not used. (Open)
93
XTSL
I
Crystal selection input Not used in this set. (Connect to ground.)
94
IOVSS0
—
I/O digital ground pin
95
XTACN
I
Oscillation circuit control signal input
Self-oscillation when high, oscillation stop when low
96
SQSO
O
Subcode Q 80-bit and PCM peak and level data signal output
CD TEXT data signal output Not used in this set. (Open)
97
SQCK
I
SQSO readout clock signal input
98
SBSO
O
Subcode P to W serial signal output Not used in this set. (Open)
99
EXCK
I
SBSO readout clock signal input Not used in this set. (Open)
100
XRST
I
System reset signal input “L”: Reset
101
SYSM
I
Mute signal input “H”: Mute Connect to ground in this set.
59
HCD-ZX6/ZX8
Pin No.
Pin Name
I/O
Pin Description
102
DATA
I
Serial data signal input
103
VSS
—
Internal digital ground pin
104
XLAT
I
Latch signal input The serial data is latched at the falling edge
105
CLOCK
I
Serial data transfer clock signal input
106
VDD
—
Internal digital power supply pin (+3.3 V)
107
SENS
O
SENS signal output
108
SCLK
I
SENS serial data readout clock signal input
109
ATSK
I/O
Anti-shock signal input/output Not used in this set. (Open)
110
WFCK
O
WFCK signal output Not used in this set. (Open)
111
XUGF
O
XUGF signal output Not used in this set. (Open)
112
XPCK
O
XPCK signal output Not used in this set. (Open)
113
GFS
O
GFS signal output Not used in this set. (Open)
114
C2PO
O
C2PO signal output Not used in this set. (Open)
115
SCOR
O
High output when the subcode sync, S0 or S1, is detected
116
VDD
—
Internal digital power supply pin (+3.3 V)
117
C4M
O
4.2336MHz signal output Not used in this set. (Open)
118
WDCK
O
Word clock signal output f=2Fs Not used in this set. (Open)
119
COUT
I/O
Track number count signal input/output Not used in this set. (Open)
120
NC
—
Not used. (Open)
60
HCD-ZX6/ZX8
• IC401 M3062CMEN-A04FPUO (MASTER CONTROL) (MAIN BOARD (1/4))
Pin No.
Pin Name
I/O
Pin Description
1
MP3 ACK
I
Acknowledgement signal input from MP3 decoder IC “L”: acknowledged
2
MP3 LP
O
Latch signal output to MP3 decoder IC “L”: enable
3
MP3 CS
O
Chip select signal output MP3 decoder IC “L”: enable
4
SIRCS
I
Remote control signal input
5
MP3 DATA OUT
O
Serial data signal output to MP3 decoder IC
6
MP3 DATA IN
I
Serial data signal input from MP3 decoder IC
7
MP3 CLK
O
Serial data transfer clock signal output to MP3 decoder IC
8
BYTE
—
Ground pin
9
CNVSS
—
Ground pin
10
XC IN
I
Sub system clock signal input (32.768 kHz)
11
XC OUT
O
Sub system clock signal output (32.768 kHz)
System reset signal input from the reset signal IC “L”: reset
12
RESET
I
After the power supply rises, “L” is input for several hundreds msec and then change
to “H”.
13
X OUT
O
Main system clock signal output (16 MHz)
14
VSS
—
Ground pin
15
X IN
I
Main system clock signal input (16 MHz)
16
VCC
—
Power supply pin (+3.3 V)
17
NMI
I
Non-maskable interrupt input
18
MP3 RESET
O
Reset signal output to MP3 decoder IC
19
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
20
AC OUT
I
AC off detection signal input from the reset signal IC “L”: AC cut detected
21
SENS
I
Internal status detection monitor signal input from the digital signal processor
22
CD CLK
O
Serial data transfer clock signal output to the digital signal processor
23
XLAT
O
Serial data latch pulse signal output to the digital signal processor
24
CD DATA
O
Serial data signal output to the digital signal processor
25
XRST
O
Reset signal output to the digital signal processor and the motor/col driver
“L”: reset
26
XTCN
O
BD DSP oscillation on/off control signal output “H”: on
27
FAN CTRL
I
Not used in this set. (Open)
28
STBY RELAY
O
Main power on/off control signal output “H”: power on
29
IIC CLK
I/O
Clock signal for IIC communication between master control IC and display control IC
30
IIC DATA
I/O
Data signal for IIC communication between master control IC and display control IC
31
MP3 STB
O
Standby mode signal output to MP3 decoder IC “L”: standby mode
32
REC MUTE
O
Recording muting on/off control signal output “L”: muting on
33
AC CUT MAIN
I
Under voltage protection detection signal input “L”: under voltage datected
34
LINE MUTE
O
Line muting on/off control signal output “H”: muting on
35
VMUTE2
I
Not used in this set. (Open)
36
VMUTE
I
Not used in this set. (Open)
37
SYS RST
I
Not used in this set. (Open)
38
MREQ
I
Not used in this set. (Open)
39
AMS MUTE
O
AMS signal muting on/off control signal output “H”: muting on
40
CD POWER
O
Power on/off control signal output “H”: power on
41
CD A MUTE
O
CD analog signal muting on/off control signal output “H”: power on
42
TSENS
I
Disc tray position detection signal input from CDM
43
DSENS
I
Disc existence detection signal input from CDM
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