DOWNLOAD Sony FST-GTK33IP / RDH-GTK11IP / RDH-GTK33IP Service Manual ↓ Size: 7.59 MB | Pages: 86 in PDF or view online for FREE

Model
FST-GTK33IP RDH-GTK11IP RDH-GTK33IP
Pages
86
Size
7.59 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
fst-gtk33ip-rdh-gtk11ip-rdh-gtk33ip.pdf
Date

Sony FST-GTK33IP / RDH-GTK11IP / RDH-GTK33IP Service Manual ▷ View online

FST-GTK11iP/GTK33iP/RDH-GTK11iP/GTK33iP
57
•  IC Pin Function Description
MAIN  BOARD  IC101  R5F364AEDFA (SYSTEM  CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DP SDA/SPI DOUT
O
Serial data output to the liquid crystal display driver
2
DP SCL
O
Serial data transfer clock signal output to the liquid crystal display driver
3
DP CS
O
Chip select signal output to the liquid crystal display driver
4
NC
-
Not used
5
SIRCS
I
SIRCS signal input from remote control receiver
6, 7
NC
-
Not used
8
BYTE
I
External data bus width selection signal input terminal
9
CNVss
I
Processor mode selection signal input terminal
10
Xcin
I
Sub system clock (32.768 kHz) input terminal
11
XcOUT
O
Sub system clock (32.768 kHz) output terminal
12
RESET
I
System reset signal input terminal    Not used
13
Xout
O
Main system clock (5 MHz) output terminal
14
Vss
-
Ground terminal
15
Xin
I
Main system clock (5 MHz) input terminal
16
Vcc
-
Power supply terminal (+3.3V)
17
NMI
-
Not used
18, 19
NC
-
Not used
20
AC-CUT
I
AC cut detection signal input terminal    Not used
21
NC
-
Not used
22
SPKLED_BLUE
O
LED drive signal output terminal for speaker illumination (blue)    “H”: LED on
23 to 25
SOFT_TEST1 to 
SOFT_TEST3
-
Not used
26
SPKLED_GREEN
O
LED drive signal output terminal for speaker illumination (green)    “H”: LED on
27
NC
-
Not used
28
SPKLED_RED
O
LED drive signal output terminal for speaker illumination (red)    “H”: LED on
29
IIC_CLK
-
Not used
30
IIC_SDA
-
Not used
31
TUNER_SDA/
UCOM_RX
I/O
Two-way data bus with the tuner section
32
TUNER_SCL/
UCOM_TX
O
Serial data transfer clock signal output to the tuner section
33, 34
NO_USE
-
Not used
35
iPhone CP IIC SDA
I/O
Two-way data bus with the EEPROM
36
iPhone CP IIC SCL
O
Serial data transfer clock signal output to the EEPROM
37
iPhone CP RESET
O
Reset signal output to the EEPROM    “L”: reset
38
RDS_INT
I
RDS interrupt signal input from the tuner section
39
ST POWER
O
Power on/off control signal output terminal for tuner section    “H”: power on
40
IP_LED
O
LED drive signal output terminal for iPod/iPhone illumination    “H”: LED on
41
FLASH WRITE 
MODE IN
-
Not used
42
ADC_RESET
O
Reset signal output to the A/D converter    “L”: reset
43
EXT_SEL
O
Audio selection signal output terminal    “L”: DVD/PC, “H”: tuner
44
DSP DOUT_MUTE
O
Muting on/off control signal output to the DSP
45
DSP_RESET
O
Reset signal output to the DSP
46
FLASH WRITE 
MODE IN
-
Not used
47
DSP IIC_SDA
I/O
Two-way data bus with the DSP
48
DSP IIC_CLK
O
Serial data transfer clock signal output to the DSP
49
SMASTER_SD
I
Shut down signal input from the power amplifi er    “L”: shut down
50, 51
S-MASTER_OTW1, 
S-MASTER_OTW2
I
Over temperature warning signal input from the power amplifi er
52
S-MASTER_CLIP
I
Clipping warning signal input from the power amplifi er
53
S-MASTER_READY
I
Ready signal input from the power amplifi er
54
S-MASTER_RESET
O
Reset signal output to the power amplifi er    “L”: reset
55
S-MASTER 
PG MUTE
O
PG muting on/off control signal output to the stream processor
56
S-MASTER 
SOFT MUTE
O
Soft muting on/off control signal output to the stream processor
FST-GTK11iP/GTK33iP/RDH-GTK11iP/GTK33iP
58
Pin No.
Pin Name
I/O
Description
57
S-MASTER DATA
O
Serial data output to the stream processor
58
S-MASTER SHIFT
O
Serial data transfer clock signal output to the stream processor
59
S-MASTER LATCH
O
Serial latch pulse signal output to the stream processor
60
S-MASTER 
NSP MUTE
O
NSP muting on/off control signal output to the stream processor
61
S-MASTER INIT
O
Reset signal output to the stream processor   “L”: reset
62
Vcc
-
Power supply terminal (+3.3V)
63
NC
-
Not used
64
Vss
-
Ground terminal
65
LED_LEVEL_IN
I
LED level synchronization signal input termianl
66
AUDIO LEVEL DET
I
Audio level detection signal input termianl for auto standby function
67
S-MASTER DCP
I
Speaker DC detection signal input terminal    “L”: speaker DC is detected
68
USB MCHNG
I
Music change signal input from the audio decoder
69
AC_DET
I
AC cut detection signal input terminal    “L”: AC cut
70, 71
KEY_1, KEY_2
I
Panel key input terminal (A/D input)
72
VOL_JOG
I
Jog dial pulse input terminal for VOLUME dial
73
IP_DETECT
I
iPod/iPhone detection signal input terminal
74
KEY_WAKE_UP_
POWER
I
Key wake-up signal input terminal
75
STBY LED
O
LED drive signal output terminal for on/standby indicator    “H”: LED on
76
USB IRPTO
I
Interrupt request signal input from the audio decoder
77
USB SDA
I/O
Two-way data bus with the audio decoder
78
USB SCL
O
Serial data transfer clock signal output to the audio decoder
79
USB BUSY
I
Busy signal input from the audio decoder
80
USB RESET
O
Reset signal output to the audio decoder
81
IP_ON
O
Power on/off control signal output terminal for iPod/iPhone section    “H”: power on
82
USB_ON
O
Power on/off control signal output terminal for USB section    “H”: power on
83
USB_IP_OCP
I
VBUS over current detection signal input terminal
84
USB_IPOD SEL
O
Audio selection signal output terminal    “L”: iPod/iPhone, “H”: USB
85
SUB-ON
O
Main power on/off control signal output terminal    “H”: main power on (GTK11iP only)
86
P-ON
O
Power on/off control signal output terminal for regulator section    “H”: power on
87
BYPASS
-
Not used
88
POWER PROTECT
I
Protect signal input from regulator section
89
VART DET
-
Not used
90
PVDD_ON
O
Main power on/off control signal output terminal    “H”: main power on (GTK33iP only)
91 to 93
NC
-
Not used
94
VACS
I
VACS reference signal input terminal
95
MODEL-IN
I
Model setting terminal
96
AVss
-
Ground terminal
97
SPEC-IN
I
Destination setting terminal
98
VREF
I
Reference voltage (+3.3V) input terminal
99
AVcc
-
Power supply terminal (+3.3V)
100
DP INH
O
Blank indicate control signal output to the liquid crystal display driver    "H": display on
FST-GTK11iP/GTK33iP/RDH-GTK11iP/GTK33iP
59
MAIN  BOARD  IC303  BU9408KS2 (DSP)
Pin No.
Pin Name
I/O
Description
1
DVDDPLL
-
Power supply terminal (+3.3V)
2
FILT1
-
Not used
3
DGNDPLL
-
Ground terminal
4
FILT2
-
Not used
5
SCANTEST
-
Not used
6
I2CADR
-
Not used
7
SCL
I
Serial data transfer clock signal input from the system controller
8
SDA
I/O
Two-way data bus with the system controller
9
DGNDIO1
-
Ground terminal
10
RESETB
I
Reset signal input from the system controller
11
DVDDCOR1
-
Connect to pin 37
12 to 14
MUTE1B to MUTE3B
I
Muting on/off control signal input from the system controller
15
AGNDDA1
-
Ground terminal
16
AOUTR1
-
Not used
17
AOUTL1
O
Audio level detection signal output terminal for auto standby function
18, 19
AVDDDA1, AVDDDA2
-
Power supply terminal (+3.3V)
20
AOUTR2
-
Not used
21
VREFDA
-
Not used
22
AOUTL2
O
Audio level detection signal output terminal for VACS reference and LED level synchronization
23
AGNDDA2
-
Ground terminal
24
ERR1_LRC
-
Not used
25
ERR2_BCK
-
Not used
26
DATASO
-
Not used
27
DATAMO
O
Audio data output to the stream processor
28
BCKO
O
Bit clock signal output to the stream processor
29
LRCKO
O
L/R sampling clock signal output to the stream processor
30
AMCLKO
O
Master clock signal output to the A/D converter and stream processor
31
SPDIFO
-
Not used
32
DGNDIO2
-
Ground terminal
33
XI
I
System clock input terminal (24.576 MHz)
34
XO
O
System clock output terminal (24.576 MHz)
35
DVDDIO
-
Power supply terminal (+3.3V)
36
ANATEST
-
Not used
37
DVDDCOR2
-
Connect to pin 11
38
DVDDREG
-
Power supply terminal (+3.3V)
39
LDOPOFF
-
Not used
40
DGNDREG
-
Ground terminal
41
LRCKI1
I
L/R sampling clock signal input from the DSP
42
BCKI1
I
Bit clock signal input from the DSP
43
DATAI1
I
Audio data input from the DSP
44
LRCKI2
I
L/R sampling clock signal input terminal    Not used
45
BCKI2
I
Bit clock signal input terminal    Not used
46
DATAI2
I
Audio data input terminal    Not used
47
LRCKI3
I
L/R sampling clock signal input from the A/D converter
48
BCKI3
I
Bit clock signal input from the A/D converter
49
DATAI3
I
Audio data input from the A/D converter
50
LRCKI4
I
L/R sampling clock signal input terminal    Not used
51
BCKI4
I
Bit clock signal input terminal    Not used
52
DATAI4
I
Audio data input terminal    Not used
FST-GTK11iP/GTK33iP/RDH-GTK11iP/GTK33iP
60
MAIN  BOARD  IC306  BU94604BKV-E2 (AUDIO  DECODER)
Pin No.
Pin Name
I/O
Description
1
RESETX
I
Reset signal input from the system controller
2
SEL_SLAVE
I
Mode setting terminal    “H”: stand alone, “L”: slave    Fixed at “L” in this unit
3
SEL_MP3
I
Mode setting terminal    “H”: play MP3 only, “L”: play MP1, MP2 and MP3    
Fixed at “L” in this unit
4
SEL_DOUT
I
Mode setting terminal    “H”: analog D/A converter output, “L”: digital output    
Fixed at “L” in this unit
5
SEL_VOL
I
Mode setting terminal    “H”: volume control valid, “L”: volume control invalid    
Fixed at “L” in this unit
6
SEL_APLAY
I
Mode setting terminal    “H”: auto play off, “L”: auto play    Fixed at “H” in this unit
7
SEL_UTPKT
I
Mode setting terminal    “H”: normal operation, “L”: USB test packet output    
Fixed at “H” in this unit
8
IRPTO
O
Interrupt request signal output to the system controller
9
TEST2
I
Terminal for test
10
MCHNG
O
Music change signal output to the system controller
11
BUSY
O
Busy signal output to the system controller
12
IIC SCL
I
Serial data transfer clock signal input from the system controller
13
IIC SDA
I/O
Two-way data bus with the system controller
14, 15
A0, A1
-
Not used
16
SEL-SMAN
I
Mode setting terminal    “H”: mode2, “L”: mode3    Fixed at “H” in this unit
17
TEST3
I
Terminal for test
18
DVDDIO
-
Power supply terminal (+3.3V)
19
SD_CON
-
Not used
20
SD_DO
-
Not used
21
SD_CLK
-
Not used
22
SD_DI
-
Not used
23
SD_CS
-
Not used
24
DVSS
-
Ground terminal
25, 26
TEST4, TEST5
I
Terminal for test
27
DVDD_M2
-
Connect to pin 57
28 to 31
TEST6 to TEST8, 
ATEST1
I
Terminal for test
32
AVDDC
-
Power supply terminal (+3.3V)
33
USB_DM
I
Audio data (negative) input terminal
34
USB_DP
I
Audio data (positive) input terminal
35
AVSSC
-
Ground terminal
36
REXTI
-
Not used
37
VOREFI
-
Not used
38
VDD_PLL
-
Power supply terminal (+3.3V)
39
TEST_PLL
I
Terminal for test
40
XIN_PLL
I
System clock input terminal (16.9344 MHz)
41
XOUT_PLL
O
System clock output terminal (16.9344 MHz)
42
VSS_PLL
-
Ground terminal
43
DAVSS
-
Ground terminal
44
RDACO
-
Not used
45
VCDACO
-
Not used
46
LDACO
-
Not used
47
DAVDD
-
Power supply terminal (+3.3V)
48
AMUTE
-
Not used
49 to 52
TEST9 to TEST12
I
Terminal for test
53
IIS LRCK
O
L/R sampling clock signal output to the DSP
54
IIS BCK
O
Bit clock signal output to the DSP
55
IIS DATA
O
Audio data output to the DSP
56
TEST13
I
Terminal for test
57
DVDD_M1
-
Connect to pin 27
58 to 61
TEST14 to TEST17
I
Terminal for test
62
DVSS
-
Ground terminal
63
TMODE
-
Not used
64
DVDDIO
-
Power supply terminal (+3.3V)
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