Sony DAV-S400 / HCD-S400 Service Manual ▷ View online
45
HCD-S400
IC802 MSM9202-05GS-KDR1 (FP-1030 BOARD)
39
33 S29
S35
55
40 G1
G16
5
32
S28
S1
1
P1
Port
Driver
Control
Circuit
8bit
Register
Shift
Command
Decoder
Grid
Driver
2
P2
3
AD2
AD
Driver
Segment
Driver
CGROM
CGROM
248wX35b
DCROM
16wX8b
Address
Selector
8wX35b
ADROM
16wX2b
Digit
Control
Duty
Control
Oscillator
Timing
Generator 1
Timing
Generator 2
4
AD1
56 VFL
57 GND
58 OSC0
59 OSC1
60 RST
61 CS
62 CLK
63 DAT
64 VDD
Read
Address
Counter
Write
Address
Counter
IC602 PCM1800E/2K (DVD BOARD)
3
15
14
13
12
11
5
4
6
9
8
10
7
FMT0
BYPASS
RSTB
RIN
(–)
(+)
(–)
(+)
V_REF_2
REF COM
2
V_REF_1
Single-End/
Differential
Converter
5th-Order
Delta-Sigma
Modulator
x1/64
Decimation
and
Hight Pass Filter
Serial Data
Interface
Mode/Format
Control
Interface
5th-Order
Delta-Sigma
Modulator
Single-End/
Differential
Converter
DOUT
16 SYSCLK
17 DGND
18 VDD
19 C_NR
20 C_PR
21 C_NL
22 C_PL
23 VCC
24 AGND
BCK
LRCK
MDDE0
FMT1
FSYNC
MDDE1
LIN 1
Reference
Clock/Timing Control
Reset/Power Control
46
HCD-S400
IC600 MC14052BDR2 (I/O BOARD)
IC604 BU1924F-E2 (I/O BOARD)
ANALOG
DIGIT
AL
RCLK
NC
XO
XI
VSS2
T2
VDD2
T1
QUAL
R
D
ATA
VREF
MUX
VDD1
VSS1
VSS3
CMP
1
4
3
6
5
8
7
2
14
15
16
13
12 11 10
9
CLOCK
PLL 57kHz
RDS/ARI
COMPARATOR
8th SWITCHED
CAPACITOR
FILTER
ANTI-ALIASING
FILTER
BIPHASE
DECODER
PLL
1187.5Hz
DEFFERENTIAL
DECODER
TEST
BINARY TO 1-OF-4
DECODER WITH
INHIBIT
LEVEL
CONVERTER
VDD
X2
X1
X
X0
X3
A
B
YO
Y2
Y
Y3
Y1
INH
VEE
VSS
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IC701 BA7666FS-E2 (I/O BOARD)
VCC
VCC
OUTA1
OUTA2
MUTE
OUTB1
OUTB2
BIAS
N.C.
OUTC1
OUTC2
MUTE
INA
GND
INB
GND
N.C.
INC
GND
BIAS
6dB
6dB
BIAS
75
Ω
75
Ω
75
Ω
6dB
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
47
HCD-S400
IC001 SP3728AC (RF-240 BOARD)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RFIN
CP
WIN
WPP
CN
A2
B2
C2
D2
D
C
B
A
E
F
RFIP
SDEN
SCLK
SWD
SRD
MON
TPH
FE
TE
TZIN
VCI
DFT
TZC
PI
PII
BYP2
MIRR
V33
RX
TP
A
MEV
VNA
FNN
FNP
DIP
DIN
BYP
SIGO
VP
A
AIP
AIN
A
TON
A
TOP
G
H
VC
VPB
DVDPD
CDPD
VNB
LDSELO
DVDLD
CDLD
LDON
MEVO
MIN
MP
MB
MLPF
ATT
GCA
GCA
GCA
GCA
APC
GCA
GCA
GCA
GCA
GCA
GCA
GCA
GCA
FULL WAVE
RECTIFIER
BOTTOM
ENV
AGC
CHARGE
PUMP
PROGRAMABLE
EQ FILTER
GCA
LPF
LPF
LPF
BEL
SEL
SERIAL
PORT
REGISTER
MUX
MUX
MUX
PHASE
DETECTOR
PHASE
DETECTOR
EQ
EQ
EQ
EQ
LD
SEL
WABLE BPF
PEAK/
BOTTOM
HOLD
MON
SEL
VC
48
HCD-S400
6-24. IC PIN FUNCTION DESCRIPTION
• IC103 MB91307APFV-G-BND-E1 (SYSTEM CONTROL) (DVD BOARD)
Pin No.
1 to 5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
I/O
O
O
O
O
–
–
–
I
I
I
I
I
I
I
I
I
I
O
–
–
I
O
O
I
O
O
I
O
O
–
O
O
–
I/O
O
O
–
–
–
–
–
I
O
O
I
O
O
–
O
I
Pin Name
HA17 to 21
HA22
WP
TRM/XKRCS
AVCC
AVRH
AVSS
AN0
AN1
AN2
AN3
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
VCC
SI0
SO0
SC0
SI1
SO1
SC1
SI2
SO2
DSEN3
VSS
XRST
XARPRST
RGBSEL/MICMUTE
SDA
SCL
TRM+/XKRRST
EUROV/Y/CLPSW1
DISCEXT/CLPSW0
MD0
MD1
MD2
DREQ0
DACK0
XDRVMUTE
DREQ1
DACK1
XIFCS
VSS
X1
X0
Description
Address signal output
Address signal output (Not used)
I2C EEPROM write protect signal output
Chip select signal output to CXD2752R
Analog power supply
A/D converter reference voltage supply
Analog ground
Model and destination setting input
Model and destination setting input
Model and destination setting input
Model and destination setting input
Interrupt signal input from CXD1932Q
Interrupt signal input from CXD9635R(ARP)
Interrupt signal input from CXD9635R(SDSP)
Interrupt signal input from CXD2752R
Interrupt signal input from µPD703033A
Interrupt signal input from CXD2752R
Soft mute control signal output to CXD2752R
Not used (Open)
Power supply
Serial data input from µPD703033A
Serial data output to µPD703033A
Serial clock output to µPD703033A
Serial data input from CXD2752R
Serial data output to CXD2752R
Serial clock output to CXD2752R
RS-232C data input (Not used)
RS-232C data output (Not used)
Not used (Open)
Ground
System reset signal output
Reset signal output to CXD9635R(ARP)
Not used (Open)
I2C data input or output
I2C clock output
Data request selection signal output (DVD : L, SACD : H)
Not used (Open)
Not used (Open)
Operation mode setting (Connected to Vcc)
Operation mode setting (Connected to Ground)
Operation mode setting (Connected to Ground)
DMA-REQ1 signal input
DMA-ACK1 signal output
Drive mute control signal output to FAN8034
DMA-REQ0 signal input
DMA-ACK0 signal output
Chip select signal output to µPD703033A
Ground
Clock (Oscillator) output
Clock (Oscillator) input
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