Sony DAV-S300 / HCD-S300 Service Manual ▷ View online
65
IC701 CXD8791AQ
IC803 BA10324AFV
Host
Interface
INT6N
1
HRD/HRXD
HWR/HFS
HCS
HA1
HA0/HCK
VDD
PWM2
PWM1
PWM0
VSS
EMU1
EMU0
TDO
TCK
TDI
TMS
TRST
VDD
VSS
TRREF
TRIN
FGREF
FGIN
PGREF
PGIN
RS
LG
DFCTI
HEAD
CLKOOIS
CLKOUT1
VDD
VSS
GIO15
GIO14
GIO13
GIO12
GIO11
GIO10
GIO9
GIO8
GIO7
GIO6/TMC2
GIO5/TMC1
VDD
GIO4/TMC0
GIO3/INT5
GIO2/INT4
GIO1/INT3
GIO0/INT2
VSS
TESTC
TEST3
TEST2
TEST1
TEST0
TESTSIA1
TESTSIA0
TESTSOA
ADC9
ADC8
ADC7
ADC6
ADC5
128 127 126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107 106 105 104 103
39 40 41 42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60 61 62 63 64
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
8-bit
PWM0
8-bit
PWM0
8-bit
PWM0
256 word
SARAM
Clock
Generator
544 word
DARAM
JTAG
Bool Program
ROM
PLL
x1, x1.5
10K word
Program RAM
16-bit
Timer2
16-bit
Timer1
16-bit
Timer0
DAC Output
Selector
Pulse
Corrector
FG/PG
Phase
Detector
INT4N
INT4N
INT5N
INT3N
INT5N
INT2N
INT1N
INT5N
FG/PG
Phase
Counter
Track
Pulse
Pulse
Counter
Track
Pariod
Counter
GIO
Port
8-bit
DAC0
8-bit
DAC1
8-bit
DAC2
8-bit
DAC3
8-bit
ADC
1
2
3
4
5
6
7
8
9
9
1
INT4N INT3N INT2N
TEST SIB0
TEST SIB1
GNDAS
VCCAS
VRT0
DAB0
VRB0
VDD3V3
VSS3V3
VRB1
DAB1
VRT1
VCCA4
GNDA4
GNDA3
VCCA3
VRT2
DAB2
VRB2
VDD3V2
VSS3V2
VRB3
DAB3
VRT3
VCCA2
GNDA2
VDD3V1
VSS3V1
VRBA
GNDA1
TESTA
VCCA1
VRTA
ADC0
ADC1
ADC2
ADC3
ADC4
T320C2xLP
Core
HINT/HTX
D
SRPRN
VSS
HD0/HO0
HD1/HO1
HD2/HO2
HD3/HO3
VDD
HD4/HO4
HD5/HO5
HD6/HO6
HD7/HIO
VSS
VDD
GNDA5
LF
VCCA5
VSS
VDD
X1
X2/CLKIN
VSS
VDD
TESTB
PLLMD
TESTSOB
3
4
2
8
9
10
12
13
11
14
7
6
5
3
2
4
1
OUT2
+IN2
-IN2
+IN1
VCC
OUT1
-IN1
OUT3
+IN3
-IN3
+IN4
GND
OUT4
-IN4
1
66
IC907 LC89055W-RA8
• FP-932 Board
IC100 LC75824E
• VIDEO Board
IC702 NJM2285
46
43
40
37
34
31
47
44
41
38
35
32
48
45
42
39
36
33
25
26
27
28
29
30
3
6
9
12
15
18
2
5
8
11
14
17
1
4
7
10
13
16
24
23
22
21
20
19
X'TALL
DATA
RECOVER
TIMING
PLL
INPUT
MICRO COMPUTER
INTERFACE
FS
CALCULATION
LOCK
DETECTION
Pa, Pb
DETECTION
Cbit
DETECTION
CSFLAG
F0/P0/C0
F1/P1/C1
F2/P2/C2
VF/P3/C3
DVDD
DGND
AUTO
BPSYNC
ERROR
DO
DI
CE
CL
XSEL
MODE0
MODE1
DGND
DVDD
DOSEL0
DOSEL1
CKSEL0
CKSEL1
XMODE
AUDIO
ENPHA
XIN
XOUT
XMCK
DVDD
DGND
XSTATE
DATAO
DGND
BCK
CKOUT
AGND
AVDD
LPF
VIN
R
DVDD
DGND
DIN2
DIN1
DIN0
DOUT
DISEL
59
60
VSS
OSC
61 INH
56
57
VDD
VDD1
58 VDD2
62
63
52
COM1
53
COM2
54
COM3
55
COM4
CE
CL
64
13
51
S51
S13
S1/P1
S1/P1
DI
1
12
SEGMENT DRIVER & LATCH
COMMON
DRIVER
CLOCK
GENERATOR
ADDRESS
DETECTION
SHIFT REGISTER
10
11
9
12
14
15
13
16
7
6
8
5
3
2
4
1
L
H
CLAMP Type
CTL3
IN3A
OUT2
OUT3
OUT1
GND2
IN1B
CTL1
GND3
IN3B
CTL2
IN2A
IN2B
V+
IN1A
CND1
L
H
BIAS Type
L
H
CLAMP Type
67
Pin No.
Pin Name
I/O
Function
1
DREQ2/PB5/CS1L
O
Analog filter gain control
2
DACK2/PB6/CS1H
O
VES gain control “H” : VES
3
PB7/DW1
O
Rear CH boost “H” : rear boost
4
VCC3
–
Power supply
5
PA6/CLK
O
CPU clock out (25 MHz)
6
PA5/CS5
O
Not used
7
PA4/CS4
O
Chip select signal for ARP, SERVO DSP and HGA
8
EOP1/PA3/CS3
O
Chip select signal for SDRAM and AV DEC
9
PA2/CS2
O
Chip select signal for REG and AV DEC
10
PA1/CS1
O
Chip select signal for external SRAM
11
CS0
O
Chip select signal for external FLASH ROM
12
NMI
I
Not used (fixed at “H”)
13
HST
I
Not used (fixed at “H”)
14
RST
I
Reset signal input from IF CON
15
GND
–
Ground
16
MD0
I
Input of mode select 0 (fixed at “1”)
17
MD1
I
Input of mode select 1 (fixed at “0”)
18
MD2
I
Input of mode select 2 (fixed at “0”)
19
P80/RDY
I
Wait signal input
20
P81/BGRNT
I
Test terminal (fixed at “H”)
21
P82/BRQ
I
Test terminal (fixed at “L”)
22
RD
O
Read enable signal output
23
WR0
O
High byte write enable signal output (16 bit and 8 bit)
24
P85/WR1
O
Low byte write enable signal output (16 bit only)
25
P20/D16
I/O
Data bus D0 (16 bit)
26
P21/D17
I/O
Data bus D1 (16 bit)
27
P22/D18
I/O
Data bus D2 (16 bit)
28
P23/D19
I/O
Data bus D3 (16 bit)
29
P24/D20
I/O
Data bus D4 (16 bit)
30
P25/D21
I/O
Data bus D5 (16 bit)
31
P26/D22
I/O
Data bus D6 (16 bit)
32
P27/D23
I/O
Data bus D7 (16 bit)
33
D24
I/O
Data bus D8 (16 bit), D0 (8 bit)
34
D25
I/O
Data bus D9 (16 bit), D1 (8 bit)
35
D26
I/O
Data bus D10 (16 bit), D2 (8 bit)
36
D27
I/O
Data bus D11 (16 bit), D3 (8 bit)
37
D28
I/O
Data bus D12 (16 bit), D4 (8 bit)
38
D29
I/O
Data bus D13 (16 bit), D5 (8 bit)
39
D30
I/O
Data bus D14 (16 bit), D6 (8 bit)
40
GND
–
Ground
41
D31
I/O
Data bus D15 (16 bit), D7 (8 bit)
42
A00
–
Address bus A0
43
VCC5
O
Power supply
44
A01
O
Address bus A1
45
A02
O
Address bus A2
46
A03
O
Address bus A3
47
A04
O
Address bus A4
48
A05
O
Address bus A5
49
A06
O
Address bus A6
50
A07
O
Address bus A7
6-37. IC PIN FUNCTIONS
• IC202 DIGITAL SERVO & DIGITAL SIGNAL PROCESSOR (MB911101APFV-G-BND) (DVD Board)
68
Pin No.
Pin Name
I/O
Function
51
A08
O
Address bus A8
52
A09
O
Address bus A9
53
A10
O
Address bus A10
54
A11
O
Address bus A11
55
A12
O
Address bus A12
56
A13
O
Address bus A13
57
A14
O
Address bus A14
58
A15
O
Address bus A15
59
A16/P60
O
Address bus A16
60
A17/P61
O
Address bus A17
61
A18/P62
O
Address bus A18
62
A19/P63
O
Address bus A19
63
A20/P64
O
Address bus A20
64
A21/P65
O
Address bus A21
65
GND
–
Ground
66
A22/P66
O
PLL IC control output “H” : DOUBLE
67
A23/P67
I
DIAG mode signal input “L” : DIAG
68
A24/EOP0
I
Not used
69
AVCC
–
Power supply
70
AVRH
–
Reference power supply (+3.3 V)
71
AVSS/AVRL
–
Ground
72
AN0
I
Set of mode 0
73
AN1
I
Set of mode 1
74
AN2
I
Set of mode 2
75
AN3
I
Set of mode 3 (fixed at “H”)
76
SI0/TRG0/PF0
I
Serial data input from IF CON and EEPROM
77
SI1/TRG1/PF1
O
Serial data output to IF CON and EEPROM
78
SC0/PF2/OCPA3
O
Serial clock output to IF CON and EEPROM
79
SI1/TRG2/PF3
I
Serial bus 1 (for data input)
80
SO1/TRG3/PF4
O
Serial bus 1 (for data output)
81
SI2/PF5/OCPA1
I
Serial bus 2 (for data input)
82
SO2/PF6/OCPA2
O
Serial bus 2 (for data output)
83
PF7/OCPA0/ATG
O
Reset signal output
84
DACK1/PE7
O
Output of DMA-ACK 0 to AV DEC
85
DACK0/PE0
O
Output of DMA-ACK 1 to AV DEC
86
DREQ1/PE5
I
Input of DMA-REQ 0 from AV DEC
87
DREQ0/PE4
I
Input of DMA-REQ 1 from AV DEC
88
INT3/PE3/SC2
I
Input of interrupt from HGA
89
INT2/PE2/SC1
O
Serial clock output
90
VSS
–
Ground
91
X1
O
Clock output (12.5 MHz)
92
X0
I
Clock input (12.5 MHz)
93
VCC5
–
Power supply
94
INT1/PE1
I
Input of interrupt ARP and SERVO DSP
95
INT0/PE0
I
Input of interrupt from AV DEC
96
RAS0/PB0
I
Rear panel lime input select (“H” : DISC “L” : EXT)
97
CS0L/PB1
O
Chip select signal to IF CON
98
CS0H/PB2
O
Chip select signal to DAC (Lt and Rt)
99
DW0/PB3
O
Chip select signal to DAC (L and R)
100
RAS1/PB4
O
DVD/CD select (“H” : 44.1 kHz “L” : 48 kHz)
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