Sony DAV-HDX275 / DAV-HDX277WC / DAV-HDX279W / DAV-HDX475 / DAVHDX576WF / DAV-HDX675 / HCD-HDX275 / HCD-HDX277WC / HCD-HDX279W / HCD-HDX475 / HCD-HDX576WF / HCD-HDX675 Service Manual ▷ View online
HCD-HDX275/HDX277WC/HDX279W/HDX475/HDX576WF/HDX675
77
MAIN BOARD IC1101 CXD9917R (HCD-HDX275:E3, AUS), CXD9927R (EXCEPT HCD-HDX275:E3, AUS)
(RF AMP, SERVO DSP, MPEG DECODER, HDMI TRANSMITTER)
(RF AMP, SERVO DSP, MPEG DECODER, HDMI TRANSMITTER)
Pin No.
Pin Name
I/O
Description
1
OSN
O
RF offset cancellation capacitor connecting terminal
2
RFGC
O
RF AGC loop capacitor connecting for DVD-ROM
3
IREF
I
Reference current input terminal
4
AVDD3
-
Power supply terminal (+3.3V)
5
AGND
-
Ground terminal
6
DVDA
I
AC coupled input path A
7
DVDB
I
AC coupled input path B
8
DVDC
I
AC coupled input path C
9
DVDD
I
AC coupled input path D
10
DVDRF IP
I
AC coupled DVD RF signal input from the optical pick-up block
11
MA
I
DC coupled main-beam RF signal input A
12
MB
I
DC coupled main-beam RF signal input B
13
MC
I
DC coupled main-beam RF signal input C
14
MD
I
DC coupled main-beam RF signal input D
15
SA
I
DC coupled sub-beam RF signal input A Not used
16
SB
I
DC coupled sub-beam RF signal input B Not used
17
TNI
I
3 beam satellite PD signal negative input from the optical pick-up block
18
TPI
I
3 beam satellite PD signal positive input from the optical pick-up block
19, 20
MDI1, MDI2
I
Laser power monitor input from the optical pick-up block
21
LDO2
O
Laser diode drive signal output to the optical pick-up block (for DVD)
22
LDO1
O
Laser diode drive signal output to the optical pick-up block (for CD)
23
SVDD3
-
Power supply terminal (+3.3V)
24
CSO
O
Central servo signal output terminal Not used
25
RFLVL
O
RFRP low pass output terminal Not used
26
SGND
-
Ground terminal
27
V2REFO
O
Reference voltage (+2.8V) output terminal Not used
28
V2O
O
Reference voltage (+2V) output to the optical pick-up block
29
VREFO
O
Reference voltage (+1.4V) output terminal
30
FEO
O
Focus error monitor output terminal Not used
31
TEO
O
Tracking error monitor output terminal Not used
32
TEZISLV
O
Reference voltage (+2V) output to the optical pick-up block
33
OP_OUT
O
Output from the internal operational amplifi er Not used
34
OP_INN
I
Negative input to the internal operational amplifi er Not used
35
OP_INP
I
Positive input to the internal operational amplifi er Not used
36
DMO
O
Spindle motor control signal output to the motor driver
37
FMO
O
Sled motor control signal output to the motor driver
38
TROPENPWM
O
Loading motor control signal output terminal Not used
39
IOPMON
I
Power monitor terminal
40
TRO
O
Tracking coil control signal output to the coil driver
41
FOO
O
Focus coil control signal output to the coil driver
42
AGND18
-
Ground terminal
43
AVDD18
-
Power supply terminal (+1.8V)
44
USB_DP
-
Not used
45
USB_DM
-
Not used
46
USB_VDD3
-
Power supply terminal (+3.3V)
47
USB_VSS
-
Ground terminal
48
PAD_VRT
-
Not used
49
USB_VDD18
-
Power supply terminal (+1.8V)
50
USB_VSS
-
Ground terminal
51
DIR_ERROR
O
PLL lock error signal and data error fl ag output to the digital audio interface receiver
52
DIR_AUDIO
O
PCM audio data output to the digital audio interface receiver
53
LIMITSW
I
Limit detection switch input terminal
54
MSW
O
CD/DVD selection signal output terminal "L": CD, "H": DVD
55
DVDD18
-
Power supply terminal (+1.8V)
HCD-HDX275/HDX277WC/HDX279W/HDX475/HDX576WF/HDX675
78
Pin No.
Pin Name
I/O
Description
56 to 64
HA2 to HA8,
HA18, HA19
HA18, HA19
O
Address signal output to the fl ash ROM
65
DVDD3
-
Power supply terminal (+3.3V)
66
XWR
O
Write enable signal output to the fl ash ROM
67 to 75
HA16 to HA9, HA20
O
Address signal output to the fl ash ROM
76
XROMCS
O
Chip select signal output to the fl ash ROM
77
HA1
O
Address signal output to the fl ash ROM
78
XRD
O
Read enable signal output to the fl ash ROM
79, 80
HD0, HD1
I/O
Two-way data bus terminal with the fl ash ROM
81
DVSS
-
Ground terminal
82 to 86
HD2 to HD6
I/O
Two-way data bus terminal with the fl ash ROM
87
HA21
O
Address signal output to the fl ash ROM
88
RESERVED
-
Not used
89
HD7
I/O
Two-way data bus terminal with the fl ash ROM
90
DVSS
-
Ground terminal
91, 92
HA17, HA0
O
Address signal output to the fl ash ROM
93
DVDD18
-
Power supply terminal (+1.8V)
94
FWD
O
Loading motor drive signal output terminal (forward direction) Not used
95
REV
O
Loading motor drive signal output terminal (reverse direction) Not used
96
DVDD3
-
Power supply terminal (+3.3V)
97
IFSDO
O
Serial data output to the system controller
98
IFCK
O
Serial data transfer clock signal output to the system controller
99
xIFCS
O
Chip select signal output to the system controller
100
IFSDI
I
Serial data input from the system controller
101
SCL
O
Serial data transfer clock signal output to the EEPROM and HDMI transmitter
102
SDA
I/O
Two-way data bus with the EEPROM and HDMI transmitter
103
CKSW
I
Chucking detection switch input terminal Not used
104
OCSW
I
Disc table open/close detection switch input terminal Not used
105
RXD
I
Receive data input terminal for UART communication when data writing to fl ash memory
106
TXD
O
Transmit data output terminal for UART communication when data writing to fl ash memory
107
ICE
I
ICE mode enable signal input terminal Not used
108
xSYSRST
I
Reset signal input from the system controller "L": reset
109
RESERVED
-
Not used
110
IFBSY
I
Busy signal input from the system controller
111
DQM0
O
Data mask signal output to the SD-RAM
112
EEWP
O
Write protect signal output to the EEPROM
113 to 117
RD7 to RD3
I/O
Two-way data bus with the SD-RAM
118
DVDD3
-
Power supply terminal (+3.3V)
119 to 129
RD2 to RD0,
RD15 to RD8
I/O
Two-way data bus with the SD-RAM
130
TSD_M
O
Thermal shut down signal output to the motor/coil driver
131
DVDD3
-
Power supply terminal (+3.3V)
132
DQM1
O
Data mask signal output to the SD-RAM
133
RWE
O
Write enable signal output to the SD-RAM
134
CAS
O
Column address strobe signal output to the SD-RAM
135
RAS
O
Row address strobe signal output to the SD-RAM
136
RCS
O
Chip select signal output to the SD-RAM
137, 138
BA0, BA1
O
Bank address signal output to the SD-RAM
139 to 141
RA10, RA0, RA1
O
Address signal output to the SD-RAM
142
DVDD18
-
Power supply terminal (+1.8V)
143, 144
RA2, RA3
O
Address signal output to the SD-RAM
145
DVDD3
-
Power supply terminal (+3.3V)
146
DRCLK
O
Serial data transfer clock signal output to the SD-RAM
147
CKE
O
Clock enable signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to 155
RA11, RA9 to RA4
O
Address signal output to the SD-RAM
HCD-HDX275/HDX277WC/HDX279W/HDX475/HDX576WF/HDX675
79
Pin No.
Pin Name
I/O
Description
156
DVDD3
-
Power supply terminal (+3.3V)
157
MUTE123
O
Muting signal output to the motor/coil driver
158
MUTE
O
Muting signal output to the motor/coil driver
159
DDC_DA
O
Serial data transfer clock signal output to the HDMI OUT connector
160
DVDD18
-
Power supply terminal (+1.8V)
161
DDC_CLK
I/O
Two-way data bus with the HDMI OUT connector
162
HTPLG
I
HDMI hot-plug detection signal input terminal
163
AGND3
-
Ground terminal
164
EXT_RES
-
Not used
165, 166
AVDD3
-
Power supply terminal (+3.3V)
167
EXT_CAP
-
Not used
168, 169
AGND3, AGND18
-
Ground terminal
170
TXCN
O
TMDS clock signal (negative) output to the HDMI OUT connector
171
TXCP
O
TMDS clock signal (positive) output to the HDMI OUT connector
172
AVDD18
-
Power supply terminal (+1.8V)
173
TX0N
O
TMDS data (negative) output to the HDMI OUT connector
174
TX0P
O
TMDS data (positive) output to the HDMI OUT connector
175
AGND18
-
Ground terminal
176
TX1N
O
TMDS data (negative) output to the HDMI OUT connector
177
TX1P
O
TMDS data (positive) output to the HDMI OUT connector
178
AVDD18
-
Power supply terminal (+1.8V)
179
TX2N
O
TMDS data (negative) output to the HDMI OUT connector
180
TX2P
O
TMDS data (positive) output to the HDMI OUT connector
181
AGND18
-
Ground terminal
182, 183
R/Cr/Pr, B/Cb/Pb
O
Component video signal output to the video amplifi er
184
DACVSSA
-
Ground terminal
185
Y/G
O
Component video signal output to the video amplifi er
186
DACVDDA
-
Power supply terminal (+3.3V)
187
CVBS
O
Video signal output to the video amplifi er Not used
188
DACVSSB
-
Ground terminal
189
C
O
Chroma signal output to the video amplifi er
190
DACVDDB
-
Power supply terminal (+3.3V)
191
Y
O
Y signal output to the video amplifi er
192
DACVSSC
-
Ground terminal
193
FS
-
Full scale adjustment terminal
194
VREF
-
For reference voltage terminal
195
DACVDDC
-
Power supply terminal (+3.3V)
196
VBUS_OE
-
Not used
197
VBUS_OC
-
Not used
198
DIR_XSTATE
I
Source clock switching monitor input from the digital audio interface receiver
199
SPMCK
O
Master clock signal output to the digital audio interface receiver
200
SPBCK
O
Bit clock signal output to the digital audio interface receiver
201
SPLRCK
O
L/R sampling clock signal output to the digital audio interface receiver
202
ADIN(SPDATA)
I
Audio serial data input from the digital audio interface receiver
203
ACLK
O
Master clock signal output to the buffer
204
ABCK
O
Bit clock signal output to the buffer
205
ALRCK
O
L/R sampling clock signal output to the buffer
206
MC_DATA(ADIN)
I
Audio serial data input from the A/D converter
207
DVDD3
-
Power supply terminal (+3.3V)
208
MIC
-
Not used
209
WIDE
O
Normal/squeeze selection signal output to the video amplifi er
"L": normal, "H": squeeze Not used
"L": normal, "H": squeeze Not used
210
REG_SEL/DSEL
-
Not used
211
TRG_SW
I
Trigger detection switch input terminal Not used
212
DVDD18
-
Power supply terminal (+1.8V)
213
KMOD
-
Not used
HCD-HDX275/HDX277WC/HDX279W/HDX475/HDX576WF/HDX675
80
Pin No.
Pin Name
I/O
Description
214
XVOICE/DIR_CSFCAG
I
Detection of MIC signal input from the digital audio interface receiver
215
SPDIF
O
SPDIF digital audio signal output terminal Not used
216
APLLVDD3
-
Power supply terminal (+3.3V)
217
APLLCAP
-
Connection terminal for an external capacitor
218
APLLVSS
-
Ground terminal
219, 220
ADACVSS2,
ADACVSS1
-
Ground terminal
221
DIR_CE
-
Not used
222, 223
ASDATA3, ASDATA2
O
Audio serial data output to the buffer
224
AVCM
-
Not used
225, 226
ASDATA1, ASDATA0
O
Audio serial data output to the buffer
227
DIR_CL
-
Not used
228, 229
ADACVDD1,
ADACVDD2
-
Power supply terminal (+3.3V)
230
DIR_DI
I
Serial data input from the digital audio interface receiver
231
DIR_DO
O
Serial data output to the digital audio interface receiver
232
ADACVSS1
-
Ground terminal
233
ADACVDD1
-
Power supply terminal (+3.3V)
234
SADCVDD18
-
Power supply terminal (+1.8V)
235
SADCVSS18
-
Ground terminal
236
RFGND18
-
Ground terminal
237
RFVDD18
-
Power supply terminal (+1.8V)
238
XTALO
O
System clock output terminal (27 MHz)
239
XTALI
I
System clock input terminal (27 MHz)
240
JITFO
O
Output terminal of the RF jitter meter
241
JITFN
I
Input terminal of the RF jitter meter
242
PLLVSS
-
Ground terminal
243
PLLVDD3
-
Power supply terminal (+3.3V)
244
LPFON
O
Data PLL loop fi lter output terminal
245
LPFIP
I
Data PLL loop fi lter input terminal
246
LPFIN
I
Data PLL loop fi lter input terminal
247
LPFOP
O
Data PLL loop fi lter output terminal
248
ADCVDD3
-
Power supply terminal (+3.3V)
249
ADCVSS
-
Ground terminal
250
RFVDD3
-
Power supply terminal (+3.3V)
251
RFRPDC
O
RF ripple detect output terminal
252
RFRPAC
I
RF ripple detect input terminal
253
HRFZC
I
High frequency RF ripple zero crossing terminal
254
CRTPLP
O
Defect level fi lter capacitor connecting terminal
255
RFGND18
-
Ground terminal
256
OSP
O
RF offset cancellation capacitor connecting terminal
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