DOWNLOAD Sony DAV-C700 / DAV-C900 / HCD-C700 / HCD-C900 Service Manual ↓ Size: 13.59 MB | Pages: 108 in PDF or view online for FREE

Model
DAV-C700 DAV-C900 HCD-C700 HCD-C900
Pages
108
Size
13.59 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
dav-c700-dav-c900-hcd-c700-hcd-c900.pdf
Date
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Sony DAV-C700 / DAV-C900 / HCD-C700 / HCD-C900 Service Manual ▷ View online

69
HCD-C700/C900
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
I
I
I
I
I
–
I
I
I
–
O
O
I
I
O
–
O
O
O
O
O
O
O
O
O
O
–
O
O
–
O
O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
Digital Ground
CPU data
Digital power supply 3.3V
CPU address
Digital Ground
CPU address
Digital power supply 1.8V
Interrupt
Host interrupt(DSP)
Tip select
Host servo tip select
Wait
Digital Ground
DRAM address
Digital power supply 3.3V
DRAM write enable
DRAM CAS
Digital Ground
DRAM RAS
DRAM output enable
Digital power supply 1.8V
DRAM data
Pin Name
VSS
D0
D1
D2
D3
D4
D5
D6
D7
VDD 3.3V
A0
A1
A2
A3
A4
VDD
A5
A6
A7
VDD 1.8V
XINT
HINT
XCS
HCS
XWAT
VSS
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
VDD 3.3V
XMWR
XCAS
VSS
XRAS
XOE
VDD1 1.8V
MD0
MD1
MD2
MD3
MD4
MD5
MD6
• IC302
 CXD9635R (SERVO DSP) (DVD BOARD)
70
HCD-C700/C900
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
O
O
–
O
O
–
O
O
I/O
O
O
I/O
I/O
I/O
I/O
–
I/O
I/O
I/O
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
–
I/O
–
O
O
O
O
O
O
Description
DRAM data
Digital Ground
DRAM data
Digital power supply 3.3V
CDDA data
CDDA bit clock
Digital Ground
CDDA LR clock
Digital out
Digital power supply 1.8V
SD bus clock
SD bus header
SD bus REQ
SD bus ACK
SD bus error flag
SD bus data
Digital Ground
SD bus data
Digital power supply 3.3V
Monitor bus (83 - 88 : Not used)
Error storbe (Not used)
Digital power supply 1.8V
RF digital data in/out
Digital Ground
PLCK output
ADC output
Pin Name
MD7
VSS
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
VDD 3.3V
DATA
BCLK
VSS
LRCK
DOUT
VDD 1.8V
SDCK
XSHD
XSRQ
XSAK
SDEF
SD0
SD1
SD2
SD3
VSS
SD4
SD5
SD6
SD7
VDD 3.3V
MNT0
MNT1
MNT2
MNT3
MNT4
MNT5
MNT6
MNT7
ESTB
VDD 1.8V
RFD
VSS
PLCKO
ADO0
ADO1
ADO2
ADO3
ADO4
71
HCD-C700/C900
Pin No.
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
I/O
O
O
O
–
–
I
I
I
–
–
I
I
I
I
I
O
–
I
I
–
–
O
I
–
–
I
–
I
I
–
I
I
–
–
I
I
I
–
I
I
–
I
I
I
–
–
I
–
O
–
Description
ADC output
Digital Ground
Analog Ground
VCO control input
VCO outside resistance 1
VCO outside resistance 2
Analog power supply
Analog Ground
OP amp positive input
OP amp negative input
Feedback resistance 3
Feedback resistance 2
Feedback resistance 1
OP amp output
Analog power supply
DAC reference voltage
DAC bias pin
Analog power supply
Analog Ground
DAC output
Reference current of DAC
Digital Ground(DAC)
Digital power supply(DAC)
ADC reference
Analog power supply
RF input
RF input
Analog Ground
RF input
ADC reference
Digital Ground(ADC)
Digital power supply(ADC)
ADC input
ASW analog power supply
ADC input
ASW analog ground
ADC input
ADC digital power supply(DSP)
ADC digital ground DSP
ADC reference
Analog ground(ADC)
ASW output
ADC analog power supply(DSP)
Pin Name
ADO5
ADO6
ADO7
VSS
VSSA4
VCO
R1
R2
VDDA4 3.3V
VSSA3
INP
INM
FR3
FR2
FR1
Y
VDDA3 3.3V
VREF
BIAS
VDDA2 3.3V
VSSA2
AOUT
IREF
VSSD2
VDDD2 3.3V
VRT
VDDA1 3.3V
RFIN1
AIN
VSSA1
RFIN1
VRB
VSSD1
VDDD1 3.3V
ADC0
ADC1
ADC2
VDDA0 3.3V
ADC3
ADC4
VSSA0
ADC5
ADC6
ADC7
VDDD0 3.3V
VSSD0
VRBA
VSSA0
TESTAA
VDDA0 3.3V
72
HCD-C700/C900
Pin No.
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
I/O
I
–
I
I
I
I
I
–
O
O
O
I/O
O
O
–
I/O
I/O
I/O
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
I
–
–
I
–
I
–
I
–
I
I
I
I
O
I
I
O
O
O
Description
ADC reference
Digital Ground
Test terminal L
DSP reset
Reset
Digital Ground
CLV speed error
Motor on
CLV phase error
Defect detection output
Jitter PWM output (Not used)
EFM lock detection (Not used)
Digital power supply 1.8V
GIO/external interruption
Digital power supply 3.3V
GIO/PGREF input (Not used)
GIO/PGIN input
GIO/serial data in
GIO/serial data out
GIO/serial clock
GIO/FGREF input
GIO/FGIN input
GIO/Timer 2 clock input (Not used)
GIO(input and output) (179 : Not used)
Digital Ground
Clock input
Analog Ground
Analog power supply
Defect input
Digital Ground
Clock for ECC 33MHz
Digital power supply 1.8V
System clock
Digital Ground
JTAG Boundary scan (193 : Not used)
TZC input
MIRR input
PWM output
Pin Name
VRTA
VSS
TESTK0
TESTK1
TESTK2
XDSPRST
XARPRST
VSS
MDS0
MON
MDP0
DFCT
JITPWM
LOCK
VDD1 1.8V
GIO0/INT2
GIO1/INT3
GIO2/INT4
GIO3/INT5
VDD 3.3V
GIO4/PGREF
GIO5/PGIN
GIO6/SDI
GIO7/SDO
GIO8/SCK
GIO9/FGREF
GIO10/FGIN
GIO11/TMC2
GIO12
GIO13
VSS
CLKIN
VSSA5
VDDA5 1.8V
DFCTI
VSS
MCKI
VDD 1.8V
SCKI
VSS
TRST
TMS
TDI
TCK
TDO
TZC
MIRR
PWM0
PWM1
PWM2
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