Sony DAV-C450 (serv.man2) Service Manual ▷ View online
65
HCD-C450
IC001
SP3728AC (RF-240 BOARD)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RFIN
CP
WIN
WPP
CN
A2
B2
C2
D2
D
C
B
A
E
F
RFIP
SDEN
SCLK
SWD
SRD
MON
TPH
FE
TE
TZIN
VCI
DFT
TZC
PI
PII
BYP2
MIRR
V33
RX
TP
A
MEV
VNA
FNN
FNP
DIP
DIN
BYP
SIGO
VP
A
AIP
AIN
A
TON
A
TOP
G
H
VC
VPB
DVDPD
CDPD
VNB
LDSELO
DVDLD
CDLD
LDON
MEVO
MIN
MP
MB
MLPF
ATT
GCA
GCA
GCA
GCA
APC
GCA
GCA
GCA
GCA
GCA
GCA
GCA
GCA
FULL WAVE
RECTIFIER
BOTTOM
ENV
AGC
CHARGE
PUMP
PROGRAMABLE
EQ FILTER
GCA
LEVEL
DAC
LPF
LPF
LPF
BEL
SEL
SERIAL
PORT
REGISTER
MUX
MUX
MUX
PHASE
DETECTOR
PHASE
DETECTOR
EQ
EQ
EQ
EQ
VC
LD
SEL
WOBLE BPF
PEAK/
BOTTOM
HOLD
MON
SEL
VC
VC
VPC
VREF
LDEN
CONTROL
SIGNALS
RF HOLD EN
66
HCD-C450
5-31. IC Pin Function Descriptions
• IC103
MB91307APFV-G-BND-E1 (SYSTEM CONTROL) (DVD BOARD)
Pin No.
1 to 5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
I/O
O
O
O
O
–
–
–
I
I
I
I
I
I
I
I
I
I
O
–
–
I
O
O
I
O
O
I
O
O
–
O
O
–
I/O
O
O
–
–
–
–
–
I
O
O
I
O
O
–
–
–
Pin Name
HA17 - 21
HA22
WP
TRM/XKRCS
AVCC
AVRH
AVSS
AN0
AN1
AN2
AN3
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
VCC
SI0
SO0
SC0
SI1
SO1
SC1
SI2
SO2
SC2
VSS
XRST
XARPRST
RGBSEL/MICMUTE
SDA
SCL
TRM+/XKRRST
EUROV/Y/CLPSW1
DISCEXT/CLPSW0
MD0
MD1
MD2
DREQ0
DACK0
XDRVMUTE
DREQ1
DACK1
XIFCS
VSS
X1
X0
Description
Address signal output
Address signal output (Not used)
I2C EEPROM write protect signal output
Chip select signal output to IC801(CXD2752R)
Analog power supply
A/D converter reference voltage supply
Analog ground
Region setting input
Model setting input
Destination setting input
Not used (pull-up)
Interrupt signal input from IC503(AV Decoder)
Interrupt signal input from IC302(CXD9635R/ARP)
Interrupt signal input from IC302(CXD9635R/SDSP)
FGA interrupt signal input
Interrupt signal input from IC901(CPU)
Interrupt signal input from IC801(CXD2752R)
Soft mute control signal output to IC801(CXD2752R)
Not used
Power supply
Serial data input from IC901(CPU)
Serial data output to IC901(CPU)
Serial clock output to IC901(CPU)
Serial data input from IC801(CXD2752R)
Serial data output to IC801(CXD2752R)
Serial clock output to IC801(CXD2752R)
RS-232C data input for debugging
RS-232C data output for debugging
RS-232C clock input or output for debugging (Not used)
Ground
System reset signal output
Reset signal output to IC302(CXD9635R/ARP)
Not used
I2C data input or output
I2C clock output
Data request selection signal output (DVD : L, SACD : H)
Not used
Not used
Operation mode setting (connected to Vcc)
Operation mode setting (connected to Ground)
Operation mode setting (connected to Ground)
DMA-REQ1 signal input
DMA-ACK1 signal output
Drive mute control signal output to IC401
DMA-REQ0 signal input
DMA-ACK0 signal output
Chip select signal output to IC901(CPU)
Ground
Clock (oscillator) output
Clock (oscillator) input
67
HCD-C450
Pin No.
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85 to 100
101
102 to 109
110
111 to 118
119
120
I/O
–
I
I
O
–
O
O
O
O
–
O
–
I
I
I
O
O
O
–
–
–
I
O
I
–
–
O
O
I
O
I/O
–
O
–
O
–
O
Pin Name
VCC
CKSW1
OCSW1
CS0X
CS1X
CS2X
CS3X
CS4X
CS5X
C
CS6X
CS7X
XWAIT
BGRNTX
BRQ
XRD
XWRH
XWRL
XMIX
HSTX
VSS
XFRRST
CPUCK
OCSW2
XDACK
VESCS/X39CS
48/44.1K
WIDE
MAMUTE
XLDON
HD0 -15
VSS
HA0 - 7
VCC
HA8 - 15
VSS
HA16
Description
Power supply
Chucking switch (Tray SW1) signal input
Open/Close switch (Tray SW2) signal input
Chip select signal output to external ROM
Not used
Chip select signal output to AVD SDRAM
Chip select signal output to AVD R-BUS
Chip select signal output to IC302(CXD8635R/ARP)
Chip select signal output to IC302(CXD8635R/SDSP)
Terminal for built-in regulator bypass capacitor
FGA CS output
Not used
external WAIT signal input
External bus open aclnowledge signal input (pull-up)
External bus open request signal input (Not used)
External bus read enable signal output
Write signal output for upper byte
Write signal output for lower byte (Not used)
Not used
Not used (pull-up)
Ground
Reset signal input
CPU clock output
Tray switch signal input
Not used (pull-up)
Not used (pull-up)
PLL IC control signal output
Video wide offset control signal output
IFOK signal input from IC901(CPU)
Laser diode mute control signal output
External data bus bits 0 - 15
Ground
Address signal output
Power supply
Address signal output
Ground
Address signal output
68
HCD-C450
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
I
I
I
I
I
–
I
I
I
–
O
O
I
I
O
–
O
O
O
O
O
O
O
O
O
O
–
O
O
–
O
O
–
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
Digital Ground
CPU data
Digital power supply 3.3V
CPU address
Digital Ground
CPU address
Digital power supply 1.8V
Interrupt
Host interrupt(DSP)
Tip select
Host servo tip select
Wait
Digital Ground
DRAM address
Digital power supply 3.3V
DRAM write enable
DRAM CAS
Digital Ground
DRAM RAS
DRAM output enable
Digital power supply 1.8V
DRAM data
Pin Name
VSS
D0
D1
D2
D3
D4
D5
D6
D7
VDD 3.3V
A0
A1
A2
A3
A4
VDD
A5
A6
A7
VDD 1.8V
XINT
HINT
XCS
HCS
XWAT
VSS
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
VDD 3.3V
XMWR
XCAS
VSS
XRAS
XOE
VDD1 1.8V
MD0
MD1
MD2
MD3
MD4
MD5
MD6
• IC302
CXD9635R (SERVO DSP) (DVD BOARD)
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