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Model
CMT-V50IP
Pages
89
Size
7.84 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cmt-v50ip.pdf
Date

Sony CMT-V50IP Service Manual ▷ View online

CMT-V50iP
57
IC901 – 903  TPS54332DDAR
EN 3
VIN 2
BOOT 1
7 GND
8 PH
5 VSENSE
SHUTDOWN
LOGIC
BOOT
CHARGE
THERMAL
SHUTDOWN
SS 4
ENABLE THRESHOLD
ENABLE
COMPARATOR
+
+
6 COMP
MAXIMUM
CLAMP
FREQUENCY
SHIFT
GATE
DRIVE
LOGIC
BOOT
UNDERVOLTAGE
LOCKOUT
OSCILLATOR
SLOPE
COMPENSATION
ECO-MODE
MAXIMUM CLAMP
DISCHARGE
LOGIC
VOLTAGE
REFERENCE
PWM
COMPARATOR
PWM
LATCH
6
Q R
S
12 A/V
CURRENT
SENSE
ERROR
AMPLIFIER
– LCD Board –
IC1351  LC75890W-2H
1
24
36
37
COM4
P1/S1
2
P2/S2
3
P3/S3
4
P4/S4
5
P5/S5
6
P6/S6
7
P7/S7
8
P8/S8
9
P9/S9
10
P10/S10
11
P1
1/S1
1
12
P12/S12
S36
35
S35
34
S34
33
S33
32
S32
31
S31
30
S30
29
S29
28
S28
27
S27
26
S26
25
S25
S24
23 S23
22 S21
21 S21
20 S20
19 S19
18 S18
17 S17
16 S16
15 S15
14 S14
13 S13
2/3VLCD
SEGMENT
 DRIVER & LA
TCH
COMMON
DRIVER
CLOCK
GENERATOR
CCB
INTERF
ACE
SHIFT
RESISTER
CONTROL
RESISTER
38
COM3
39
COM2
40
COM1
41
OSCI/S37
42
VDD
43
VLCD
44
45
VSS
INH
1/3VLCD
LCD DRIVE
BIAS VOLTAGE
STABILIZATION
CIRCUIT
46
CE
47
CL
48
DI
CMT-V50iP
58
•  IC Pin Function Description
MAIN  BOARD  IC103  R5F3650KBDFA (SYSTEM  CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
MTK DOUT
O
Serial data output to the servo/audio processor
2
MTK CLK
O
Serial data transfer clock signal output to the servo/audio processor
3
MTK RESET
O
Reset signal output to the servo/audio processor and EEPROM    “L”: reset
4
MTK BUSY
O
Busy signal output to the servo/audio processor
5
SIRCS
I
SIRCS signal input from remote control receiver
6
MTK CS
I
Chip select signal input from the servo/audio processor
7
MTK IP SEL
O
IP (iPod/iPhone/iPad)/USB selection signal output to the servo/audio processor    
“L”: IP (iPod/iPhone/iPad), “H”: USB
8
BYTE
I
External data bus width selection signal input terminal
9
CNVss
I
Processor mode selection signal input terminal
10
Xcin
I
Sub system clock input terminal (32.768 kHz)
11
Xcout
O
Sub system clock output terminal (32.768 kHz)
12
RESET
I
System reset signal input terminal    “L”: reset    
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
13
Xout
O
Main system clock output terminal (5 MHz)
14
Vss
-
Ground terminal
15
Xin
I
Main system clock input terminal (5 MHz)
16
Vcc
-
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt signal input terminal    Not used
18
SRC RESET
O
Not used
19
SRC MUTE
O
Not used
20
AC-CUT
I
AC cut on/off detection signal input terminal    “L”: AC cut on
21
BCO MUTE REQ
I
Not used
22
TOUCH PANEL SCL
O
Serial data transfer clock signal output to the TOUCH KEY board
23
TOUCH PANEL 
RESET
O
Reset signal output to the TOUCH KEY board    “L”: reset
24
TOUCH PANEL SDA
O
Serial data output to the TOUCH KEY board
25
BT MUTE/
BCo_SPI_READY
I
Not used
26
DOCK LED
O
LED drive signal output terminal for dock indicator    “H”: LED on
27
BCo_SPI_REQ
I
Not used
28
BT RESET/
BCo_RESET
O
Not used
29
IIC CLK
I/O
Two-way I2C clock signal bus terminal    Not used
30
IIC DATA
I/O
Two-way I2C data bus terminal    Not used
31
TUNER SDA
O
Serial data output to the FM/AM tuner unit
32
TUNER SCL
O
Serial data transfer clock signal output to the FM/AM tuner unit
33
RDS INT
I
RDS interrupt signal input from the FM/AM tuner unit
34
TUNER POWER
O
Chip enable signal output to the FM/AM tuner unit
35
BT TxD-OUT/
BCo_SPI_DOUT
O
Not used
36
BT RxD-IN/
BCo SPI DIN
I
Not used
37
BT CTS/
BCo_SPI_CLK
I/O
Not used
38
BT RTS/BCo_SPI_CS
O
Not used
39
BT POWER/
BCO POWER
O
Not used
40
USB OC
I
VBUS power over current detection signal input terminal for USB section
(Except US, Canadian and Australian models only)
41
FLASH WRITE 
MODE IN
I
Flash writing mode selection signal input terminal    Fixed at “L” in this unit
42
USB POWER
O
VBUS power on/off control signal output terminal for USB section    “H”: power on
(Except US, Canadian and Australian models only)
43
USB/IPOD SEL
O
IP (iPod/iPhone/iPad)/USB selection signal output terminal    
“L”: IP (iPod/iPhone/iPad), “H”: USB
(Except US, Canadian and Australian models only)
44
IPOD POWER
O
VBUS power on/off control signal output terminal for IP (iPod/iPhone/iPad) section    
“H”: power on
CMT-V50iP
59
Pin No.
Pin Name
I/O
Description
45
IPOD OC
I
VBUS power over current detection signal input terminal for IP (iPod/iPhone/iPad) section
46
FLASH WRITE 
MODE IN
I
Flash writing mode selection signal input terminal    Fixed at “H” in this unit
47
WM TxD OUT
O
Not used
48
WM RxD IN
I
Not used
49
WM SLEEP IN
I
Not used
50
IPOD CHARGER
O
iPod, iPhone or iPad charge on/off control signal output terminal    “H”: charge on
51
NO USE
-
Not used
52
USB/UART SELECT
O
Not used
53
DP RESET
O
Not used
54
DP SDA
O
Serial data output to the liquid crystal display driver
55
DP SCL
O
Serial data transfer clock signal output to the liquid crystal display driver
56
DP CS
O
Chip select signal output to the liquid crystal display driver
57
LCD BKLIGHT
O
Not used
58
DP INH
O
Display on/off control signal output to the liquid crystal display driver    “H”: display on
59
ACTIVE LED
O
Not used
60, 61
EXT-A SEL-B,
EXT-A SEL-A
O
External input analog audio selection signal output terminal
62
Vcc
-
Power supply terminal (+3.3V)
63
NO USE
-
Not used
64
Vss
-
Ground terminal
65
POWER PROTECT
I
Not used
66
BT LED/
BCO POWER
O
Not used
67
TAS INT
I
Interrupt signal input from the audio DSP
68
TOUCH PANEL INT
I
Interrupt signal input from the TOUCH KEY board
69
STANDBY LED
O
LED drive signal output terminal for STANDBY indicator    “H”: LED on
70
POWER MONITOR
I
Power monitor terminal
71
WIFI CH SEL
I
Not used
72
KEY1
I
Top panel key input terminal (A/D input)
73
IPOD DETECT
I
iPod, iPhone or iPad connection detection signal input from the iPod/iPhone/iPad connector    
“L”: iPod, iPhone or iPad is connected
74
KEY WAKE UP
I
Power key input terminal
75
AMP-POWER
O
Power on/off control signal output terminal for amplifi er section    “H”: power on
76
POWER ON
O
Main power on/off control signal output terminal    “H”: power on
77
DSP IIC-SDA
O
I2C data output to the digital power amplifi er and audio DSP
78
DSP IIC-CLK
O
I2C clock signal output to the digital power amplifi er and audio DSP
79
HIZ
O
Not used
80
DAMP PDN
O
Power down control signal output to the digital power amplifi er    “L”: power down
81
DAMP RESET
O
Reset signal output to the digital power amplifi er    “L”: reset
82
HP DET
I
Headphone connection detection signal input terminal    “L”: headphone is connected
Change to the “Not used” in the midway of production
83
HP MUTE
O
Headphone muting on/off control signal output terminal    “H”: muting on
84
DAMP FAULT
I
Fault signal input from the digital power amplifi er    “L”: fault
85
EXT-D SEL-B
O
External input digital audio selection signal output terminal    Not used
86
EXT-D SEL-A
O
External input digital audio selection signal output terminal
87
DSP MUTE
O
Muting on/off control signal output to the audio DSP    “H”: muting on
88
DSP RESET
O
Reset signal output to the audio DSP    “L”: reset
89
CDM LOAD END SW
I
Loading end detection switch input terminal
90
CDM UNLOAD
END SW
I
Unloading end detection switch input terminal
91
CDM LOAD SW
I
Loading detection switch input terminal
92
CDM FWD
O
Loading motor drive signal output to the optical pick-up block (forward direction)
93
CDM RVS
O
Loading motor drive signal output to the optical pick-up block (reverse direction)
94
NO USE
-
Not used
95
MODEL IN
I
Model setting terminal
96
Avss
-
Ground terminal
97
SPEC IN
I
Destination setting terminal
98
VREF
I
Reference voltage (+3.3V) input terminal
99
Avcc
-
Power supply terminal (+3.3V)
100
MTK DIN
I
Serial data input from the servo/audio processor
Ver. 1.2
CMT-V50iP
60
Pin No.
Pin Name
I/O
Description
1
RF_C
I
RF main beam (A) input from the optical pick-up block
2
RF_D
I
RF main beam (D) input from the optical pick-up block
3
RF_E
I
RF sub beam (F) input from the optical pick-up block
4
RF_F
I
RF sub beam (E) input from the optical pick-up block
5
AVDD12_2
-
Power supply terminal (+1.2V) (analog system)
6
AVDD33_1
-
Power supply terminal (+3.3V) (analog system)
7
XTALI
I
System clock input terminal (27 MHz)
8
XTALO
O
System clock output terminal (27 MHz)
9
AGND33
-
Ground terminal (analog system)
10
V20
O
Reference voltage (+2V) output to the optical pick-up block
11
V14/VREFO
O
Reference voltage (+1.4V) output to the coil/motor driver
12
REXT
I
External resistor connection terminal
13
MDI1
I
Laser power monitor input from the optical pick-up block
14
LDO1
O
Laser diode drive signal output to the optical pick-up block (for CD)
15
LDO2
O
Laser diode drive signal output to the optical pick-up block (for DVD)
16
AVDD33_2
-
Power supply terminal (+3.3V) (analog system)
17
DMO
O
Spindle motor control signal output to the coil/motor driver
18
FMO
O
Sled motor control signal output to the coil/motor driver
19
MUTE4
O
Muting signal output to the coil/motor driver (for spindle motor)
20
MSW
O
CD/DVD selection signal output terminal    “L”: CD, “H”: DVD
21
TRO
O
Tracking coil control signal output to the coil/motor driver
22
FOO
O
Focus coil control signal output to the coil/motor driver
23
TSD_M
I
Thermal shut down signal input from the coil/motor driver
24
USB_DM
I/O
Two-way USB data (–) bus terminal
25
USB_DP
I/O
Two-way USB data (+) bus terminal
26
VDD33_USB
-
Power supply terminal (+3.3V) (for USB)
27
VSS33_USB
-
Ground terminal (for USB)
28
PAD_VRT
I/O
USB generating reference current input/output terminal
29
VDD12_USB
-
Power supply terminal (+1.2V) (for USB)
30
SF_CS#
O
Chip select signal output to the serial fl ash
31
SF_DO
I
Serial data input from the serial fl ash
32
SF_DI
O
Serial data output to the serial fl ash
33
SF_CK
O
Serial data transfer clock signal output to the serial fl ash
34
IFSCK
I
Serial data transfer clock signal input from the system controller
35
IFSDO
O
Serial data output to the system controller
36
RX
I
Serial data input terminal for fl ash writing
37
TX
O
Serial data output terminal for fl ash writing
38
PRST#
I
Reset signal input from the system controller    “L”: reset
39
NC
-
Not used
40
IFSDI
I
Serial data input from the system controller
41
IFBSY
I
Busy signal input from the system controller
42
IFCS#
O
Chip select signal output to the system controller
43
MFISW
I
IP (iPod/iPhone/iPad)/USB selection signal input from the system controller    
“L”: IP (iPod/iPhone/iPad), “H”: USB
44
LIMITSW
I
Limit detection switch input terminal    Not used
45
MUTE123
O
Muting signal output to the coil/motor driver (for focus/tracking coil and sled motor)
46
EEWP
O
Write protect signal output terminal    Not used
47
SDA
I/O
Two-way I2C data bus with the EEPROM
48
SCL
I/O
Two-way I2C clock signal bus with the EEPROM
49
NC
-
Not used
50
DVSS33
-
Ground terminal (digital system)
51
DVDD33
-
Power supply terminal (+3.3V) (digital system)
52 to 55
RD0 to RD3
I/O
Two-way data bus with the SD-RAM
56
DVDD12
-
Power supply terminal (+1.2V) (digital system)
57 to 60
RD4 to RD7
I/O
Two-way data bus with the SD-RAM
61
DQM0
O
Data mask signal output to the SD-RAM (lower byte)
62 to 69
RD15 to RD8
I/O
Two-way data bus with the SD-RAM
70
DQM1
O
Data mask signal output to the SD-RAM (upper byte)
MAIN  BOARD  IC501  CXD90013R (RF  AMP,  SERVO/AUDIO  PROCESSOR)
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